Implement busio.I2c.
* Added asf4_conf/samd*/hpl_sercom_config.h * Adjusted clocks in peripheral_clk_config.h. * Put some frozen libs back in CPX for testing. * Implement common-hal I2C * Add samd*_peripherals.h in parallel with samd*_pins.h for common functions and data. * Store SERCOM index in pins table for convenience. * Canonicalize some #include guard names in various .h files. simpler reset of SERCOMs; remove unused routine
This commit is contained in:
parent
048f0f0e4f
commit
7292984204
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@ -48,3 +48,12 @@ _build
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# Generated rst files
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# Generated rst files
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######################
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######################
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genrst/
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genrst/
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# ctags and similar
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###################
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TAGS
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# Merge leftovers
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#################
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*.orig
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@ -169,6 +169,8 @@ SRC_ASF := \
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hal/src/hal_atomic.c \
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hal/src/hal_atomic.c \
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hal/src/hal_delay.c \
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hal/src/hal_delay.c \
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hal/src/hal_flash.c \
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hal/src/hal_flash.c \
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hal/src/hal_i2c_m_sync.c \
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hal/src/hal_io.c \
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hal/src/hal_sleep.c \
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hal/src/hal_sleep.c \
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hal/src/hal_timer.c \
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hal/src/hal_timer.c \
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hal/src/hal_usb_device.c \
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hal/src/hal_usb_device.c \
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@ -177,6 +179,7 @@ SRC_ASF := \
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hpl/nvmctrl/hpl_nvmctrl.c \
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hpl/nvmctrl/hpl_nvmctrl.c \
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hpl/pm/hpl_pm.c \
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hpl/pm/hpl_pm.c \
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hpl/rtc/hpl_rtc.c \
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hpl/rtc/hpl_rtc.c \
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hpl/sercom/hpl_sercom.c \
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hpl/systick/hpl_systick.c \
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hpl/systick/hpl_systick.c \
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hpl/tc/hpl_tc.c \
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hpl/tc/hpl_tc.c \
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hpl/usb/hpl_usb.c \
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hpl/usb/hpl_usb.c \
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@ -213,6 +216,7 @@ SRC_C = \
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flash_api.c \
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flash_api.c \
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mphalport.c \
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mphalport.c \
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reset.c \
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reset.c \
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$(CHIP_FAMILY)_peripherals.c \
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$(CHIP_FAMILY)_pins.c \
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$(CHIP_FAMILY)_pins.c \
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tick.c \
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tick.c \
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usb.c \
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usb.c \
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@ -246,6 +250,8 @@ endif
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SRC_COMMON_HAL = \
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SRC_COMMON_HAL = \
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board/__init__.c \
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board/__init__.c \
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busio/__init__.c \
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busio/I2C.c \
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digitalio/__init__.c \
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digitalio/__init__.c \
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digitalio/DigitalInOut.c \
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digitalio/DigitalInOut.c \
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microcontroller/__init__.c \
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microcontroller/__init__.c \
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@ -253,7 +259,7 @@ SRC_COMMON_HAL = \
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microcontroller/Processor.c \
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microcontroller/Processor.c \
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neopixel_write/__init__.c \
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neopixel_write/__init__.c \
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os/__init__.c \
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os/__init__.c \
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time/__init__.c
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time/__init__.c \
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# analogio/__init__.c \
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# analogio/__init__.c \
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analogio/AnalogIn.c \
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analogio/AnalogIn.c \
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analogio/AnalogOut.c \
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analogio/AnalogOut.c \
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@ -261,8 +267,6 @@ SRC_COMMON_HAL = \
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audiobusio/PDMIn.c \
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audiobusio/PDMIn.c \
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audioio/__init__.c \
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audioio/__init__.c \
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audioio/AudioOut.c \
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audioio/AudioOut.c \
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busio/__init__.c \
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busio/I2C.c \
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busio/SPI.c \
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busio/SPI.c \
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busio/UART.c \
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busio/UART.c \
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neopixel_write/__init__.c \
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neopixel_write/__init__.c \
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@ -1 +1 @@
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Subproject commit 1e0e419f197661baa40ce35bc712ce14f0d4a714
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Subproject commit 7ffa51e117eb6d6b6679febfc77e50d03731b467
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@ -0,0 +1,818 @@
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/* Auto-generated config file hpl_sercom_config.h */
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#ifndef HPL_SERCOM_CONFIG_H
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#define HPL_SERCOM_CONFIG_H
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// <<< Use Configuration Wizard in Context Menu >>>
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#include <peripheral_clk_config.h>
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#ifndef SERCOM_I2CM_CTRLA_MODE_I2C_MASTER
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#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (5 << 2)
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#endif
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#ifndef CONF_SERCOM_0_I2CM_ENABLE
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#define CONF_SERCOM_0_I2CM_ENABLE 1
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#endif
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// <h> Basic
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// <o> I2C Bus clock speed (Hz) <1-400000>
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// <i> I2C Bus clock (SCL) speed measured in Hz
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// <id> i2c_master_baud_rate
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#ifndef CONF_SERCOM_0_I2CM_BAUD
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#define CONF_SERCOM_0_I2CM_BAUD 100000
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#endif
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// </h>
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// <e> Advanced
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// <id> i2c_master_advanced
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#ifndef CONF_SERCOM_0_I2CM_ADVANCED_CONFIG
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#define CONF_SERCOM_0_I2CM_ADVANCED_CONFIG 0
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#endif
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// <o> TRise (ns) <0-300>
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// <i> Determined by the bus impedance, check electric characteristics in the datasheet
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// <i> Standard Fast Mode: typical 215ns, max 300ns
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// <i> Fast Mode +: typical 60ns, max 100ns
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// <i> High Speed Mode: typical 20ns, max 40ns
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// <id> i2c_master_arch_trise
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#ifndef CONF_SERCOM_0_I2CM_TRISE
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#define CONF_SERCOM_0_I2CM_TRISE 215
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#endif
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// <q> Master SCL Low Extended Time-Out (MEXTTOEN)
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// <i> This enables the master SCL low extend time-out
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// <id> i2c_master_arch_mexttoen
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#ifndef CONF_SERCOM_0_I2CM_MEXTTOEN
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#define CONF_SERCOM_0_I2CM_MEXTTOEN 0
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#endif
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// <q> Slave SCL Low Extend Time-Out (SEXTTOEN)
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// <i> Enables the slave SCL low extend time-out. If SCL is cumulatively held low for greater than 25ms from the initial START to a STOP, the slave will release its clock hold if enabled and reset the internal state machine
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// <id> i2c_master_arch_sexttoen
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#ifndef CONF_SERCOM_0_I2CM_SEXTTOEN
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#define CONF_SERCOM_0_I2CM_SEXTTOEN 0
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#endif
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// <q> SCL Low Time-Out (LOWTOUT)
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// <i> Enables SCL low time-out. If SCL is held low for 25ms-35ms, the master will release it's clock hold
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// <id> i2c_master_arch_lowtout
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#ifndef CONF_SERCOM_0_I2CM_LOWTOUT
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#define CONF_SERCOM_0_I2CM_LOWTOUT 0
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#endif
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// <o> Inactive Time-Out (INACTOUT)
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// <0x0=>Disabled
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// <0x1=>5-6 SCL cycle time-out(50-60us)
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// <0x2=>10-11 SCL cycle time-out(100-110us)
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// <0x3=>20-21 SCL cycle time-out(200-210us)
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// <i> Defines if inactivity time-out should be enabled, and how long the time-out should be
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// <id> i2c_master_arch_inactout
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#ifndef CONF_SERCOM_0_I2CM_INACTOUT
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#define CONF_SERCOM_0_I2CM_INACTOUT 0x0
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#endif
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// <o> SDA Hold Time (SDAHOLD)
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// <0=>Disabled
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// <1=>50-100ns hold time
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// <2=>300-600ns hold time
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// <3=>400-800ns hold time
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// <i> Defines the SDA hold time with respect to the negative edge of SCL
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// <id> i2c_master_arch_sdahold
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#ifndef CONF_SERCOM_0_I2CM_SDAHOLD
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#define CONF_SERCOM_0_I2CM_SDAHOLD 0x2
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#endif
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// <q> Run in stand-by
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// <i> Determine if the module shall run in standby sleep mode
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// <id> i2c_master_arch_runstdby
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#ifndef CONF_SERCOM_0_I2CM_RUNSTDBY
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#define CONF_SERCOM_0_I2CM_RUNSTDBY 0
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#endif
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// <o> Debug Stop Mode
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// <i> Behavior of the baud-rate generator when CPU is halted by external debugger.
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// <0=>Keep running
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// <1=>Halt
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// <id> i2c_master_arch_dbgstop
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#ifndef CONF_SERCOM_0_I2CM_DEBUG_STOP_MODE
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#define CONF_SERCOM_0_I2CM_DEBUG_STOP_MODE 0
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#endif
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// </e>
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#ifndef CONF_SERCOM_0_I2CM_SPEED
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#define CONF_SERCOM_0_I2CM_SPEED 0x00 // Speed: Standard/Fast mode
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#endif
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#if CONF_SERCOM_0_I2CM_TRISE < 215 || CONF_SERCOM_0_I2CM_TRISE > 300
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#warning Bad I2C Rise time for Standard/Fast mode, reset to 215ns
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#undef CONF_SERCOM_0_I2CM_TRISE
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#define CONF_SERCOM_0_I2CM_TRISE 215
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#endif
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// gclk_freq - (i2c_scl_freq * 10) - (gclk_freq * i2c_scl_freq * Trise)
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// BAUD + BAUDLOW = --------------------------------------------------------------------
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// i2c_scl_freq
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// BAUD: register value low [7:0]
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// BAUDLOW: register value high [15:8], only used for odd BAUD + BAUDLOW
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#define CONF_SERCOM_0_I2CM_BAUD_BAUDLOW \
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(((CONF_GCLK_SERCOM0_CORE_FREQUENCY - (CONF_SERCOM_0_I2CM_BAUD * 10) \
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- (CONF_SERCOM_0_I2CM_TRISE * (CONF_SERCOM_0_I2CM_BAUD / 100) * (CONF_GCLK_SERCOM0_CORE_FREQUENCY / 10000) \
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/ 1000)) \
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* 10 \
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+ 5) \
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/ (CONF_SERCOM_0_I2CM_BAUD * 10))
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#ifndef CONF_SERCOM_0_I2CM_BAUD_RATE
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#if CONF_SERCOM_0_I2CM_BAUD_BAUDLOW > (0xFF * 2)
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//#warning Requested I2C baudrate too low, please check
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#define CONF_SERCOM_0_I2CM_BAUD_RATE 0xFF
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#elif CONF_SERCOM_0_I2CM_BAUD_BAUDLOW <= 1
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//#warning Requested I2C baudrate too high, please check
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#define CONF_SERCOM_0_I2CM_BAUD_RATE 1
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#else
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#define CONF_SERCOM_0_I2CM_BAUD_RATE \
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((CONF_SERCOM_0_I2CM_BAUD_BAUDLOW & 0x1) \
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? (CONF_SERCOM_0_I2CM_BAUD_BAUDLOW / 2) + ((CONF_SERCOM_0_I2CM_BAUD_BAUDLOW / 2 + 1) << 8) \
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: (CONF_SERCOM_0_I2CM_BAUD_BAUDLOW / 2))
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#endif
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#endif
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#include <peripheral_clk_config.h>
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#ifndef SERCOM_I2CM_CTRLA_MODE_I2C_MASTER
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#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (5 << 2)
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#endif
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#ifndef CONF_SERCOM_1_I2CM_ENABLE
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#define CONF_SERCOM_1_I2CM_ENABLE 1
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#endif
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// <h> Basic
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// <o> I2C Bus clock speed (Hz) <1-400000>
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// <i> I2C Bus clock (SCL) speed measured in Hz
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// <id> i2c_master_baud_rate
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#ifndef CONF_SERCOM_1_I2CM_BAUD
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#define CONF_SERCOM_1_I2CM_BAUD 100000
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#endif
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// </h>
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// <e> Advanced
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// <id> i2c_master_advanced
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#ifndef CONF_SERCOM_1_I2CM_ADVANCED_CONFIG
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#define CONF_SERCOM_1_I2CM_ADVANCED_CONFIG 0
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#endif
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// <o> TRise (ns) <0-300>
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// <i> Determined by the bus impedance, check electric characteristics in the datasheet
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// <i> Standard Fast Mode: typical 215ns, max 300ns
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// <i> Fast Mode +: typical 60ns, max 100ns
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// <i> High Speed Mode: typical 20ns, max 40ns
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// <id> i2c_master_arch_trise
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#ifndef CONF_SERCOM_1_I2CM_TRISE
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#define CONF_SERCOM_1_I2CM_TRISE 215
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#endif
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// <q> Master SCL Low Extended Time-Out (MEXTTOEN)
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// <i> This enables the master SCL low extend time-out
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// <id> i2c_master_arch_mexttoen
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#ifndef CONF_SERCOM_1_I2CM_MEXTTOEN
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#define CONF_SERCOM_1_I2CM_MEXTTOEN 0
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#endif
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// <q> Slave SCL Low Extend Time-Out (SEXTTOEN)
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// <i> Enables the slave SCL low extend time-out. If SCL is cumulatively held low for greater than 25ms from the initial START to a STOP, the slave will release its clock hold if enabled and reset the internal state machine
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// <id> i2c_master_arch_sexttoen
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#ifndef CONF_SERCOM_1_I2CM_SEXTTOEN
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#define CONF_SERCOM_1_I2CM_SEXTTOEN 0
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#endif
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// <q> SCL Low Time-Out (LOWTOUT)
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// <i> Enables SCL low time-out. If SCL is held low for 25ms-35ms, the master will release it's clock hold
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// <id> i2c_master_arch_lowtout
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#ifndef CONF_SERCOM_1_I2CM_LOWTOUT
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#define CONF_SERCOM_1_I2CM_LOWTOUT 0
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#endif
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// <o> Inactive Time-Out (INACTOUT)
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// <0x0=>Disabled
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// <0x1=>5-6 SCL cycle time-out(50-60us)
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// <0x2=>10-11 SCL cycle time-out(100-110us)
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// <0x3=>20-21 SCL cycle time-out(200-210us)
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// <i> Defines if inactivity time-out should be enabled, and how long the time-out should be
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// <id> i2c_master_arch_inactout
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#ifndef CONF_SERCOM_1_I2CM_INACTOUT
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#define CONF_SERCOM_1_I2CM_INACTOUT 0x0
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#endif
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// <o> SDA Hold Time (SDAHOLD)
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// <0=>Disabled
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// <1=>50-100ns hold time
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// <2=>300-600ns hold time
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// <3=>400-800ns hold time
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// <i> Defines the SDA hold time with respect to the negative edge of SCL
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// <id> i2c_master_arch_sdahold
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#ifndef CONF_SERCOM_1_I2CM_SDAHOLD
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#define CONF_SERCOM_1_I2CM_SDAHOLD 0x2
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#endif
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// <q> Run in stand-by
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// <i> Determine if the module shall run in standby sleep mode
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// <id> i2c_master_arch_runstdby
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#ifndef CONF_SERCOM_1_I2CM_RUNSTDBY
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#define CONF_SERCOM_1_I2CM_RUNSTDBY 0
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#endif
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// <o> Debug Stop Mode
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// <i> Behavior of the baud-rate generator when CPU is halted by external debugger.
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// <0=>Keep running
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// <1=>Halt
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// <id> i2c_master_arch_dbgstop
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#ifndef CONF_SERCOM_1_I2CM_DEBUG_STOP_MODE
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#define CONF_SERCOM_1_I2CM_DEBUG_STOP_MODE 0
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#endif
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// </e>
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||||||
|
#ifndef CONF_SERCOM_1_I2CM_SPEED
|
||||||
|
#define CONF_SERCOM_1_I2CM_SPEED 0x00 // Speed: Standard/Fast mode
|
||||||
|
#endif
|
||||||
|
#if CONF_SERCOM_1_I2CM_TRISE < 215 || CONF_SERCOM_1_I2CM_TRISE > 300
|
||||||
|
//#warning Bad I2C Rise time for Standard/Fast mode, reset to 215ns
|
||||||
|
#undef CONF_SERCOM_1_I2CM_TRISE
|
||||||
|
#define CONF_SERCOM_1_I2CM_TRISE 215
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// gclk_freq - (i2c_scl_freq * 10) - (gclk_freq * i2c_scl_freq * Trise)
|
||||||
|
// BAUD + BAUDLOW = --------------------------------------------------------------------
|
||||||
|
// i2c_scl_freq
|
||||||
|
// BAUD: register value low [7:0]
|
||||||
|
// BAUDLOW: register value high [15:8], only used for odd BAUD + BAUDLOW
|
||||||
|
#define CONF_SERCOM_1_I2CM_BAUD_BAUDLOW \
|
||||||
|
(((CONF_GCLK_SERCOM1_CORE_FREQUENCY - (CONF_SERCOM_1_I2CM_BAUD * 10) \
|
||||||
|
- (CONF_SERCOM_1_I2CM_TRISE * (CONF_SERCOM_1_I2CM_BAUD / 100) * (CONF_GCLK_SERCOM1_CORE_FREQUENCY / 10000) \
|
||||||
|
/ 1000)) \
|
||||||
|
* 10 \
|
||||||
|
+ 5) \
|
||||||
|
/ (CONF_SERCOM_1_I2CM_BAUD * 10))
|
||||||
|
#ifndef CONF_SERCOM_1_I2CM_BAUD_RATE
|
||||||
|
#if CONF_SERCOM_1_I2CM_BAUD_BAUDLOW > (0xFF * 2)
|
||||||
|
//#warning Requested I2C baudrate too low, please check
|
||||||
|
#define CONF_SERCOM_1_I2CM_BAUD_RATE 0xFF
|
||||||
|
#elif CONF_SERCOM_1_I2CM_BAUD_BAUDLOW <= 1
|
||||||
|
//#warning Requested I2C baudrate too high, please check
|
||||||
|
#define CONF_SERCOM_1_I2CM_BAUD_RATE 1
|
||||||
|
#else
|
||||||
|
#define CONF_SERCOM_1_I2CM_BAUD_RATE \
|
||||||
|
((CONF_SERCOM_1_I2CM_BAUD_BAUDLOW & 0x1) \
|
||||||
|
? (CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2) + ((CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2 + 1) << 8) \
|
||||||
|
: (CONF_SERCOM_1_I2CM_BAUD_BAUDLOW / 2))
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <peripheral_clk_config.h>
|
||||||
|
|
||||||
|
#ifndef SERCOM_I2CM_CTRLA_MODE_I2C_MASTER
|
||||||
|
#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (5 << 2)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_ENABLE
|
||||||
|
#define CONF_SERCOM_2_I2CM_ENABLE 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <h> Basic
|
||||||
|
|
||||||
|
// <o> I2C Bus clock speed (Hz) <1-400000>
|
||||||
|
// <i> I2C Bus clock (SCL) speed measured in Hz
|
||||||
|
// <id> i2c_master_baud_rate
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_BAUD
|
||||||
|
#define CONF_SERCOM_2_I2CM_BAUD 100000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// </h>
|
||||||
|
|
||||||
|
// <e> Advanced
|
||||||
|
// <id> i2c_master_advanced
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_ADVANCED_CONFIG
|
||||||
|
#define CONF_SERCOM_2_I2CM_ADVANCED_CONFIG 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> TRise (ns) <0-300>
|
||||||
|
// <i> Determined by the bus impedance, check electric characteristics in the datasheet
|
||||||
|
// <i> Standard Fast Mode: typical 215ns, max 300ns
|
||||||
|
// <i> Fast Mode +: typical 60ns, max 100ns
|
||||||
|
// <i> High Speed Mode: typical 20ns, max 40ns
|
||||||
|
// <id> i2c_master_arch_trise
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_TRISE
|
||||||
|
#define CONF_SERCOM_2_I2CM_TRISE 215
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Master SCL Low Extended Time-Out (MEXTTOEN)
|
||||||
|
// <i> This enables the master SCL low extend time-out
|
||||||
|
// <id> i2c_master_arch_mexttoen
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_MEXTTOEN
|
||||||
|
#define CONF_SERCOM_2_I2CM_MEXTTOEN 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Slave SCL Low Extend Time-Out (SEXTTOEN)
|
||||||
|
// <i> Enables the slave SCL low extend time-out. If SCL is cumulatively held low for greater than 25ms from the initial START to a STOP, the slave will release its clock hold if enabled and reset the internal state machine
|
||||||
|
// <id> i2c_master_arch_sexttoen
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_SEXTTOEN
|
||||||
|
#define CONF_SERCOM_2_I2CM_SEXTTOEN 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> SCL Low Time-Out (LOWTOUT)
|
||||||
|
// <i> Enables SCL low time-out. If SCL is held low for 25ms-35ms, the master will release it's clock hold
|
||||||
|
// <id> i2c_master_arch_lowtout
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_LOWTOUT
|
||||||
|
#define CONF_SERCOM_2_I2CM_LOWTOUT 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> Inactive Time-Out (INACTOUT)
|
||||||
|
// <0x0=>Disabled
|
||||||
|
// <0x1=>5-6 SCL cycle time-out(50-60us)
|
||||||
|
// <0x2=>10-11 SCL cycle time-out(100-110us)
|
||||||
|
// <0x3=>20-21 SCL cycle time-out(200-210us)
|
||||||
|
// <i> Defines if inactivity time-out should be enabled, and how long the time-out should be
|
||||||
|
// <id> i2c_master_arch_inactout
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_INACTOUT
|
||||||
|
#define CONF_SERCOM_2_I2CM_INACTOUT 0x0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> SDA Hold Time (SDAHOLD)
|
||||||
|
// <0=>Disabled
|
||||||
|
// <1=>50-100ns hold time
|
||||||
|
// <2=>300-600ns hold time
|
||||||
|
// <3=>400-800ns hold time
|
||||||
|
// <i> Defines the SDA hold time with respect to the negative edge of SCL
|
||||||
|
// <id> i2c_master_arch_sdahold
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_SDAHOLD
|
||||||
|
#define CONF_SERCOM_2_I2CM_SDAHOLD 0x2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Run in stand-by
|
||||||
|
// <i> Determine if the module shall run in standby sleep mode
|
||||||
|
// <id> i2c_master_arch_runstdby
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_RUNSTDBY
|
||||||
|
#define CONF_SERCOM_2_I2CM_RUNSTDBY 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> Debug Stop Mode
|
||||||
|
// <i> Behavior of the baud-rate generator when CPU is halted by external debugger.
|
||||||
|
// <0=>Keep running
|
||||||
|
// <1=>Halt
|
||||||
|
// <id> i2c_master_arch_dbgstop
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_DEBUG_STOP_MODE
|
||||||
|
#define CONF_SERCOM_2_I2CM_DEBUG_STOP_MODE 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// </e>
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_SPEED
|
||||||
|
#define CONF_SERCOM_2_I2CM_SPEED 0x00 // Speed: Standard/Fast mode
|
||||||
|
#endif
|
||||||
|
#if CONF_SERCOM_2_I2CM_TRISE < 215 || CONF_SERCOM_2_I2CM_TRISE > 300
|
||||||
|
//#warning Bad I2C Rise time for Standard/Fast mode, reset to 215ns
|
||||||
|
#undef CONF_SERCOM_2_I2CM_TRISE
|
||||||
|
#define CONF_SERCOM_2_I2CM_TRISE 215
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// gclk_freq - (i2c_scl_freq * 10) - (gclk_freq * i2c_scl_freq * Trise)
|
||||||
|
// BAUD + BAUDLOW = --------------------------------------------------------------------
|
||||||
|
// i2c_scl_freq
|
||||||
|
// BAUD: register value low [7:0]
|
||||||
|
// BAUDLOW: register value high [15:8], only used for odd BAUD + BAUDLOW
|
||||||
|
#define CONF_SERCOM_2_I2CM_BAUD_BAUDLOW \
|
||||||
|
(((CONF_GCLK_SERCOM2_CORE_FREQUENCY - (CONF_SERCOM_2_I2CM_BAUD * 10) \
|
||||||
|
- (CONF_SERCOM_2_I2CM_TRISE * (CONF_SERCOM_2_I2CM_BAUD / 100) * (CONF_GCLK_SERCOM2_CORE_FREQUENCY / 10000) \
|
||||||
|
/ 1000)) \
|
||||||
|
* 10 \
|
||||||
|
+ 5) \
|
||||||
|
/ (CONF_SERCOM_2_I2CM_BAUD * 10))
|
||||||
|
#ifndef CONF_SERCOM_2_I2CM_BAUD_RATE
|
||||||
|
#if CONF_SERCOM_2_I2CM_BAUD_BAUDLOW > (0xFF * 2)
|
||||||
|
//#warning Requested I2C baudrate too low, please check
|
||||||
|
#define CONF_SERCOM_2_I2CM_BAUD_RATE 0xFF
|
||||||
|
#elif CONF_SERCOM_2_I2CM_BAUD_BAUDLOW <= 1
|
||||||
|
//#warning Requested I2C baudrate too high, please check
|
||||||
|
#define CONF_SERCOM_2_I2CM_BAUD_RATE 1
|
||||||
|
#else
|
||||||
|
#define CONF_SERCOM_2_I2CM_BAUD_RATE \
|
||||||
|
((CONF_SERCOM_2_I2CM_BAUD_BAUDLOW & 0x1) \
|
||||||
|
? (CONF_SERCOM_2_I2CM_BAUD_BAUDLOW / 2) + ((CONF_SERCOM_2_I2CM_BAUD_BAUDLOW / 2 + 1) << 8) \
|
||||||
|
: (CONF_SERCOM_2_I2CM_BAUD_BAUDLOW / 2))
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <peripheral_clk_config.h>
|
||||||
|
|
||||||
|
#ifndef SERCOM_I2CM_CTRLA_MODE_I2C_MASTER
|
||||||
|
#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (5 << 2)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_ENABLE
|
||||||
|
#define CONF_SERCOM_3_I2CM_ENABLE 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <h> Basic
|
||||||
|
|
||||||
|
// <o> I2C Bus clock speed (Hz) <1-400000>
|
||||||
|
// <i> I2C Bus clock (SCL) speed measured in Hz
|
||||||
|
// <id> i2c_master_baud_rate
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_BAUD
|
||||||
|
#define CONF_SERCOM_3_I2CM_BAUD 100000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// </h>
|
||||||
|
|
||||||
|
// <e> Advanced
|
||||||
|
// <id> i2c_master_advanced
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_ADVANCED_CONFIG
|
||||||
|
#define CONF_SERCOM_3_I2CM_ADVANCED_CONFIG 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> TRise (ns) <0-300>
|
||||||
|
// <i> Determined by the bus impedance, check electric characteristics in the datasheet
|
||||||
|
// <i> Standard Fast Mode: typical 215ns, max 300ns
|
||||||
|
// <i> Fast Mode +: typical 60ns, max 100ns
|
||||||
|
// <i> High Speed Mode: typical 20ns, max 40ns
|
||||||
|
// <id> i2c_master_arch_trise
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_TRISE
|
||||||
|
#define CONF_SERCOM_3_I2CM_TRISE 215
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Master SCL Low Extended Time-Out (MEXTTOEN)
|
||||||
|
// <i> This enables the master SCL low extend time-out
|
||||||
|
// <id> i2c_master_arch_mexttoen
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_MEXTTOEN
|
||||||
|
#define CONF_SERCOM_3_I2CM_MEXTTOEN 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Slave SCL Low Extend Time-Out (SEXTTOEN)
|
||||||
|
// <i> Enables the slave SCL low extend time-out. If SCL is cumulatively held low for greater than 25ms from the initial START to a STOP, the slave will release its clock hold if enabled and reset the internal state machine
|
||||||
|
// <id> i2c_master_arch_sexttoen
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_SEXTTOEN
|
||||||
|
#define CONF_SERCOM_3_I2CM_SEXTTOEN 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> SCL Low Time-Out (LOWTOUT)
|
||||||
|
// <i> Enables SCL low time-out. If SCL is held low for 25ms-35ms, the master will release it's clock hold
|
||||||
|
// <id> i2c_master_arch_lowtout
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_LOWTOUT
|
||||||
|
#define CONF_SERCOM_3_I2CM_LOWTOUT 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> Inactive Time-Out (INACTOUT)
|
||||||
|
// <0x0=>Disabled
|
||||||
|
// <0x1=>5-6 SCL cycle time-out(50-60us)
|
||||||
|
// <0x2=>10-11 SCL cycle time-out(100-110us)
|
||||||
|
// <0x3=>20-21 SCL cycle time-out(200-210us)
|
||||||
|
// <i> Defines if inactivity time-out should be enabled, and how long the time-out should be
|
||||||
|
// <id> i2c_master_arch_inactout
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_INACTOUT
|
||||||
|
#define CONF_SERCOM_3_I2CM_INACTOUT 0x0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> SDA Hold Time (SDAHOLD)
|
||||||
|
// <0=>Disabled
|
||||||
|
// <1=>50-100ns hold time
|
||||||
|
// <2=>300-600ns hold time
|
||||||
|
// <3=>400-800ns hold time
|
||||||
|
// <i> Defines the SDA hold time with respect to the negative edge of SCL
|
||||||
|
// <id> i2c_master_arch_sdahold
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_SDAHOLD
|
||||||
|
#define CONF_SERCOM_3_I2CM_SDAHOLD 0x2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Run in stand-by
|
||||||
|
// <i> Determine if the module shall run in standby sleep mode
|
||||||
|
// <id> i2c_master_arch_runstdby
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_RUNSTDBY
|
||||||
|
#define CONF_SERCOM_3_I2CM_RUNSTDBY 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> Debug Stop Mode
|
||||||
|
// <i> Behavior of the baud-rate generator when CPU is halted by external debugger.
|
||||||
|
// <0=>Keep running
|
||||||
|
// <1=>Halt
|
||||||
|
// <id> i2c_master_arch_dbgstop
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_DEBUG_STOP_MODE
|
||||||
|
#define CONF_SERCOM_3_I2CM_DEBUG_STOP_MODE 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// </e>
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_SPEED
|
||||||
|
#define CONF_SERCOM_3_I2CM_SPEED 0x00 // Speed: Standard/Fast mode
|
||||||
|
#endif
|
||||||
|
#if CONF_SERCOM_3_I2CM_TRISE < 215 || CONF_SERCOM_3_I2CM_TRISE > 300
|
||||||
|
//#warning Bad I2C Rise time for Standard/Fast mode, reset to 215ns
|
||||||
|
#undef CONF_SERCOM_3_I2CM_TRISE
|
||||||
|
#define CONF_SERCOM_3_I2CM_TRISE 215
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// gclk_freq - (i2c_scl_freq * 10) - (gclk_freq * i2c_scl_freq * Trise)
|
||||||
|
// BAUD + BAUDLOW = --------------------------------------------------------------------
|
||||||
|
// i2c_scl_freq
|
||||||
|
// BAUD: register value low [7:0]
|
||||||
|
// BAUDLOW: register value high [15:8], only used for odd BAUD + BAUDLOW
|
||||||
|
#define CONF_SERCOM_3_I2CM_BAUD_BAUDLOW \
|
||||||
|
(((CONF_GCLK_SERCOM3_CORE_FREQUENCY - (CONF_SERCOM_3_I2CM_BAUD * 10) \
|
||||||
|
- (CONF_SERCOM_3_I2CM_TRISE * (CONF_SERCOM_3_I2CM_BAUD / 100) * (CONF_GCLK_SERCOM3_CORE_FREQUENCY / 10000) \
|
||||||
|
/ 1000)) \
|
||||||
|
* 10 \
|
||||||
|
+ 5) \
|
||||||
|
/ (CONF_SERCOM_3_I2CM_BAUD * 10))
|
||||||
|
#ifndef CONF_SERCOM_3_I2CM_BAUD_RATE
|
||||||
|
#if CONF_SERCOM_3_I2CM_BAUD_BAUDLOW > (0xFF * 2)
|
||||||
|
//#warning Requested I2C baudrate too low, please check
|
||||||
|
#define CONF_SERCOM_3_I2CM_BAUD_RATE 0xFF
|
||||||
|
#elif CONF_SERCOM_3_I2CM_BAUD_BAUDLOW <= 1
|
||||||
|
//#warning Requested I2C baudrate too high, please check
|
||||||
|
#define CONF_SERCOM_3_I2CM_BAUD_RATE 1
|
||||||
|
#else
|
||||||
|
#define CONF_SERCOM_3_I2CM_BAUD_RATE \
|
||||||
|
((CONF_SERCOM_3_I2CM_BAUD_BAUDLOW & 0x1) \
|
||||||
|
? (CONF_SERCOM_3_I2CM_BAUD_BAUDLOW / 2) + ((CONF_SERCOM_3_I2CM_BAUD_BAUDLOW / 2 + 1) << 8) \
|
||||||
|
: (CONF_SERCOM_3_I2CM_BAUD_BAUDLOW / 2))
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <peripheral_clk_config.h>
|
||||||
|
|
||||||
|
#ifndef SERCOM_I2CM_CTRLA_MODE_I2C_MASTER
|
||||||
|
#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (5 << 2)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_ENABLE
|
||||||
|
#define CONF_SERCOM_4_I2CM_ENABLE 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <h> Basic
|
||||||
|
|
||||||
|
// <o> I2C Bus clock speed (Hz) <1-400000>
|
||||||
|
// <i> I2C Bus clock (SCL) speed measured in Hz
|
||||||
|
// <id> i2c_master_baud_rate
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_BAUD
|
||||||
|
#define CONF_SERCOM_4_I2CM_BAUD 100000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// </h>
|
||||||
|
|
||||||
|
// <e> Advanced
|
||||||
|
// <id> i2c_master_advanced
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_ADVANCED_CONFIG
|
||||||
|
#define CONF_SERCOM_4_I2CM_ADVANCED_CONFIG 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> TRise (ns) <0-300>
|
||||||
|
// <i> Determined by the bus impedance, check electric characteristics in the datasheet
|
||||||
|
// <i> Standard Fast Mode: typical 215ns, max 300ns
|
||||||
|
// <i> Fast Mode +: typical 60ns, max 100ns
|
||||||
|
// <i> High Speed Mode: typical 20ns, max 40ns
|
||||||
|
// <id> i2c_master_arch_trise
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_TRISE
|
||||||
|
#define CONF_SERCOM_4_I2CM_TRISE 215
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Master SCL Low Extended Time-Out (MEXTTOEN)
|
||||||
|
// <i> This enables the master SCL low extend time-out
|
||||||
|
// <id> i2c_master_arch_mexttoen
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_MEXTTOEN
|
||||||
|
#define CONF_SERCOM_4_I2CM_MEXTTOEN 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Slave SCL Low Extend Time-Out (SEXTTOEN)
|
||||||
|
// <i> Enables the slave SCL low extend time-out. If SCL is cumulatively held low for greater than 25ms from the initial START to a STOP, the slave will release its clock hold if enabled and reset the internal state machine
|
||||||
|
// <id> i2c_master_arch_sexttoen
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_SEXTTOEN
|
||||||
|
#define CONF_SERCOM_4_I2CM_SEXTTOEN 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> SCL Low Time-Out (LOWTOUT)
|
||||||
|
// <i> Enables SCL low time-out. If SCL is held low for 25ms-35ms, the master will release it's clock hold
|
||||||
|
// <id> i2c_master_arch_lowtout
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_LOWTOUT
|
||||||
|
#define CONF_SERCOM_4_I2CM_LOWTOUT 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> Inactive Time-Out (INACTOUT)
|
||||||
|
// <0x0=>Disabled
|
||||||
|
// <0x1=>5-6 SCL cycle time-out(50-60us)
|
||||||
|
// <0x2=>10-11 SCL cycle time-out(100-110us)
|
||||||
|
// <0x3=>20-21 SCL cycle time-out(200-210us)
|
||||||
|
// <i> Defines if inactivity time-out should be enabled, and how long the time-out should be
|
||||||
|
// <id> i2c_master_arch_inactout
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_INACTOUT
|
||||||
|
#define CONF_SERCOM_4_I2CM_INACTOUT 0x0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> SDA Hold Time (SDAHOLD)
|
||||||
|
// <0=>Disabled
|
||||||
|
// <1=>50-100ns hold time
|
||||||
|
// <2=>300-600ns hold time
|
||||||
|
// <3=>400-800ns hold time
|
||||||
|
// <i> Defines the SDA hold time with respect to the negative edge of SCL
|
||||||
|
// <id> i2c_master_arch_sdahold
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_SDAHOLD
|
||||||
|
#define CONF_SERCOM_4_I2CM_SDAHOLD 0x2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Run in stand-by
|
||||||
|
// <i> Determine if the module shall run in standby sleep mode
|
||||||
|
// <id> i2c_master_arch_runstdby
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_RUNSTDBY
|
||||||
|
#define CONF_SERCOM_4_I2CM_RUNSTDBY 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> Debug Stop Mode
|
||||||
|
// <i> Behavior of the baud-rate generator when CPU is halted by external debugger.
|
||||||
|
// <0=>Keep running
|
||||||
|
// <1=>Halt
|
||||||
|
// <id> i2c_master_arch_dbgstop
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_DEBUG_STOP_MODE
|
||||||
|
#define CONF_SERCOM_4_I2CM_DEBUG_STOP_MODE 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// </e>
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_SPEED
|
||||||
|
#define CONF_SERCOM_4_I2CM_SPEED 0x00 // Speed: Standard/Fast mode
|
||||||
|
#endif
|
||||||
|
#if CONF_SERCOM_4_I2CM_TRISE < 215 || CONF_SERCOM_4_I2CM_TRISE > 300
|
||||||
|
//#warning Bad I2C Rise time for Standard/Fast mode, reset to 215ns
|
||||||
|
#undef CONF_SERCOM_4_I2CM_TRISE
|
||||||
|
#define CONF_SERCOM_4_I2CM_TRISE 215
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// gclk_freq - (i2c_scl_freq * 10) - (gclk_freq * i2c_scl_freq * Trise)
|
||||||
|
// BAUD + BAUDLOW = --------------------------------------------------------------------
|
||||||
|
// i2c_scl_freq
|
||||||
|
// BAUD: register value low [7:0]
|
||||||
|
// BAUDLOW: register value high [15:8], only used for odd BAUD + BAUDLOW
|
||||||
|
#define CONF_SERCOM_4_I2CM_BAUD_BAUDLOW \
|
||||||
|
(((CONF_GCLK_SERCOM4_CORE_FREQUENCY - (CONF_SERCOM_4_I2CM_BAUD * 10) \
|
||||||
|
- (CONF_SERCOM_4_I2CM_TRISE * (CONF_SERCOM_4_I2CM_BAUD / 100) * (CONF_GCLK_SERCOM4_CORE_FREQUENCY / 10000) \
|
||||||
|
/ 1000)) \
|
||||||
|
* 10 \
|
||||||
|
+ 5) \
|
||||||
|
/ (CONF_SERCOM_4_I2CM_BAUD * 10))
|
||||||
|
#ifndef CONF_SERCOM_4_I2CM_BAUD_RATE
|
||||||
|
#if CONF_SERCOM_4_I2CM_BAUD_BAUDLOW > (0xFF * 2)
|
||||||
|
//#warning Requested I2C baudrate too low, please check
|
||||||
|
#define CONF_SERCOM_4_I2CM_BAUD_RATE 0xFF
|
||||||
|
#elif CONF_SERCOM_4_I2CM_BAUD_BAUDLOW <= 1
|
||||||
|
//#warning Requested I2C baudrate too high, please check
|
||||||
|
#define CONF_SERCOM_4_I2CM_BAUD_RATE 1
|
||||||
|
#else
|
||||||
|
#define CONF_SERCOM_4_I2CM_BAUD_RATE \
|
||||||
|
((CONF_SERCOM_4_I2CM_BAUD_BAUDLOW & 0x1) \
|
||||||
|
? (CONF_SERCOM_4_I2CM_BAUD_BAUDLOW / 2) + ((CONF_SERCOM_4_I2CM_BAUD_BAUDLOW / 2 + 1) << 8) \
|
||||||
|
: (CONF_SERCOM_4_I2CM_BAUD_BAUDLOW / 2))
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#include <peripheral_clk_config.h>
|
||||||
|
|
||||||
|
#ifndef SERCOM_I2CM_CTRLA_MODE_I2C_MASTER
|
||||||
|
#define SERCOM_I2CM_CTRLA_MODE_I2C_MASTER (5 << 2)
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_ENABLE
|
||||||
|
#define CONF_SERCOM_5_I2CM_ENABLE 1
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <h> Basic
|
||||||
|
|
||||||
|
// <o> I2C Bus clock speed (Hz) <1-400000>
|
||||||
|
// <i> I2C Bus clock (SCL) speed measured in Hz
|
||||||
|
// <id> i2c_master_baud_rate
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_BAUD
|
||||||
|
#define CONF_SERCOM_5_I2CM_BAUD 100000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// </h>
|
||||||
|
|
||||||
|
// <e> Advanced
|
||||||
|
// <id> i2c_master_advanced
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_ADVANCED_CONFIG
|
||||||
|
#define CONF_SERCOM_5_I2CM_ADVANCED_CONFIG 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> TRise (ns) <0-300>
|
||||||
|
// <i> Determined by the bus impedance, check electric characteristics in the datasheet
|
||||||
|
// <i> Standard Fast Mode: typical 215ns, max 300ns
|
||||||
|
// <i> Fast Mode +: typical 60ns, max 100ns
|
||||||
|
// <i> High Speed Mode: typical 20ns, max 40ns
|
||||||
|
// <id> i2c_master_arch_trise
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_TRISE
|
||||||
|
#define CONF_SERCOM_5_I2CM_TRISE 215
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Master SCL Low Extended Time-Out (MEXTTOEN)
|
||||||
|
// <i> This enables the master SCL low extend time-out
|
||||||
|
// <id> i2c_master_arch_mexttoen
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_MEXTTOEN
|
||||||
|
#define CONF_SERCOM_5_I2CM_MEXTTOEN 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Slave SCL Low Extend Time-Out (SEXTTOEN)
|
||||||
|
// <i> Enables the slave SCL low extend time-out. If SCL is cumulatively held low for greater than 25ms from the initial START to a STOP, the slave will release its clock hold if enabled and reset the internal state machine
|
||||||
|
// <id> i2c_master_arch_sexttoen
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_SEXTTOEN
|
||||||
|
#define CONF_SERCOM_5_I2CM_SEXTTOEN 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> SCL Low Time-Out (LOWTOUT)
|
||||||
|
// <i> Enables SCL low time-out. If SCL is held low for 25ms-35ms, the master will release it's clock hold
|
||||||
|
// <id> i2c_master_arch_lowtout
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_LOWTOUT
|
||||||
|
#define CONF_SERCOM_5_I2CM_LOWTOUT 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> Inactive Time-Out (INACTOUT)
|
||||||
|
// <0x0=>Disabled
|
||||||
|
// <0x1=>5-6 SCL cycle time-out(50-60us)
|
||||||
|
// <0x2=>10-11 SCL cycle time-out(100-110us)
|
||||||
|
// <0x3=>20-21 SCL cycle time-out(200-210us)
|
||||||
|
// <i> Defines if inactivity time-out should be enabled, and how long the time-out should be
|
||||||
|
// <id> i2c_master_arch_inactout
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_INACTOUT
|
||||||
|
#define CONF_SERCOM_5_I2CM_INACTOUT 0x0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> SDA Hold Time (SDAHOLD)
|
||||||
|
// <0=>Disabled
|
||||||
|
// <1=>50-100ns hold time
|
||||||
|
// <2=>300-600ns hold time
|
||||||
|
// <3=>400-800ns hold time
|
||||||
|
// <i> Defines the SDA hold time with respect to the negative edge of SCL
|
||||||
|
// <id> i2c_master_arch_sdahold
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_SDAHOLD
|
||||||
|
#define CONF_SERCOM_5_I2CM_SDAHOLD 0x2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <q> Run in stand-by
|
||||||
|
// <i> Determine if the module shall run in standby sleep mode
|
||||||
|
// <id> i2c_master_arch_runstdby
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_RUNSTDBY
|
||||||
|
#define CONF_SERCOM_5_I2CM_RUNSTDBY 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <o> Debug Stop Mode
|
||||||
|
// <i> Behavior of the baud-rate generator when CPU is halted by external debugger.
|
||||||
|
// <0=>Keep running
|
||||||
|
// <1=>Halt
|
||||||
|
// <id> i2c_master_arch_dbgstop
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_DEBUG_STOP_MODE
|
||||||
|
#define CONF_SERCOM_5_I2CM_DEBUG_STOP_MODE 0
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// </e>
|
||||||
|
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_SPEED
|
||||||
|
#define CONF_SERCOM_5_I2CM_SPEED 0x00 // Speed: Standard/Fast mode
|
||||||
|
#endif
|
||||||
|
#if CONF_SERCOM_5_I2CM_TRISE < 215 || CONF_SERCOM_5_I2CM_TRISE > 300
|
||||||
|
//#warning Bad I2C Rise time for Standard/Fast mode, reset to 215ns
|
||||||
|
#undef CONF_SERCOM_5_I2CM_TRISE
|
||||||
|
#define CONF_SERCOM_5_I2CM_TRISE 215
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// gclk_freq - (i2c_scl_freq * 10) - (gclk_freq * i2c_scl_freq * Trise)
|
||||||
|
// BAUD + BAUDLOW = --------------------------------------------------------------------
|
||||||
|
// i2c_scl_freq
|
||||||
|
// BAUD: register value low [7:0]
|
||||||
|
// BAUDLOW: register value high [15:8], only used for odd BAUD + BAUDLOW
|
||||||
|
#define CONF_SERCOM_5_I2CM_BAUD_BAUDLOW \
|
||||||
|
(((CONF_GCLK_SERCOM5_CORE_FREQUENCY - (CONF_SERCOM_5_I2CM_BAUD * 10) \
|
||||||
|
- (CONF_SERCOM_5_I2CM_TRISE * (CONF_SERCOM_5_I2CM_BAUD / 100) * (CONF_GCLK_SERCOM5_CORE_FREQUENCY / 10000) \
|
||||||
|
/ 1000)) \
|
||||||
|
* 10 \
|
||||||
|
+ 5) \
|
||||||
|
/ (CONF_SERCOM_5_I2CM_BAUD * 10))
|
||||||
|
#ifndef CONF_SERCOM_5_I2CM_BAUD_RATE
|
||||||
|
#if CONF_SERCOM_5_I2CM_BAUD_BAUDLOW > (0xFF * 2)
|
||||||
|
//#warning Requested I2C baudrate too low, please check
|
||||||
|
#define CONF_SERCOM_5_I2CM_BAUD_RATE 0xFF
|
||||||
|
#elif CONF_SERCOM_5_I2CM_BAUD_BAUDLOW <= 1
|
||||||
|
//#warning Requested I2C baudrate too high, please check
|
||||||
|
#define CONF_SERCOM_5_I2CM_BAUD_RATE 1
|
||||||
|
#else
|
||||||
|
#define CONF_SERCOM_5_I2CM_BAUD_RATE \
|
||||||
|
((CONF_SERCOM_5_I2CM_BAUD_BAUDLOW & 0x1) \
|
||||||
|
? (CONF_SERCOM_5_I2CM_BAUD_BAUDLOW / 2) + ((CONF_SERCOM_5_I2CM_BAUD_BAUDLOW / 2 + 1) << 8) \
|
||||||
|
: (CONF_SERCOM_5_I2CM_BAUD_BAUDLOW / 2))
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <<< end of configuration section >>>
|
||||||
|
|
||||||
|
#endif // HPL_SERCOM_CONFIG_H
|
|
@ -1,41 +1,13 @@
|
||||||
|
// Derived from:
|
||||||
|
// Create START project with using six I2C, then six ...
|
||||||
|
// then merge all.
|
||||||
|
|
||||||
/* Auto-generated config file peripheral_clk_config.h */
|
/* Auto-generated config file peripheral_clk_config.h */
|
||||||
#ifndef PERIPHERAL_CLK_CONFIG_H
|
#ifndef PERIPHERAL_CLK_CONFIG_H
|
||||||
#define PERIPHERAL_CLK_CONFIG_H
|
#define PERIPHERAL_CLK_CONFIG_H
|
||||||
|
|
||||||
// <<< Use Configuration Wizard in Context Menu >>>
|
// <<< Use Configuration Wizard in Context Menu >>>
|
||||||
|
|
||||||
// <y> ADC Clock Source
|
|
||||||
// <id> adc_gclk_selection
|
|
||||||
|
|
||||||
// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_CLKCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_CLKCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <i> Select the clock source for ADC.
|
|
||||||
#ifndef CONF_GCLK_ADC_SRC
|
|
||||||
#define CONF_GCLK_ADC_SRC GCLK_CLKCTRL_GEN_GCLK0_Val
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_ADC_FREQUENCY
|
|
||||||
* \brief ADC's Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_ADC_FREQUENCY
|
|
||||||
#define CONF_GCLK_ADC_FREQUENCY 1000000
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* \def CONF_CPU_FREQUENCY
|
* \def CONF_CPU_FREQUENCY
|
||||||
* \brief CPU's Clock frequency
|
* \brief CPU's Clock frequency
|
||||||
|
@ -97,7 +69,7 @@
|
||||||
* \brief SERCOM0's Core Clock frequency
|
* \brief SERCOM0's Core Clock frequency
|
||||||
*/
|
*/
|
||||||
#ifndef CONF_GCLK_SERCOM0_CORE_FREQUENCY
|
#ifndef CONF_GCLK_SERCOM0_CORE_FREQUENCY
|
||||||
#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 1000000
|
#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 48000000
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -161,7 +133,7 @@
|
||||||
* \brief SERCOM1's Core Clock frequency
|
* \brief SERCOM1's Core Clock frequency
|
||||||
*/
|
*/
|
||||||
#ifndef CONF_GCLK_SERCOM1_CORE_FREQUENCY
|
#ifndef CONF_GCLK_SERCOM1_CORE_FREQUENCY
|
||||||
#define CONF_GCLK_SERCOM1_CORE_FREQUENCY 1000000
|
#define CONF_GCLK_SERCOM1_CORE_FREQUENCY 48000000
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -225,7 +197,7 @@
|
||||||
* \brief SERCOM2's Core Clock frequency
|
* \brief SERCOM2's Core Clock frequency
|
||||||
*/
|
*/
|
||||||
#ifndef CONF_GCLK_SERCOM2_CORE_FREQUENCY
|
#ifndef CONF_GCLK_SERCOM2_CORE_FREQUENCY
|
||||||
#define CONF_GCLK_SERCOM2_CORE_FREQUENCY 1000000
|
#define CONF_GCLK_SERCOM2_CORE_FREQUENCY 48000000
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -236,6 +208,198 @@
|
||||||
#define CONF_GCLK_SERCOM2_SLOW_FREQUENCY 400000
|
#define CONF_GCLK_SERCOM2_SLOW_FREQUENCY 400000
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
// <y> Core Clock Source
|
||||||
|
// <id> core_gclk_selection
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||||
|
|
||||||
|
// <i> Select the clock source for CORE.
|
||||||
|
#ifndef CONF_GCLK_SERCOM3_CORE_SRC
|
||||||
|
#define CONF_GCLK_SERCOM3_CORE_SRC GCLK_CLKCTRL_GEN_GCLK0_Val
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <y> Slow Clock Source
|
||||||
|
// <id> slow_gclk_selection
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||||
|
|
||||||
|
// <i> Select the slow clock source.
|
||||||
|
#ifndef CONF_GCLK_SERCOM3_SLOW_SRC
|
||||||
|
#define CONF_GCLK_SERCOM3_SLOW_SRC GCLK_CLKCTRL_GEN_GCLK3_Val
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONF_GCLK_SERCOM3_CORE_FREQUENCY
|
||||||
|
* \brief SERCOM3's Core Clock frequency
|
||||||
|
*/
|
||||||
|
#ifndef CONF_GCLK_SERCOM3_CORE_FREQUENCY
|
||||||
|
#define CONF_GCLK_SERCOM3_CORE_FREQUENCY 48000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONF_GCLK_SERCOM3_SLOW_FREQUENCY
|
||||||
|
* \brief SERCOM3's Slow Clock frequency
|
||||||
|
*/
|
||||||
|
#ifndef CONF_GCLK_SERCOM3_SLOW_FREQUENCY
|
||||||
|
#define CONF_GCLK_SERCOM3_SLOW_FREQUENCY 400000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <y> Core Clock Source
|
||||||
|
// <id> core_gclk_selection
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||||
|
|
||||||
|
// <i> Select the clock source for CORE.
|
||||||
|
#ifndef CONF_GCLK_SERCOM4_CORE_SRC
|
||||||
|
#define CONF_GCLK_SERCOM4_CORE_SRC GCLK_CLKCTRL_GEN_GCLK0_Val
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <y> Slow Clock Source
|
||||||
|
// <id> slow_gclk_selection
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||||
|
|
||||||
|
// <i> Select the slow clock source.
|
||||||
|
#ifndef CONF_GCLK_SERCOM4_SLOW_SRC
|
||||||
|
#define CONF_GCLK_SERCOM4_SLOW_SRC GCLK_CLKCTRL_GEN_GCLK3_Val
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONF_GCLK_SERCOM4_CORE_FREQUENCY
|
||||||
|
* \brief SERCOM4's Core Clock frequency
|
||||||
|
*/
|
||||||
|
#ifndef CONF_GCLK_SERCOM4_CORE_FREQUENCY
|
||||||
|
#define CONF_GCLK_SERCOM4_CORE_FREQUENCY 48000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONF_GCLK_SERCOM4_SLOW_FREQUENCY
|
||||||
|
* \brief SERCOM4's Slow Clock frequency
|
||||||
|
*/
|
||||||
|
#ifndef CONF_GCLK_SERCOM4_SLOW_FREQUENCY
|
||||||
|
#define CONF_GCLK_SERCOM4_SLOW_FREQUENCY 400000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <y> Core Clock Source
|
||||||
|
// <id> core_gclk_selection
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||||
|
|
||||||
|
// <i> Select the clock source for CORE.
|
||||||
|
#ifndef CONF_GCLK_SERCOM5_CORE_SRC
|
||||||
|
#define CONF_GCLK_SERCOM5_CORE_SRC GCLK_CLKCTRL_GEN_GCLK0_Val
|
||||||
|
#endif
|
||||||
|
|
||||||
|
// <y> Slow Clock Source
|
||||||
|
// <id> slow_gclk_selection
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
||||||
|
|
||||||
|
// <GCLK_CLKCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
||||||
|
|
||||||
|
// <i> Select the slow clock source.
|
||||||
|
#ifndef CONF_GCLK_SERCOM5_SLOW_SRC
|
||||||
|
#define CONF_GCLK_SERCOM5_SLOW_SRC GCLK_CLKCTRL_GEN_GCLK3_Val
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONF_GCLK_SERCOM5_CORE_FREQUENCY
|
||||||
|
* \brief SERCOM5's Core Clock frequency
|
||||||
|
*/
|
||||||
|
#ifndef CONF_GCLK_SERCOM5_CORE_FREQUENCY
|
||||||
|
#define CONF_GCLK_SERCOM5_CORE_FREQUENCY 48000000
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* \def CONF_GCLK_SERCOM5_SLOW_FREQUENCY
|
||||||
|
* \brief SERCOM5's Slow Clock frequency
|
||||||
|
*/
|
||||||
|
#ifndef CONF_GCLK_SERCOM5_SLOW_FREQUENCY
|
||||||
|
#define CONF_GCLK_SERCOM5_SLOW_FREQUENCY 400000
|
||||||
|
#endif
|
||||||
|
|
||||||
// <y> RTC Clock Source
|
// <y> RTC Clock Source
|
||||||
// <id> rtc_clk_selection
|
// <id> rtc_clk_selection
|
||||||
|
|
||||||
|
|
|
@ -3,7 +3,6 @@
|
||||||
// core and main bus. GCLK1 is 48mhz based on DFLL48M which is used for USB.
|
// core and main bus. GCLK1 is 48mhz based on DFLL48M which is used for USB.
|
||||||
// GCLK4 also outputs the 120mhz clock for monitoring.
|
// GCLK4 also outputs the 120mhz clock for monitoring.
|
||||||
|
|
||||||
|
|
||||||
/* Auto-generated config file hpl_gclk_config.h */
|
/* Auto-generated config file hpl_gclk_config.h */
|
||||||
#ifndef HPL_GCLK_CONFIG_H
|
#ifndef HPL_GCLK_CONFIG_H
|
||||||
#define HPL_GCLK_CONFIG_H
|
#define HPL_GCLK_CONFIG_H
|
||||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,926 +1,113 @@
|
||||||
/* Auto-generated config file peripheral_clk_config.h */
|
// Derived from: Auto-generated config file peripheral_clk_config.h
|
||||||
|
// Boilerplate removed.
|
||||||
|
|
||||||
#ifndef PERIPHERAL_CLK_CONFIG_H
|
#ifndef PERIPHERAL_CLK_CONFIG_H
|
||||||
#define PERIPHERAL_CLK_CONFIG_H
|
#define PERIPHERAL_CLK_CONFIG_H
|
||||||
|
|
||||||
// <<< Use Configuration Wizard in Context Menu >>>
|
// ADC
|
||||||
|
|
||||||
// <y> ADC Clock Source
|
|
||||||
// <id> adc_gclk_selection
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for ADC.
|
|
||||||
#ifndef CONF_GCLK_ADC0_SRC
|
|
||||||
#define CONF_GCLK_ADC0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_ADC0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_ADC0_FREQUENCY
|
|
||||||
* \brief ADC0's Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_ADC0_FREQUENCY
|
|
||||||
#define CONF_GCLK_ADC0_FREQUENCY 120000000
|
#define CONF_GCLK_ADC0_FREQUENCY 120000000
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> DAC Clock Source
|
// DAC
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <id> dac_gclk_selection
|
|
||||||
// <i> Select the clock source for DAC.
|
|
||||||
#ifndef CONF_GCLK_DAC_SRC
|
|
||||||
#define CONF_GCLK_DAC_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_DAC_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_DAC_FREQUENCY
|
|
||||||
* \brief DAC's Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_DAC_FREQUENCY
|
|
||||||
#define CONF_GCLK_DAC_FREQUENCY 120000000
|
#define CONF_GCLK_DAC_FREQUENCY 120000000
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 0 Clock Source
|
// EVSYS
|
||||||
// <id> evsys_clk_selection_0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 0.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_0_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_0_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 1 Clock Source
|
|
||||||
// <id> evsys_clk_selection_1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 1.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_1_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_1_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_1_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_1_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 2 Clock Source
|
|
||||||
// <id> evsys_clk_selection_2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 2.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_2_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_2_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_2_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_2_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 3 Clock Source
|
|
||||||
// <id> evsys_clk_selection_3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 3.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_3_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_3_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_3_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_3_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 4 Clock Source
|
|
||||||
// <id> evsys_clk_selection_4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 4.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_4_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_4_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_4_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_4_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 5 Clock Source
|
|
||||||
// <id> evsys_clk_selection_5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 5.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_5_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_5_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_5_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_5_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 6 Clock Source
|
|
||||||
// <id> evsys_clk_selection_6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 6.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_6_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_6_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_6_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_6_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 7 Clock Source
|
|
||||||
// <id> evsys_clk_selection_7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 7.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_7_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_7_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_7_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_7_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 8 Clock Source
|
|
||||||
// <id> evsys_clk_selection_8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 8.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_8_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_8_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_8_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_8_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 9 Clock Source
|
|
||||||
// <id> evsys_clk_selection_9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 9.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_9_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_9_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_9_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_9_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 10 Clock Source
|
|
||||||
// <id> evsys_clk_selection_10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 10.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_10_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_10_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_10_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_10_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> EVSYS Channel 11 Clock Source
|
|
||||||
// <id> evsys_clk_selection_11
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for channel 11.
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_11_SRC
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_11_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_EVSYS_CHANNEL_11_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY
|
|
||||||
* \brief EVSYS's Clock frequency
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY
|
|
||||||
#define CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY 120000000.0
|
#define CONF_GCLK_EVSYS_CHANNEL_11_FREQUENCY 120000000.0
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
// CPU: 120 MHz
|
||||||
* \def CONF_CPU_FREQUENCY
|
|
||||||
* \brief CPU's Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_CPU_FREQUENCY
|
|
||||||
#define CONF_CPU_FREQUENCY 120000000
|
#define CONF_CPU_FREQUENCY 120000000
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> RTC Clock Source
|
// RTC
|
||||||
// <id> rtc_clk_selection
|
|
||||||
// <RTC_CLOCK_SOURCE"> RTC source
|
|
||||||
// <i> Select the clock source for RTC.
|
|
||||||
#ifndef CONF_GCLK_RTC_SRC
|
|
||||||
#define CONF_GCLK_RTC_SRC RTC_CLOCK_SOURCE
|
#define CONF_GCLK_RTC_SRC RTC_CLOCK_SOURCE
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_RTC_FREQUENCY
|
|
||||||
* \brief RTC's Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_RTC_FREQUENCY
|
|
||||||
#define CONF_GCLK_RTC_FREQUENCY 1024
|
#define CONF_GCLK_RTC_FREQUENCY 1024
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> Core Clock Source
|
|
||||||
// <id> core_gclk_selection
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
// SERCOM
|
||||||
|
// Use 48 MHz clock for CORE, and 32kHz clock for SLOW.
|
||||||
|
// 120 MHz is too fast for CORE.
|
||||||
|
// Slow is only needed for SMBus, it appears.
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
#define CONF_GCLK_SERCOM0_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for CORE.
|
|
||||||
#ifndef CONF_GCLK_SERCOM0_CORE_SRC
|
|
||||||
#define CONF_GCLK_SERCOM0_CORE_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> Slow Clock Source
|
|
||||||
// <id> slow_gclk_selection
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the slow clock source.
|
|
||||||
#ifndef CONF_GCLK_SERCOM0_SLOW_SRC
|
|
||||||
#define CONF_GCLK_SERCOM0_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
#define CONF_GCLK_SERCOM0_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
||||||
#endif
|
#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 48000000
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_SERCOM0_CORE_FREQUENCY
|
|
||||||
* \brief SERCOM0's Core Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_SERCOM0_CORE_FREQUENCY
|
|
||||||
#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 12000000
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_SERCOM0_SLOW_FREQUENCY
|
|
||||||
* \brief SERCOM0's Slow Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_SERCOM0_SLOW_FREQUENCY
|
|
||||||
#define CONF_GCLK_SERCOM0_SLOW_FREQUENCY 32768
|
#define CONF_GCLK_SERCOM0_SLOW_FREQUENCY 32768
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> Core Clock Source
|
#define CONF_GCLK_SERCOM1_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val
|
||||||
// <id> core_gclk_selection
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for CORE.
|
|
||||||
#ifndef CONF_GCLK_SERCOM0_CORE_SRC
|
|
||||||
#define CONF_GCLK_SERCOM0_CORE_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> Slow Clock Source
|
|
||||||
// <id> slow_gclk_selection
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the slow clock source.
|
|
||||||
#ifndef CONF_GCLK_SERCOM0_SLOW_SRC
|
|
||||||
#define CONF_GCLK_SERCOM0_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_SERCOM0_CORE_FREQUENCY
|
|
||||||
* \brief SERCOM0's Core Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_SERCOM0_CORE_FREQUENCY
|
|
||||||
#define CONF_GCLK_SERCOM0_CORE_FREQUENCY 12000000
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_SERCOM0_SLOW_FREQUENCY
|
|
||||||
* \brief SERCOM0's Slow Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_SERCOM0_SLOW_FREQUENCY
|
|
||||||
#define CONF_GCLK_SERCOM0_SLOW_FREQUENCY 32768
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> Core Clock Source
|
|
||||||
// <id> core_gclk_selection
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for CORE.
|
|
||||||
#ifndef CONF_GCLK_SERCOM1_CORE_SRC
|
|
||||||
#define CONF_GCLK_SERCOM1_CORE_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> Slow Clock Source
|
|
||||||
// <id> slow_gclk_selection
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the slow clock source.
|
|
||||||
#ifndef CONF_GCLK_SERCOM1_SLOW_SRC
|
|
||||||
#define CONF_GCLK_SERCOM1_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
#define CONF_GCLK_SERCOM1_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
||||||
#endif
|
#define CONF_GCLK_SERCOM1_CORE_FREQUENCY 48000000
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_SERCOM1_CORE_FREQUENCY
|
|
||||||
* \brief SERCOM1's Core Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_SERCOM1_CORE_FREQUENCY
|
|
||||||
#define CONF_GCLK_SERCOM1_CORE_FREQUENCY 12000000
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_SERCOM1_SLOW_FREQUENCY
|
|
||||||
* \brief SERCOM1's Slow Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_SERCOM1_SLOW_FREQUENCY
|
|
||||||
#define CONF_GCLK_SERCOM1_SLOW_FREQUENCY 32768
|
#define CONF_GCLK_SERCOM1_SLOW_FREQUENCY 32768
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> TC Clock Source
|
#define CONF_GCLK_SERCOM2_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val
|
||||||
// <id> tc_gclk_selection
|
#define CONF_GCLK_SERCOM2_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
||||||
|
#define CONF_GCLK_SERCOM2_CORE_FREQUENCY 48000000
|
||||||
|
#define CONF_GCLK_SERCOM2_SLOW_FREQUENCY 32768
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
#define CONF_GCLK_SERCOM3_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val
|
||||||
|
#define CONF_GCLK_SERCOM3_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
||||||
|
#define CONF_GCLK_SERCOM3_CORE_FREQUENCY 48000000
|
||||||
|
#define CONF_GCLK_SERCOM3_SLOW_FREQUENCY 32768
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
#define CONF_GCLK_SERCOM4_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val
|
||||||
|
#define CONF_GCLK_SERCOM4_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
||||||
|
#define CONF_GCLK_SERCOM4_CORE_FREQUENCY 48000000
|
||||||
|
#define CONF_GCLK_SERCOM4_SLOW_FREQUENCY 32768
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
#define CONF_GCLK_SERCOM5_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val
|
||||||
|
#define CONF_GCLK_SERCOM5_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
||||||
|
#define CONF_GCLK_SERCOM5_CORE_FREQUENCY 48000000
|
||||||
|
#define CONF_GCLK_SERCOM5_SLOW_FREQUENCY 32768
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
#define CONF_GCLK_SERCOM6_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val
|
||||||
|
#define CONF_GCLK_SERCOM6_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
||||||
|
#define CONF_GCLK_SERCOM6_CORE_FREQUENCY 48000000
|
||||||
|
#define CONF_GCLK_SERCOM6_SLOW_FREQUENCY 32768
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
#define CONF_GCLK_SERCOM7_CORE_SRC GCLK_PCHCTRL_GEN_GCLK1_Val
|
||||||
|
#define CONF_GCLK_SERCOM7_SLOW_SRC GCLK_PCHCTRL_GEN_GCLK3_Val
|
||||||
|
#define CONF_GCLK_SERCOM7_CORE_FREQUENCY 48000000
|
||||||
|
#define CONF_GCLK_SERCOM7_SLOW_FREQUENCY 32768
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
// TC
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for TC.
|
|
||||||
#ifndef CONF_GCLK_TC0_SRC
|
|
||||||
#define CONF_GCLK_TC0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
#define CONF_GCLK_TC0_SRC GCLK_PCHCTRL_GEN_GCLK0_Val
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_TC0_FREQUENCY
|
|
||||||
* \brief TC0's Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_TC0_FREQUENCY
|
|
||||||
#define CONF_GCLK_TC0_FREQUENCY 12000000
|
#define CONF_GCLK_TC0_FREQUENCY 12000000
|
||||||
#endif
|
|
||||||
|
|
||||||
// <y> USB Clock Source
|
// USB
|
||||||
// <id> usb_gclk_selection
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK0_Val"> Generic clock generator 0
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK1_Val"> Generic clock generator 1
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK2_Val"> Generic clock generator 2
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK3_Val"> Generic clock generator 3
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK4_Val"> Generic clock generator 4
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK5_Val"> Generic clock generator 5
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK6_Val"> Generic clock generator 6
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK7_Val"> Generic clock generator 7
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK8_Val"> Generic clock generator 8
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK9_Val"> Generic clock generator 9
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK10_Val"> Generic clock generator 10
|
|
||||||
|
|
||||||
// <GCLK_PCHCTRL_GEN_GCLK11_Val"> Generic clock generator 11
|
|
||||||
|
|
||||||
// <i> Select the clock source for USB.
|
|
||||||
#ifndef CONF_GCLK_USB_SRC
|
|
||||||
#define CONF_GCLK_USB_SRC GCLK_PCHCTRL_GEN_GCLK1_Val
|
#define CONF_GCLK_USB_SRC GCLK_PCHCTRL_GEN_GCLK1_Val
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \def CONF_GCLK_USB_FREQUENCY
|
|
||||||
* \brief USB's Clock frequency
|
|
||||||
*/
|
|
||||||
#ifndef CONF_GCLK_USB_FREQUENCY
|
|
||||||
#define CONF_GCLK_USB_FREQUENCY 48000000
|
#define CONF_GCLK_USB_FREQUENCY 48000000
|
||||||
#endif
|
|
||||||
|
|
||||||
// <<< end of configuration section >>>
|
|
||||||
|
|
||||||
#endif // PERIPHERAL_CLK_CONFIG_H
|
#endif // PERIPHERAL_CLK_CONFIG_H
|
||||||
|
|
|
@ -13,7 +13,7 @@ CHIP_FAMILY = samd21
|
||||||
# Include these Python libraries in firmware.
|
# Include these Python libraries in firmware.
|
||||||
### TODO(halbert): disable some of these frozen modules; they don't fit in 3.0.0 build while internalfs
|
### TODO(halbert): disable some of these frozen modules; they don't fit in 3.0.0 build while internalfs
|
||||||
### is in use
|
### is in use
|
||||||
###FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice
|
FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice
|
||||||
###FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH
|
FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_LIS3DH
|
||||||
FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel
|
FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel
|
||||||
###FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Thermistor
|
###FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Thermistor
|
||||||
|
|
|
@ -26,25 +26,23 @@
|
||||||
|
|
||||||
#include "shared-bindings/busio/I2C.h"
|
#include "shared-bindings/busio/I2C.h"
|
||||||
#include "py/mperrno.h"
|
#include "py/mperrno.h"
|
||||||
#include "py/nlr.h"
|
|
||||||
#include "py/runtime.h"
|
#include "py/runtime.h"
|
||||||
|
|
||||||
#include "asf/sam0/drivers/sercom/i2c/i2c_master.h"
|
#include "hal/include/hal_gpio.h"
|
||||||
#include "samd21_pins.h"
|
#include "hal/include/hal_i2c_m_sync.h"
|
||||||
|
#include "hal/include/hpl_i2c_m_sync.h"
|
||||||
|
|
||||||
|
#include "peripherals.h"
|
||||||
|
#include "pins.h"
|
||||||
|
|
||||||
// We use ENABLE registers below we don't want to treat as a macro.
|
|
||||||
#undef ENABLE
|
|
||||||
|
|
||||||
// Number of times to try to send packet if failed.
|
// Number of times to try to send packet if failed.
|
||||||
#define TIMEOUT 1
|
#define ATTEMPTS 2
|
||||||
|
|
||||||
void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
|
void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
|
||||||
const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t frequency) {
|
const mcu_pin_obj_t* scl, const mcu_pin_obj_t* sda, uint32_t frequency) {
|
||||||
struct i2c_master_config config_i2c_master;
|
|
||||||
i2c_master_get_config_defaults(&config_i2c_master);
|
|
||||||
// Struct takes the argument in Khz not Hz.
|
|
||||||
config_i2c_master.baud_rate = frequency / 1000;
|
|
||||||
Sercom* sercom = NULL;
|
Sercom* sercom = NULL;
|
||||||
|
uint8_t sercom_index;
|
||||||
uint32_t sda_pinmux = 0;
|
uint32_t sda_pinmux = 0;
|
||||||
uint32_t scl_pinmux = 0;
|
uint32_t scl_pinmux = 0;
|
||||||
for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) {
|
for (int i = 0; i < NUM_SERCOMS_PER_PIN; i++) {
|
||||||
|
@ -60,6 +58,7 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
|
||||||
scl->sercom[j].pad == 1) {
|
scl->sercom[j].pad == 1) {
|
||||||
scl_pinmux = PINMUX(scl->pin, (j == 0) ? MUX_C : MUX_D);
|
scl_pinmux = PINMUX(scl->pin, (j == 0) ? MUX_C : MUX_D);
|
||||||
sercom = potential_sercom;
|
sercom = potential_sercom;
|
||||||
|
sercom_index = scl->sercom[j].index; // 2 for SERCOM2, etc.
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -71,28 +70,36 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self,
|
||||||
mp_raise_ValueError("Invalid pins");
|
mp_raise_ValueError("Invalid pins");
|
||||||
}
|
}
|
||||||
|
|
||||||
config_i2c_master.pinmux_pad0 = sda_pinmux; // SDA
|
|
||||||
config_i2c_master.pinmux_pad1 = scl_pinmux; // SCL
|
// Set up I2C clocks on sercom.
|
||||||
config_i2c_master.buffer_timeout = 10000;
|
sercom_clock_init(sercom, sercom_index);
|
||||||
|
|
||||||
|
if (i2c_m_sync_init(&self->i2c_desc, sercom) != ERR_NONE) {
|
||||||
|
mp_raise_OSError(MP_EIO);
|
||||||
|
}
|
||||||
|
|
||||||
|
gpio_set_pin_pull_mode(sda->pin, GPIO_PULL_OFF);
|
||||||
|
gpio_set_pin_function(sda->pin, sda_pinmux);
|
||||||
|
|
||||||
|
gpio_set_pin_pull_mode(scl->pin, GPIO_PULL_OFF);
|
||||||
|
gpio_set_pin_function(scl->pin, scl_pinmux);
|
||||||
|
|
||||||
|
// clkrate is always 0. baud_rate is in kHz.
|
||||||
|
|
||||||
|
// Frequency must be set before the I2C device is enabled.
|
||||||
|
if (i2c_m_sync_set_baudrate(&self->i2c_desc, 0, frequency / 1000) != ERR_NONE) {
|
||||||
|
mp_raise_ValueError("Unsupported baudrate");
|
||||||
|
}
|
||||||
|
|
||||||
self->sda_pin = sda->pin;
|
self->sda_pin = sda->pin;
|
||||||
self->scl_pin = scl->pin;
|
self->scl_pin = scl->pin;
|
||||||
claim_pin(sda);
|
claim_pin(sda);
|
||||||
claim_pin(scl);
|
claim_pin(scl);
|
||||||
|
|
||||||
enum status_code status = i2c_master_init(&self->i2c_master_instance,
|
if (i2c_m_sync_enable(&self->i2c_desc) != ERR_NONE) {
|
||||||
sercom, &config_i2c_master);
|
|
||||||
|
|
||||||
if (status != STATUS_OK) {
|
|
||||||
common_hal_busio_i2c_deinit(self);
|
common_hal_busio_i2c_deinit(self);
|
||||||
if (status == STATUS_ERR_BAUDRATE_UNAVAILABLE) {
|
mp_raise_OSError(MP_EIO);
|
||||||
mp_raise_ValueError("Unsupported baudrate");
|
|
||||||
} else {
|
|
||||||
mp_raise_OSError(MP_EIO);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
i2c_master_enable(&self->i2c_master_instance);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) {
|
bool common_hal_busio_i2c_deinited(busio_i2c_obj_t *self) {
|
||||||
|
@ -103,7 +110,10 @@ void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) {
|
||||||
if (common_hal_busio_i2c_deinited(self)) {
|
if (common_hal_busio_i2c_deinited(self)) {
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
i2c_master_reset(&self->i2c_master_instance);
|
|
||||||
|
i2c_m_sync_disable(&self->i2c_desc);
|
||||||
|
i2c_m_sync_deinit(&self->i2c_desc);
|
||||||
|
|
||||||
reset_pin(self->sda_pin);
|
reset_pin(self->sda_pin);
|
||||||
reset_pin(self->scl_pin);
|
reset_pin(self->scl_pin);
|
||||||
self->sda_pin = NO_PIN;
|
self->sda_pin = NO_PIN;
|
||||||
|
@ -111,29 +121,23 @@ void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) {
|
||||||
}
|
}
|
||||||
|
|
||||||
bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) {
|
bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) {
|
||||||
uint8_t buf;
|
struct io_descriptor *i2c_io;
|
||||||
struct i2c_master_packet packet = {
|
i2c_m_sync_get_io_descriptor(&self->i2c_desc, &i2c_io);
|
||||||
.address = addr,
|
i2c_m_sync_set_slaveaddr(&self->i2c_desc, addr, I2C_M_SEVEN);
|
||||||
.data_length = 0,
|
|
||||||
.data = &buf,
|
|
||||||
.ten_bit_address = false,
|
|
||||||
.high_speed = false,
|
|
||||||
.hs_master_code = 0x0,
|
|
||||||
};
|
|
||||||
|
|
||||||
enum status_code status = i2c_master_write_packet_wait(
|
// Write no data when just probing
|
||||||
&self->i2c_master_instance, &packet);
|
return io_write(i2c_io, NULL, 0) == ERR_NONE;
|
||||||
return status == STATUS_OK;
|
|
||||||
}
|
|
||||||
|
|
||||||
void common_hal_busio_i2c_configure(busio_i2c_obj_t *self,
|
|
||||||
uint32_t baudrate, uint8_t polarity, uint8_t phase, uint8_t bits) {
|
|
||||||
return;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) {
|
bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) {
|
||||||
self->has_lock = i2c_master_lock(&self->i2c_master_instance) == STATUS_OK;
|
bool grabbed_lock = false;
|
||||||
return self->has_lock;
|
CRITICAL_SECTION_ENTER()
|
||||||
|
if (!self->has_lock) {
|
||||||
|
grabbed_lock = true;
|
||||||
|
self->has_lock = true;
|
||||||
|
}
|
||||||
|
CRITICAL_SECTION_LEAVE();
|
||||||
|
return grabbed_lock;
|
||||||
}
|
}
|
||||||
|
|
||||||
bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) {
|
bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) {
|
||||||
|
@ -142,38 +146,29 @@ bool common_hal_busio_i2c_has_lock(busio_i2c_obj_t *self) {
|
||||||
|
|
||||||
void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) {
|
void common_hal_busio_i2c_unlock(busio_i2c_obj_t *self) {
|
||||||
self->has_lock = false;
|
self->has_lock = false;
|
||||||
i2c_master_unlock(&self->i2c_master_instance);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr,
|
uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr,
|
||||||
const uint8_t *data, size_t len, bool transmit_stop_bit) {
|
const uint8_t *data, size_t len, bool transmit_stop_bit) {
|
||||||
struct i2c_master_packet packet = {
|
|
||||||
.address = addr,
|
|
||||||
.data_length = len,
|
|
||||||
.data = (uint8_t *) data,
|
|
||||||
.ten_bit_address = false,
|
|
||||||
.high_speed = false,
|
|
||||||
.hs_master_code = 0x0,
|
|
||||||
};
|
|
||||||
|
|
||||||
uint16_t timeout = 0;
|
uint16_t attempts = ATTEMPTS;
|
||||||
enum status_code status = STATUS_BUSY;
|
int32_t status;
|
||||||
while (status != STATUS_OK) {
|
do {
|
||||||
if (transmit_stop_bit) {
|
struct _i2c_m_msg msg;
|
||||||
status = i2c_master_write_packet_wait(&self->i2c_master_instance,
|
msg.addr = addr;
|
||||||
&packet);
|
msg.len = len;
|
||||||
} else {
|
msg.flags = transmit_stop_bit ? I2C_M_STOP : 0;
|
||||||
status = i2c_master_write_packet_wait_no_stop(
|
msg.buffer = (uint8_t *) data;
|
||||||
&self->i2c_master_instance, &packet);
|
status = _i2c_m_sync_transfer(&self->i2c_desc.device, &msg);
|
||||||
}
|
|
||||||
/* Increment timeout counter and check if timed out. */
|
// Give up after ATTEMPTS tries.
|
||||||
if (timeout++ == TIMEOUT) {
|
if (--attempts == 0) {
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
} while (status != I2C_OK);
|
||||||
if (status == STATUS_OK) {
|
if (status == I2C_OK) {
|
||||||
return 0;
|
return 0;
|
||||||
} else if (status == STATUS_ERR_BAD_ADDRESS) {
|
} else if (status == I2C_ERR_BAD_ADDRESS) {
|
||||||
return MP_ENODEV;
|
return MP_ENODEV;
|
||||||
}
|
}
|
||||||
return MP_EIO;
|
return MP_EIO;
|
||||||
|
@ -181,28 +176,25 @@ uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr,
|
||||||
|
|
||||||
uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr,
|
uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr,
|
||||||
uint8_t *data, size_t len) {
|
uint8_t *data, size_t len) {
|
||||||
struct i2c_master_packet packet = {
|
|
||||||
.address = addr,
|
|
||||||
.data_length = len,
|
|
||||||
.data = data,
|
|
||||||
.ten_bit_address = false,
|
|
||||||
.high_speed = false,
|
|
||||||
.hs_master_code = 0x0,
|
|
||||||
};
|
|
||||||
|
|
||||||
uint16_t timeout = 0;
|
uint16_t attempts = ATTEMPTS;
|
||||||
enum status_code status = STATUS_BUSY;
|
int32_t status;
|
||||||
while (status != STATUS_OK) {
|
do {
|
||||||
status = i2c_master_read_packet_wait(&self->i2c_master_instance,
|
struct _i2c_m_msg msg;
|
||||||
&packet);
|
msg.addr = addr;
|
||||||
/* Increment timeout counter and check if timed out. */
|
msg.len = len;
|
||||||
if (timeout++ == TIMEOUT) {
|
msg.flags = I2C_M_STOP | I2C_M_RD;
|
||||||
|
msg.buffer = data;
|
||||||
|
status = _i2c_m_sync_transfer(&self->i2c_desc.device, &msg);
|
||||||
|
|
||||||
|
// Give up after ATTEMPTS tries.
|
||||||
|
if (--attempts == 0) {
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
} while (status != I2C_OK);
|
||||||
if (status == STATUS_OK) {
|
if (status == ERR_NONE) {
|
||||||
return 0;
|
return 0;
|
||||||
} else if (status == STATUS_ERR_BAD_ADDRESS) {
|
} else if (status == I2C_ERR_BAD_ADDRESS) {
|
||||||
return MP_ENODEV;
|
return MP_ENODEV;
|
||||||
}
|
}
|
||||||
return MP_EIO;
|
return MP_EIO;
|
||||||
|
|
|
@ -29,13 +29,14 @@
|
||||||
|
|
||||||
#include "common-hal/microcontroller/Pin.h"
|
#include "common-hal/microcontroller/Pin.h"
|
||||||
|
|
||||||
#include "asf/sam0/drivers/sercom/i2c/i2c_master.h"
|
#include "hal/include/hal_i2c_m_sync.h"
|
||||||
|
|
||||||
#include "py/obj.h"
|
#include "py/obj.h"
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
mp_obj_base_t base;
|
mp_obj_base_t base;
|
||||||
struct i2c_master_module i2c_master_instance;
|
struct i2c_m_sync_desc i2c_desc;
|
||||||
bool has_lock;
|
volatile bool has_lock;
|
||||||
uint8_t scl_pin;
|
uint8_t scl_pin;
|
||||||
uint8_t sda_pin;
|
uint8_t sda_pin;
|
||||||
} busio_i2c_obj_t;
|
} busio_i2c_obj_t;
|
||||||
|
|
|
@ -27,7 +27,6 @@
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
#include <string.h>
|
#include <string.h>
|
||||||
|
|
||||||
#include "py/nlr.h"
|
|
||||||
#include "py/runtime.h"
|
#include "py/runtime.h"
|
||||||
#include "py/mphal.h"
|
#include "py/mphal.h"
|
||||||
|
|
||||||
|
|
|
@ -34,8 +34,9 @@
|
||||||
#include "include/component/sercom.h"
|
#include "include/component/sercom.h"
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
Sercom *const sercom;
|
Sercom *const sercom; // SERCOM0, SERCOM1, etc.
|
||||||
uint8_t pad;
|
uint8_t index; // 0, 1, etc. corresponding to SERCOM<n>.
|
||||||
|
uint8_t pad; // which of the four SERCOM pads to use
|
||||||
} pin_sercom_t;
|
} pin_sercom_t;
|
||||||
|
|
||||||
typedef struct {
|
typedef struct {
|
||||||
|
|
|
@ -212,7 +212,7 @@ extern const struct _mp_obj_module_t usb_hid_module;
|
||||||
// Disabled for now.
|
// Disabled for now.
|
||||||
// { MP_OBJ_NEW_QSTR(MP_QSTR_touchio), (mp_obj_t)&touchio_module },
|
// { MP_OBJ_NEW_QSTR(MP_QSTR_touchio), (mp_obj_t)&touchio_module },
|
||||||
// { MP_OBJ_NEW_QSTR(MP_QSTR_analogio), (mp_obj_t)&analogio_module },
|
// { MP_OBJ_NEW_QSTR(MP_QSTR_analogio), (mp_obj_t)&analogio_module },
|
||||||
// { MP_OBJ_NEW_QSTR(MP_QSTR_busio), (mp_obj_t)&busio_module },
|
|
||||||
// { MP_OBJ_NEW_QSTR(MP_QSTR_gamepad),(mp_obj_t)&gamepad_module },
|
// { MP_OBJ_NEW_QSTR(MP_QSTR_gamepad),(mp_obj_t)&gamepad_module },
|
||||||
// { MP_OBJ_NEW_QSTR(MP_QSTR_usb_hid),(mp_obj_t)&usb_hid_module },
|
// { MP_OBJ_NEW_QSTR(MP_QSTR_usb_hid),(mp_obj_t)&usb_hid_module },
|
||||||
// { MP_OBJ_NEW_QSTR(MP_QSTR_storage), (mp_obj_t)&storage_module },
|
// { MP_OBJ_NEW_QSTR(MP_QSTR_storage), (mp_obj_t)&storage_module },
|
||||||
|
@ -221,6 +221,7 @@ extern const struct _mp_obj_module_t usb_hid_module;
|
||||||
|
|
||||||
#define MICROPY_PORT_BUILTIN_MODULES \
|
#define MICROPY_PORT_BUILTIN_MODULES \
|
||||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_board), (mp_obj_t)&board_module }, \
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_board), (mp_obj_t)&board_module }, \
|
||||||
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_busio), (mp_obj_t)&busio_module }, \
|
||||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_digitalio), (mp_obj_t)&digitalio_module }, \
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_digitalio), (mp_obj_t)&digitalio_module }, \
|
||||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_microcontroller), (mp_obj_t)µcontroller_module }, \
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_microcontroller), (mp_obj_t)µcontroller_module }, \
|
||||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_neopixel_write),(mp_obj_t)&neopixel_write_module }, \
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_neopixel_write),(mp_obj_t)&neopixel_write_module }, \
|
||||||
|
|
|
@ -0,0 +1,39 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the Micro Python project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MICROPY_INCLUDED_ATMEL_SAMD_PERIPHERALS_H
|
||||||
|
#define MICROPY_INCLUDED_ATMEL_SAMD_PERIPHERALS_H
|
||||||
|
|
||||||
|
#include "mpconfigport.h"
|
||||||
|
|
||||||
|
#ifdef SAMD21
|
||||||
|
#include "samd21_peripherals.h"
|
||||||
|
#endif
|
||||||
|
#ifdef SAMD51
|
||||||
|
#include "samd51_peripherals.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif // MICROPY_INCLUDED_ATMEL_SAMD_PINS_H
|
|
@ -24,8 +24,8 @@
|
||||||
* THE SOFTWARE.
|
* THE SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_PINS_H__
|
#ifndef MICROPY_INCLUDED_ATMEL_SAMD_PINS_H
|
||||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_PINS_H__
|
#define MICROPY_INCLUDED_ATMEL_SAMD_PINS_H
|
||||||
|
|
||||||
#include "mpconfigport.h"
|
#include "mpconfigport.h"
|
||||||
|
|
||||||
|
@ -36,4 +36,4 @@
|
||||||
#include "samd51_pins.h"
|
#include "samd51_pins.h"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_PINS_H__
|
#endif // MICROPY_INCLUDED_ATMEL_SAMD_PINS_H
|
||||||
|
|
|
@ -0,0 +1,65 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the Micro Python project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 Dan Halbert for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "hpl/gclk/hpl_gclk_base.h"
|
||||||
|
#include "hpl/pm/hpl_pm_base.h"
|
||||||
|
|
||||||
|
// The clock initializer values are rather random, so we need to put them in
|
||||||
|
// tables for lookup. We can't compute them.
|
||||||
|
|
||||||
|
static const uint8_t SERCOMx_GCLK_ID_CORE[] = {
|
||||||
|
SERCOM0_GCLK_ID_CORE,
|
||||||
|
SERCOM1_GCLK_ID_CORE,
|
||||||
|
SERCOM2_GCLK_ID_CORE,
|
||||||
|
SERCOM3_GCLK_ID_CORE,
|
||||||
|
#ifdef SERCOM4
|
||||||
|
SERCOM4_GCLK_ID_CORE,
|
||||||
|
#endif
|
||||||
|
#ifdef SERCOM5
|
||||||
|
SERCOM5_GCLK_ID_CORE,
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
static const uint8_t SERCOMx_GCLK_ID_SLOW[] = {
|
||||||
|
SERCOM0_GCLK_ID_SLOW,
|
||||||
|
SERCOM1_GCLK_ID_SLOW,
|
||||||
|
SERCOM2_GCLK_ID_SLOW,
|
||||||
|
SERCOM3_GCLK_ID_SLOW,
|
||||||
|
#ifdef SERCOM4
|
||||||
|
SERCOM4_GCLK_ID_SLOW,
|
||||||
|
#endif
|
||||||
|
#ifdef SERCOM5
|
||||||
|
SERCOM5_GCLK_ID_SLOW,
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
// Clock initialization as done in Atmel START.
|
||||||
|
void sercom_clock_init(Sercom* sercom, uint8_t sercom_index) {
|
||||||
|
_pm_enable_bus_clock(PM_BUS_APBC, sercom);
|
||||||
|
_gclk_enable_channel(SERCOMx_GCLK_ID_CORE[sercom_index], GCLK_CLKCTRL_GEN_GCLK0_Val);
|
||||||
|
_gclk_enable_channel(SERCOMx_GCLK_ID_SLOW[sercom_index], GCLK_CLKCTRL_GEN_GCLK3_Val);
|
||||||
|
}
|
|
@ -0,0 +1,34 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the MicroPython project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 by Dan Halbert for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MICROPY_INCLUDED_ATMEL_SAMD_SAMD21_PERIPHERALS_H
|
||||||
|
#define MICROPY_INCLUDED_ATMEL_SAMD_SAMD21_PERIPHERALS_H
|
||||||
|
|
||||||
|
#include "include/sam.h"
|
||||||
|
|
||||||
|
void sercom_clock_init(Sercom* sercom, uint8_t sercom_index);
|
||||||
|
|
||||||
|
#endif // MICROPY_INCLUDED_ATMEL_SAMD_SAMD21_PERIPHERALS_H
|
|
@ -28,13 +28,20 @@
|
||||||
|
|
||||||
#include "samd21_pins.h"
|
#include "samd21_pins.h"
|
||||||
|
|
||||||
#define SERCOM(p_sercom, p_pad) \
|
#define SERCOM(sercom_index, p_pad) \
|
||||||
{ \
|
{ \
|
||||||
.sercom = p_sercom, \
|
.sercom = SERCOM## sercom_index, \
|
||||||
|
.index = sercom_index, \
|
||||||
.pad = p_pad \
|
.pad = p_pad \
|
||||||
}
|
}
|
||||||
|
|
||||||
#define NO_SERCOM SERCOM(0, 0)
|
#define NO_SERCOM \
|
||||||
|
{ \
|
||||||
|
.sercom = 0, \
|
||||||
|
.index = 0, \
|
||||||
|
.pad = 0 \
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
#define TCC(p_tcc, p_wave_output) \
|
#define TCC(p_tcc, p_wave_output) \
|
||||||
{ \
|
{ \
|
||||||
|
@ -93,14 +100,14 @@ const mcu_pin_obj_t pin_## p_name = { \
|
||||||
#ifdef PIN_PA00
|
#ifdef PIN_PA00
|
||||||
PIN(PA00, EXTINT_CHANNEL(0), NO_ADC, NO_TOUCH,
|
PIN(PA00, EXTINT_CHANNEL(0), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM1, 0),
|
SERCOM(1, 0),
|
||||||
TCC(TCC2, 0),
|
TCC(TCC2, 0),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA01
|
#ifdef PIN_PA01
|
||||||
PIN(PA01, EXTINT_CHANNEL(1), NO_ADC, NO_TOUCH,
|
PIN(PA01, EXTINT_CHANNEL(1), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM1, 1),
|
SERCOM(1, 1),
|
||||||
TCC(TCC2, 1),
|
TCC(TCC2, 1),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
|
@ -155,104 +162,104 @@ PIN(PB07, EXTINT_CHANNEL(7), ADC_INPUT(15), TOUCH(13),
|
||||||
#ifdef PIN_PB08
|
#ifdef PIN_PB08
|
||||||
PIN(PB08, EXTINT_CHANNEL(8), ADC_INPUT(2), TOUCH(14),
|
PIN(PB08, EXTINT_CHANNEL(8), ADC_INPUT(2), TOUCH(14),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM4, 0),
|
SERCOM(4, 0),
|
||||||
TC(TC4, 0),
|
TC(TC4, 0),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB09
|
#ifdef PIN_PB09
|
||||||
PIN(PB09, EXTINT_CHANNEL(9), ADC_INPUT(3), TOUCH(15),
|
PIN(PB09, EXTINT_CHANNEL(9), ADC_INPUT(3), TOUCH(15),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM4, 1),
|
SERCOM(4, 1),
|
||||||
TC(TC4, 1),
|
TC(TC4, 1),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA04
|
#ifdef PIN_PA04
|
||||||
PIN(PA04, EXTINT_CHANNEL(4), ADC_INPUT(4), TOUCH(2),
|
PIN(PA04, EXTINT_CHANNEL(4), ADC_INPUT(4), TOUCH(2),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM0, 0),
|
SERCOM(0, 0),
|
||||||
TCC(TCC0, 0),
|
TCC(TCC0, 0),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA05
|
#ifdef PIN_PA05
|
||||||
PIN(PA05, EXTINT_CHANNEL(5), ADC_INPUT(5), TOUCH(3),
|
PIN(PA05, EXTINT_CHANNEL(5), ADC_INPUT(5), TOUCH(3),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM0, 1),
|
SERCOM(0, 1),
|
||||||
TCC(TCC0, 1),
|
TCC(TCC0, 1),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA06
|
#ifdef PIN_PA06
|
||||||
PIN(PA06, EXTINT_CHANNEL(6), ADC_INPUT(6), TOUCH(4),
|
PIN(PA06, EXTINT_CHANNEL(6), ADC_INPUT(6), TOUCH(4),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM0, 2),
|
SERCOM(0, 2),
|
||||||
TCC(TCC1, 0),
|
TCC(TCC1, 0),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA07
|
#ifdef PIN_PA07
|
||||||
PIN(PA07, EXTINT_CHANNEL(7), ADC_INPUT(7), TOUCH(5),
|
PIN(PA07, EXTINT_CHANNEL(7), ADC_INPUT(7), TOUCH(5),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM0, 3),
|
SERCOM(0, 3),
|
||||||
TCC(TCC1, 1),
|
TCC(TCC1, 1),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA08
|
#ifdef PIN_PA08
|
||||||
PIN(PA08, NO_EXTINT, ADC_INPUT(16), NO_TOUCH,
|
PIN(PA08, NO_EXTINT, ADC_INPUT(16), NO_TOUCH,
|
||||||
SERCOM(SERCOM0, 0),
|
SERCOM(0, 0),
|
||||||
SERCOM(SERCOM2, 0),
|
SERCOM(2, 0),
|
||||||
TCC(TCC0, 0),
|
TCC(TCC0, 0),
|
||||||
TCC(TCC1, 2));
|
TCC(TCC1, 2));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA09
|
#ifdef PIN_PA09
|
||||||
PIN(PA09, EXTINT_CHANNEL(9), ADC_INPUT(17), NO_TOUCH,
|
PIN(PA09, EXTINT_CHANNEL(9), ADC_INPUT(17), NO_TOUCH,
|
||||||
SERCOM(SERCOM0, 1),
|
SERCOM(0, 1),
|
||||||
SERCOM(SERCOM2, 1),
|
SERCOM(2, 1),
|
||||||
TCC(TCC0, 1),
|
TCC(TCC0, 1),
|
||||||
TCC(TCC1, 3));
|
TCC(TCC1, 3));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA10
|
#ifdef PIN_PA10
|
||||||
PIN(PA10, EXTINT_CHANNEL(10), ADC_INPUT(18), NO_TOUCH,
|
PIN(PA10, EXTINT_CHANNEL(10), ADC_INPUT(18), NO_TOUCH,
|
||||||
SERCOM(SERCOM0, 2),
|
SERCOM(0, 2),
|
||||||
SERCOM(SERCOM2, 2),
|
SERCOM(2, 2),
|
||||||
TCC(TCC1, 0),
|
TCC(TCC1, 0),
|
||||||
TCC(TCC0, 2));
|
TCC(TCC0, 2));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA11
|
#ifdef PIN_PA11
|
||||||
PIN(PA11, EXTINT_CHANNEL(11), ADC_INPUT(19), NO_TOUCH,
|
PIN(PA11, EXTINT_CHANNEL(11), ADC_INPUT(19), NO_TOUCH,
|
||||||
SERCOM(SERCOM0, 3),
|
SERCOM(0, 3),
|
||||||
SERCOM(SERCOM2, 3),
|
SERCOM(2, 3),
|
||||||
TCC(TCC1, 1),
|
TCC(TCC1, 1),
|
||||||
TCC(TCC0, 3));
|
TCC(TCC0, 3));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB10
|
#ifdef PIN_PB10
|
||||||
PIN(PB10, EXTINT_CHANNEL(10), NO_ADC, NO_TOUCH,
|
PIN(PB10, EXTINT_CHANNEL(10), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM4, 2),
|
SERCOM(4, 2),
|
||||||
TC(TC5, 0),
|
TC(TC5, 0),
|
||||||
TCC(TCC0, 4));
|
TCC(TCC0, 4));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB11
|
#ifdef PIN_PB11
|
||||||
PIN(PB11, EXTINT_CHANNEL(11), NO_ADC, NO_TOUCH,
|
PIN(PB11, EXTINT_CHANNEL(11), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM4, 3),
|
SERCOM(4, 3),
|
||||||
TC(TC5, 1),
|
TC(TC5, 1),
|
||||||
TCC(TCC0, 5));
|
TCC(TCC0, 5));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB12
|
#ifdef PIN_PB12
|
||||||
PIN(PB12, EXTINT_CHANNEL(12), NO_ADC, NO_TOUCH,
|
PIN(PB12, EXTINT_CHANNEL(12), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM4, 0),
|
SERCOM(4, 0),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
TC(TC4, 0),
|
TC(TC4, 0),
|
||||||
TCC(TCC0, 6));
|
TCC(TCC0, 6));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB13
|
#ifdef PIN_PB13
|
||||||
PIN(PB13, EXTINT_CHANNEL(13), NO_ADC, NO_TOUCH,
|
PIN(PB13, EXTINT_CHANNEL(13), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM4, 1),
|
SERCOM(4, 1),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
TC(TC4, 1),
|
TC(TC4, 1),
|
||||||
TCC(TCC0, 7));
|
TCC(TCC0, 7));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB14
|
#ifdef PIN_PB14
|
||||||
PIN(PB14, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH,
|
PIN(PB14, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM4, 2),
|
SERCOM(4, 2),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
TC(TC5, 0),
|
TC(TC5, 0),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -261,30 +268,30 @@ PIN(PB14, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH,
|
||||||
// Second page.
|
// Second page.
|
||||||
#ifdef PIN_PB15
|
#ifdef PIN_PB15
|
||||||
PIN(PB15, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH,
|
PIN(PB15, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM4, 3),
|
SERCOM(4, 3),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
TC(TC5, 1),
|
TC(TC5, 1),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA12
|
#ifdef PIN_PA12
|
||||||
PIN(PA12, EXTINT_CHANNEL(12), NO_ADC, NO_TOUCH,
|
PIN(PA12, EXTINT_CHANNEL(12), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 0),
|
SERCOM(2, 0),
|
||||||
SERCOM(SERCOM4, 0),
|
SERCOM(4, 0),
|
||||||
TCC(TCC2, 0),
|
TCC(TCC2, 0),
|
||||||
TCC(TCC0, 6));
|
TCC(TCC0, 6));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA13
|
#ifdef PIN_PA13
|
||||||
PIN(PA13, EXTINT_CHANNEL(13), NO_ADC, NO_TOUCH,
|
PIN(PA13, EXTINT_CHANNEL(13), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 1),
|
SERCOM(2, 1),
|
||||||
SERCOM(SERCOM4, 1),
|
SERCOM(4, 1),
|
||||||
TCC(TCC2, 1),
|
TCC(TCC2, 1),
|
||||||
TCC(TCC0, 7));
|
TCC(TCC0, 7));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA14
|
#ifdef PIN_PA14
|
||||||
PIN(PA14, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH,
|
PIN(PA14, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 2),
|
SERCOM(2, 2),
|
||||||
#ifdef SERCOM4
|
#ifdef SERCOM4
|
||||||
SERCOM(SERCOM4, 2),
|
SERCOM(4, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -293,9 +300,9 @@ PIN(PA14, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA15
|
#ifdef PIN_PA15
|
||||||
PIN(PA15, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH,
|
PIN(PA15, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 3),
|
SERCOM(2, 3),
|
||||||
#ifdef SERCOM4
|
#ifdef SERCOM4
|
||||||
SERCOM(SERCOM4, 3),
|
SERCOM(4, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -304,35 +311,35 @@ PIN(PA15, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA16
|
#ifdef PIN_PA16
|
||||||
PIN(PA16, EXTINT_CHANNEL(0), NO_ADC, NO_TOUCH,
|
PIN(PA16, EXTINT_CHANNEL(0), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 0),
|
SERCOM(1, 0),
|
||||||
SERCOM(SERCOM3, 0),
|
SERCOM(3, 0),
|
||||||
TCC(TCC2, 0),
|
TCC(TCC2, 0),
|
||||||
TCC(TCC0, 6));
|
TCC(TCC0, 6));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA17
|
#ifdef PIN_PA17
|
||||||
PIN(PA17, EXTINT_CHANNEL(1), NO_ADC, NO_TOUCH,
|
PIN(PA17, EXTINT_CHANNEL(1), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 1),
|
SERCOM(1, 1),
|
||||||
SERCOM(SERCOM3, 1),
|
SERCOM(3, 1),
|
||||||
TCC(TCC2, 1),
|
TCC(TCC2, 1),
|
||||||
TCC(TCC0, 7));
|
TCC(TCC0, 7));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA18
|
#ifdef PIN_PA18
|
||||||
PIN(PA18, EXTINT_CHANNEL(2), NO_ADC, NO_TOUCH,
|
PIN(PA18, EXTINT_CHANNEL(2), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 2),
|
SERCOM(1, 2),
|
||||||
SERCOM(SERCOM3, 2),
|
SERCOM(3, 2),
|
||||||
TC(TC3, 0),
|
TC(TC3, 0),
|
||||||
TCC(TCC0, 2));
|
TCC(TCC0, 2));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA19
|
#ifdef PIN_PA19
|
||||||
PIN(PA19, EXTINT_CHANNEL(3), NO_ADC, NO_TOUCH,
|
PIN(PA19, EXTINT_CHANNEL(3), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 3),
|
SERCOM(1, 3),
|
||||||
SERCOM(SERCOM3, 3),
|
SERCOM(3, 3),
|
||||||
TC(TC3, 1),
|
TC(TC3, 1),
|
||||||
TCC(TCC0, 3));
|
TCC(TCC0, 3));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB16
|
#ifdef PIN_PB16
|
||||||
PIN(PB16, EXTINT_CHANNEL(0), NO_ADC, NO_TOUCH,
|
PIN(PB16, EXTINT_CHANNEL(0), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM5, 0),
|
SERCOM(5, 0),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#ifdef TC6
|
#ifdef TC6
|
||||||
TC(TC6, 0),
|
TC(TC6, 0),
|
||||||
|
@ -343,7 +350,7 @@ PIN(PB16, EXTINT_CHANNEL(0), NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB17
|
#ifdef PIN_PB17
|
||||||
PIN(PB17, EXTINT_CHANNEL(1), NO_ADC, NO_TOUCH,
|
PIN(PB17, EXTINT_CHANNEL(1), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM5, 1),
|
SERCOM(5, 1),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#ifdef TC6
|
#ifdef TC6
|
||||||
TC(TC6, 1),
|
TC(TC6, 1),
|
||||||
|
@ -354,8 +361,8 @@ PIN(PB17, EXTINT_CHANNEL(1), NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA20
|
#ifdef PIN_PA20
|
||||||
PIN(PA20, EXTINT_CHANNEL(4), NO_ADC, NO_TOUCH,
|
PIN(PA20, EXTINT_CHANNEL(4), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM5, 2),
|
SERCOM(5, 2),
|
||||||
SERCOM(SERCOM3, 2),
|
SERCOM(3, 2),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 0),
|
TC(TC7, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -365,8 +372,8 @@ PIN(PA20, EXTINT_CHANNEL(4), NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA21
|
#ifdef PIN_PA21
|
||||||
PIN(PA21, EXTINT_CHANNEL(5), NO_ADC, NO_TOUCH,
|
PIN(PA21, EXTINT_CHANNEL(5), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM5, 3),
|
SERCOM(5, 3),
|
||||||
SERCOM(SERCOM3, 3),
|
SERCOM(3, 3),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 1),
|
TC(TC7, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -376,9 +383,9 @@ PIN(PA21, EXTINT_CHANNEL(5), NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA22
|
#ifdef PIN_PA22
|
||||||
PIN(PA22, EXTINT_CHANNEL(6), NO_ADC, NO_TOUCH,
|
PIN(PA22, EXTINT_CHANNEL(6), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM3, 0),
|
SERCOM(3, 0),
|
||||||
#ifdef SERCOM5
|
#ifdef SERCOM5
|
||||||
SERCOM(SERCOM5, 0),
|
SERCOM(5, 0),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif,
|
#endif,
|
||||||
|
@ -387,9 +394,9 @@ PIN(PA22, EXTINT_CHANNEL(6), NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA23
|
#ifdef PIN_PA23
|
||||||
PIN(PA23, EXTINT_CHANNEL(7), NO_ADC, NO_TOUCH,
|
PIN(PA23, EXTINT_CHANNEL(7), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM3, 1),
|
SERCOM(3, 1),
|
||||||
#ifdef SERCOM5
|
#ifdef SERCOM5
|
||||||
SERCOM(SERCOM5, 1),
|
SERCOM(5, 1),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -398,9 +405,9 @@ PIN(PA23, EXTINT_CHANNEL(7), NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA24
|
#ifdef PIN_PA24
|
||||||
PIN(PA24, EXTINT_CHANNEL(12), NO_ADC, NO_TOUCH,
|
PIN(PA24, EXTINT_CHANNEL(12), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM3, 2),
|
SERCOM(3, 2),
|
||||||
#ifdef SERCOM5
|
#ifdef SERCOM5
|
||||||
SERCOM(SERCOM5, 2),
|
SERCOM(5, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -409,9 +416,9 @@ PIN(PA24, EXTINT_CHANNEL(12), NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA25
|
#ifdef PIN_PA25
|
||||||
PIN(PA25, EXTINT_CHANNEL(13), NO_ADC, NO_TOUCH,
|
PIN(PA25, EXTINT_CHANNEL(13), NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM3, 3),
|
SERCOM(3, 3),
|
||||||
#ifdef SERCOM5
|
#ifdef SERCOM5
|
||||||
SERCOM(SERCOM5, 3),
|
SERCOM(5, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -421,7 +428,7 @@ PIN(PA25, EXTINT_CHANNEL(13), NO_ADC, NO_TOUCH,
|
||||||
#ifdef PIN_PB22
|
#ifdef PIN_PB22
|
||||||
PIN(PB22, EXTINT_CHANNEL(6), NO_ADC, NO_TOUCH,
|
PIN(PB22, EXTINT_CHANNEL(6), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 2),
|
SERCOM(5, 2),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 0, 0),
|
TC(TC7, 0, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -432,7 +439,7 @@ PIN(PB22, EXTINT_CHANNEL(6), NO_ADC, NO_TOUCH,
|
||||||
#ifdef PIN_PB23
|
#ifdef PIN_PB23
|
||||||
PIN(PB23, EXTINT_CHANNEL(7), NO_ADC, NO_TOUCH,
|
PIN(PB23, EXTINT_CHANNEL(7), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 3),
|
SERCOM(5, 3),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 1, 1),
|
TC(TC7, 1, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -457,35 +464,35 @@ PIN(PA28, EXTINT_CHANNEL(8), NO_ADC, NO_TOUCH,
|
||||||
#ifdef PIN_PA30
|
#ifdef PIN_PA30
|
||||||
PIN(PA30, EXTINT_CHANNEL(10), NO_ADC, NO_TOUCH,
|
PIN(PA30, EXTINT_CHANNEL(10), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM1, 2),
|
SERCOM(1, 2),
|
||||||
TCC(TCC1, 0),
|
TCC(TCC1, 0),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA31
|
#ifdef PIN_PA31
|
||||||
PIN(PA31, EXTINT_CHANNEL(11), NO_ADC, NO_TOUCH,
|
PIN(PA31, EXTINT_CHANNEL(11), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM1, 3),
|
SERCOM(1, 3),
|
||||||
TCC(TCC1, 1),
|
TCC(TCC1, 1),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB30
|
#ifdef PIN_PB30
|
||||||
PIN(PB30, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH,
|
PIN(PB30, EXTINT_CHANNEL(14), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 0),
|
SERCOM(5, 0),
|
||||||
TCC(TCC0, 0),
|
TCC(TCC0, 0),
|
||||||
TCC(TCC1, 2));
|
TCC(TCC1, 2));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB31
|
#ifdef PIN_PB31
|
||||||
PIN(PB31, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH,
|
PIN(PB31, EXTINT_CHANNEL(15), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 1),
|
SERCOM(5, 1),
|
||||||
TCC(TCC0, 1),
|
TCC(TCC0, 1),
|
||||||
TCC(TCC1, 3));
|
TCC(TCC1, 3));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB00
|
#ifdef PIN_PB00
|
||||||
PIN(PB00, EXTINT_CHANNEL(0), ADC_INPUT(8), TOUCH(6),
|
PIN(PB00, EXTINT_CHANNEL(0), ADC_INPUT(8), TOUCH(6),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 2),
|
SERCOM(5, 2),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 0, 0),
|
TC(TC7, 0, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -496,7 +503,7 @@ PIN(PB00, EXTINT_CHANNEL(0), ADC_INPUT(8), TOUCH(6),
|
||||||
#ifdef PIN_PB01
|
#ifdef PIN_PB01
|
||||||
PIN(PB01, EXTINT_CHANNEL(1), ADC_INPUT(9), TOUCH(7),
|
PIN(PB01, EXTINT_CHANNEL(1), ADC_INPUT(9), TOUCH(7),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 3)),
|
SERCOM(5, 3)),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 1),
|
TC(TC7, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -507,7 +514,7 @@ PIN(PB01, EXTINT_CHANNEL(1), ADC_INPUT(9), TOUCH(7),
|
||||||
#ifdef PIN_PB02
|
#ifdef PIN_PB02
|
||||||
PIN(PB02, EXTINT_CHANNEL(2), ADC_INPUT(10), TOUCH(8),
|
PIN(PB02, EXTINT_CHANNEL(2), ADC_INPUT(10), TOUCH(8),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 0),
|
SERCOM(5, 0),
|
||||||
#ifdef TC6
|
#ifdef TC6
|
||||||
TC(TC6, 0),
|
TC(TC6, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -518,7 +525,7 @@ PIN(PB02, EXTINT_CHANNEL(2), ADC_INPUT(10), TOUCH(8),
|
||||||
#ifdef PIN_PB03
|
#ifdef PIN_PB03
|
||||||
PIN(PB03, EXTINT_CHANNEL(3), ADC_INPUT(11), TOUCH(9),
|
PIN(PB03, EXTINT_CHANNEL(3), ADC_INPUT(11), TOUCH(9),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 1),
|
SERCOM(5, 1),
|
||||||
#ifdef TC6
|
#ifdef TC6
|
||||||
TC(TC6, 1),
|
TC(TC6, 1),
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -0,0 +1,104 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the Micro Python project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 Dan Halbert for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "hpl/gclk/hpl_gclk_base.h"
|
||||||
|
#include "hri/hri_mclk_d51.h"
|
||||||
|
|
||||||
|
// The clock initializer values are rather random, so we need to put them in
|
||||||
|
// tables for lookup. We can't compute them.
|
||||||
|
|
||||||
|
static const uint8_t SERCOMx_GCLK_ID_CORE[] = {
|
||||||
|
SERCOM0_GCLK_ID_CORE,
|
||||||
|
SERCOM1_GCLK_ID_CORE,
|
||||||
|
SERCOM2_GCLK_ID_CORE,
|
||||||
|
SERCOM3_GCLK_ID_CORE,
|
||||||
|
SERCOM4_GCLK_ID_CORE,
|
||||||
|
SERCOM5_GCLK_ID_CORE,
|
||||||
|
#ifdef SERCOM6
|
||||||
|
SERCOM6_GCLK_ID_CORE,
|
||||||
|
#endif
|
||||||
|
#ifdef SERCOM7
|
||||||
|
SERCOM7_GCLK_ID_CORE,
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
static const uint8_t SERCOMx_GCLK_ID_SLOW[] = {
|
||||||
|
SERCOM0_GCLK_ID_SLOW,
|
||||||
|
SERCOM1_GCLK_ID_SLOW,
|
||||||
|
SERCOM2_GCLK_ID_SLOW,
|
||||||
|
SERCOM3_GCLK_ID_SLOW,
|
||||||
|
SERCOM4_GCLK_ID_SLOW,
|
||||||
|
SERCOM5_GCLK_ID_SLOW,
|
||||||
|
#ifdef SERCOM6
|
||||||
|
SERCOM6_GCLK_ID_SLOW,
|
||||||
|
#endif
|
||||||
|
#ifdef SERCOM7
|
||||||
|
SERCOM7_GCLK_ID_SLOW,
|
||||||
|
#endif
|
||||||
|
};
|
||||||
|
|
||||||
|
|
||||||
|
// Clock initialization as done in Atmel START.
|
||||||
|
void sercom_clock_init(Sercom* sercom, uint8_t sercom_index) {
|
||||||
|
hri_gclk_write_PCHCTRL_reg(GCLK,
|
||||||
|
SERCOMx_GCLK_ID_CORE[sercom_index],
|
||||||
|
GCLK_PCHCTRL_GEN_GCLK1_Val | (1 << GCLK_PCHCTRL_CHEN_Pos));
|
||||||
|
hri_gclk_write_PCHCTRL_reg(GCLK,
|
||||||
|
SERCOMx_GCLK_ID_SLOW[sercom_index],
|
||||||
|
GCLK_PCHCTRL_GEN_GCLK3_Val | (1 << GCLK_PCHCTRL_CHEN_Pos));
|
||||||
|
|
||||||
|
// hri_mclk_set_APBAMASK_SERCOMx_bit is an inline, so let's use a switch, not a table.
|
||||||
|
switch (sercom_index) {
|
||||||
|
case 0:
|
||||||
|
hri_mclk_set_APBAMASK_SERCOM0_bit(MCLK);
|
||||||
|
break;
|
||||||
|
case 1:
|
||||||
|
hri_mclk_set_APBAMASK_SERCOM1_bit(MCLK);
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
hri_mclk_set_APBBMASK_SERCOM2_bit(MCLK);
|
||||||
|
break;
|
||||||
|
case 3:
|
||||||
|
hri_mclk_set_APBBMASK_SERCOM3_bit(MCLK);
|
||||||
|
break;
|
||||||
|
case 4:
|
||||||
|
hri_mclk_set_APBDMASK_SERCOM4_bit(MCLK);
|
||||||
|
break;
|
||||||
|
case 5:
|
||||||
|
hri_mclk_set_APBDMASK_SERCOM5_bit(MCLK);
|
||||||
|
break;
|
||||||
|
#ifdef SERCOM6
|
||||||
|
case 6:
|
||||||
|
hri_mclk_set_APBDMASK_SERCOM6_bit(MCLK);
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
#ifdef SERCOM7
|
||||||
|
case 7:
|
||||||
|
hri_mclk_set_APBDMASK_SERCOM7_bit(MCLK);
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
}
|
|
@ -0,0 +1,35 @@
|
||||||
|
/*
|
||||||
|
* This file is part of the MicroPython project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 by Dan Halbert for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PERIPHERALS_H
|
||||||
|
#define MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PERIPHERALS_H
|
||||||
|
|
||||||
|
#include "sam.h"
|
||||||
|
|
||||||
|
void sercom_clock_init(Sercom* sercom, uint8_t sercom_index);
|
||||||
|
|
||||||
|
#endif // MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PERIPHERALS_H
|
||||||
|
|
|
@ -28,13 +28,19 @@
|
||||||
|
|
||||||
#include "samd51_pins.h"
|
#include "samd51_pins.h"
|
||||||
|
|
||||||
#define SERCOM(p_sercom, p_pad) \
|
#define SERCOM(sercom_index, p_pad) \
|
||||||
{ \
|
{ \
|
||||||
.sercom = p_sercom, \
|
.sercom = SERCOM## sercom_index, \
|
||||||
|
.index = sercom_index, \
|
||||||
.pad = p_pad \
|
.pad = p_pad \
|
||||||
}
|
}
|
||||||
|
|
||||||
#define NO_SERCOM SERCOM(0, 0)
|
#define NO_SERCOM \
|
||||||
|
{ \
|
||||||
|
.sercom = 0, \
|
||||||
|
.index = 0, \
|
||||||
|
.pad = 0 \
|
||||||
|
}
|
||||||
|
|
||||||
#define TCC(p_tcc, p_wave_output) \
|
#define TCC(p_tcc, p_wave_output) \
|
||||||
{ \
|
{ \
|
||||||
|
@ -92,7 +98,7 @@ const mcu_pin_obj_t pin_## p_name = { \
|
||||||
PIN(PB03, EXTINT_CHANNEL(3), ADC_INPUT(15), NO_ADC,
|
PIN(PB03, EXTINT_CHANNEL(3), ADC_INPUT(15), NO_ADC,
|
||||||
TOUCH(21),
|
TOUCH(21),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 1),
|
SERCOM(5, 1),
|
||||||
#ifdef TC6
|
#ifdef TC6
|
||||||
TC(TC6, 1),
|
TC(TC6, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -105,7 +111,7 @@ PIN(PB03, EXTINT_CHANNEL(3), ADC_INPUT(15), NO_ADC,
|
||||||
PIN(PA00, EXTINT_CHANNEL(0), NO_ADC, NO_ADC,
|
PIN(PA00, EXTINT_CHANNEL(0), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM1, 0),
|
SERCOM(1, 0),
|
||||||
TC(TC2, 0),
|
TC(TC2, 0),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -114,7 +120,7 @@ PIN(PA00, EXTINT_CHANNEL(0), NO_ADC, NO_ADC,
|
||||||
PIN(PA01, EXTINT_CHANNEL(1), NO_ADC, NO_ADC,
|
PIN(PA01, EXTINT_CHANNEL(1), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM1, 1),
|
SERCOM(1, 1),
|
||||||
TC(TC2, 0),
|
TC(TC2, 0),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -244,7 +250,7 @@ PIN(PB07, EXTINT_CHANNEL(7), NO_ADC, ADC_INPUT(9),
|
||||||
#ifdef PIN_PB08
|
#ifdef PIN_PB08
|
||||||
PIN(PB08, EXTINT_CHANNEL(8), ADC_INPUT(2), ADC_INPUT(0), TOUCH(1),
|
PIN(PB08, EXTINT_CHANNEL(8), ADC_INPUT(2), ADC_INPUT(0), TOUCH(1),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM4, 0),
|
SERCOM(4, 0),
|
||||||
TC(TC4, 0),
|
TC(TC4, 0),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -252,7 +258,7 @@ PIN(PB08, EXTINT_CHANNEL(8), ADC_INPUT(2), ADC_INPUT(0), TOUCH(1),
|
||||||
#ifdef PIN_PB09
|
#ifdef PIN_PB09
|
||||||
PIN(PB09, EXTINT_CHANNEL(9), ADC_INPUT(3), ADC_INPUT(1), TOUCH(2),
|
PIN(PB09, EXTINT_CHANNEL(9), ADC_INPUT(3), ADC_INPUT(1), TOUCH(2),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM4, 1),
|
SERCOM(4, 1),
|
||||||
TC(TC4, 1),
|
TC(TC4, 1),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -260,7 +266,7 @@ PIN(PB09, EXTINT_CHANNEL(9), ADC_INPUT(3), ADC_INPUT(1), TOUCH(2),
|
||||||
#ifdef PIN_PA04
|
#ifdef PIN_PA04
|
||||||
PIN(PA04, EXTINT_CHANNEL(4), ADC_INPUT(4), NO_ADC, TOUCH(3),
|
PIN(PA04, EXTINT_CHANNEL(4), ADC_INPUT(4), NO_ADC, TOUCH(3),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM0, 0),
|
SERCOM(0, 0),
|
||||||
TC(TC0, 0),
|
TC(TC0, 0),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -268,7 +274,7 @@ PIN(PA04, EXTINT_CHANNEL(4), ADC_INPUT(4), NO_ADC, TOUCH(3),
|
||||||
#ifdef PIN_PA05
|
#ifdef PIN_PA05
|
||||||
PIN(PA05, EXTINT_CHANNEL(5), ADC_INPUT(5), NO_ADC, NO_TOUCH,
|
PIN(PA05, EXTINT_CHANNEL(5), ADC_INPUT(5), NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM0, 1),
|
SERCOM(0, 1),
|
||||||
TC(TC0, 1),
|
TC(TC0, 1),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -276,7 +282,7 @@ PIN(PA05, EXTINT_CHANNEL(5), ADC_INPUT(5), NO_ADC, NO_TOUCH,
|
||||||
#ifdef PIN_PA06
|
#ifdef PIN_PA06
|
||||||
PIN(PA06, EXTINT_CHANNEL(6), ADC_INPUT(6), NO_ADC, TOUCH(4),
|
PIN(PA06, EXTINT_CHANNEL(6), ADC_INPUT(6), NO_ADC, TOUCH(4),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM0, 2),
|
SERCOM(0, 2),
|
||||||
TC(TC1, 0),
|
TC(TC1, 0),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -286,7 +292,7 @@ PIN(PA06, EXTINT_CHANNEL(6), ADC_INPUT(6), NO_ADC, TOUCH(4),
|
||||||
#ifdef PIN_PA07
|
#ifdef PIN_PA07
|
||||||
PIN(PA07, EXTINT_CHANNEL(7), ADC_INPUT(7), NO_ADC, TOUCH(5),
|
PIN(PA07, EXTINT_CHANNEL(7), ADC_INPUT(7), NO_ADC, TOUCH(5),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM0, 3),
|
SERCOM(0, 3),
|
||||||
TC(TC1, 1),
|
TC(TC1, 1),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -294,7 +300,7 @@ PIN(PA07, EXTINT_CHANNEL(7), ADC_INPUT(7), NO_ADC, TOUCH(5),
|
||||||
#ifdef PIN_PC04
|
#ifdef PIN_PC04
|
||||||
PIN(PC04, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PC04, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 0),
|
SERCOM(6, 0),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -306,7 +312,7 @@ PIN(PC04, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef PIN_PC05
|
#ifdef PIN_PC05
|
||||||
PIN(PC05, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PC05, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 1),
|
SERCOM(6, 1),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -318,7 +324,7 @@ PIN(PC05, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef PIN_PC06
|
#ifdef PIN_PC06
|
||||||
PIN(PC06, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PC06, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 2),
|
SERCOM(6, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -330,7 +336,7 @@ PIN(PC06, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef PIN_PC07
|
#ifdef PIN_PC07
|
||||||
PIN(PC07, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PC07, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 3),
|
SERCOM(6, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -341,32 +347,32 @@ PIN(PC07, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA08
|
#ifdef PIN_PA08
|
||||||
PIN(PA08, NO_EXTINT, ADC_INPUT(8), ADC_INPUT(2), TOUCH(6),
|
PIN(PA08, NO_EXTINT, ADC_INPUT(8), ADC_INPUT(2), TOUCH(6),
|
||||||
SERCOM(SERCOM0, 0),
|
SERCOM(0, 0),
|
||||||
SERCOM(SERCOM2, 1),
|
SERCOM(2, 1),
|
||||||
TC(TC0, 0),
|
TC(TC0, 0),
|
||||||
TCC(TCC0, 0),
|
TCC(TCC0, 0),
|
||||||
TCC(TCC1, 4));
|
TCC(TCC1, 4));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA09
|
#ifdef PIN_PA09
|
||||||
PIN(PA09, EXTINT_CHANNEL(9), ADC_INPUT(9), ADC_INPUT(3), TOUCH(7),
|
PIN(PA09, EXTINT_CHANNEL(9), ADC_INPUT(9), ADC_INPUT(3), TOUCH(7),
|
||||||
SERCOM(SERCOM0, 1),
|
SERCOM(0, 1),
|
||||||
SERCOM(SERCOM2, 0),
|
SERCOM(2, 0),
|
||||||
TC(TC0, 1),
|
TC(TC0, 1),
|
||||||
TCC(TCC0, 1),
|
TCC(TCC0, 1),
|
||||||
TCC(TCC1, 5));
|
TCC(TCC1, 5));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA10
|
#ifdef PIN_PA10
|
||||||
PIN(PA10, EXTINT_CHANNEL(10), ADC_INPUT(10), NO_ADC, TOUCH(8),
|
PIN(PA10, EXTINT_CHANNEL(10), ADC_INPUT(10), NO_ADC, TOUCH(8),
|
||||||
SERCOM(SERCOM0, 2),
|
SERCOM(0, 2),
|
||||||
SERCOM(SERCOM2, 2),
|
SERCOM(2, 2),
|
||||||
TC(TC1, 0),
|
TC(TC1, 0),
|
||||||
TCC(TCC0, 2),
|
TCC(TCC0, 2),
|
||||||
TCC(TCC1, 6));
|
TCC(TCC1, 6));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA11
|
#ifdef PIN_PA11
|
||||||
PIN(PA11, EXTINT_CHANNEL(11), ADC_INPUT(11), NO_ADC, TOUCH(9),
|
PIN(PA11, EXTINT_CHANNEL(11), ADC_INPUT(11), NO_ADC, TOUCH(9),
|
||||||
SERCOM(SERCOM0, 3),
|
SERCOM(0, 3),
|
||||||
SERCOM(SERCOM2, 3),
|
SERCOM(2, 3),
|
||||||
TC(TC1, 0),
|
TC(TC1, 0),
|
||||||
TCC(TCC0, 3),
|
TCC(TCC0, 3),
|
||||||
TCC(TCC1, 7));
|
TCC(TCC1, 7));
|
||||||
|
@ -374,7 +380,7 @@ PIN(PA11, EXTINT_CHANNEL(11), ADC_INPUT(11), NO_ADC, TOUCH(9),
|
||||||
#ifdef PIN_PB10
|
#ifdef PIN_PB10
|
||||||
PIN(PB10, EXTINT_CHANNEL(10), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB10, EXTINT_CHANNEL(10), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM4, 2),
|
SERCOM(4, 2),
|
||||||
#ifdef TC5
|
#ifdef TC5
|
||||||
TC(TC5, 0),
|
TC(TC5, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -386,7 +392,7 @@ PIN(PB10, EXTINT_CHANNEL(10), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef PIN_PB11
|
#ifdef PIN_PB11
|
||||||
PIN(PB11, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB11, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM4, 3),
|
SERCOM(4, 3),
|
||||||
#ifdef TC5
|
#ifdef TC5
|
||||||
TC(TC5, 1),
|
TC(TC5, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -402,7 +408,7 @@ PIN(PB12, EXTINT_CHANNEL(12), NO_ADC, NO_ADC,
|
||||||
#else
|
#else
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM4, 0),
|
SERCOM(4, 0),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#ifdef TC4
|
#ifdef TC4
|
||||||
TC(TC4, 0),
|
TC(TC4, 0),
|
||||||
|
@ -423,7 +429,7 @@ PIN(PB13, EXTINT_CHANNEL(13), NO_ADC, NO_ADC,
|
||||||
#else
|
#else
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM4, 1),
|
SERCOM(4, 1),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#ifdef TC4
|
#ifdef TC4
|
||||||
TC(TC4, 1),
|
TC(TC4, 1),
|
||||||
|
@ -444,7 +450,7 @@ PIN(PB14, EXTINT_CHANNEL(14), NO_ADC, NO_ADC,
|
||||||
#else
|
#else
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM4, 2),
|
SERCOM(4, 2),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#ifdef TC5
|
#ifdef TC5
|
||||||
TC(TC5, 0),
|
TC(TC5, 0),
|
||||||
|
@ -465,7 +471,7 @@ PIN(PB15, EXTINT_CHANNEL(15), NO_ADC, NO_ADC,
|
||||||
#else
|
#else
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM4, 3),
|
SERCOM(4, 3),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#ifdef TC5
|
#ifdef TC5
|
||||||
TC(TC5, 1),
|
TC(TC5, 1),
|
||||||
|
@ -483,12 +489,12 @@ PIN(PB15, EXTINT_CHANNEL(15), NO_ADC, NO_ADC,
|
||||||
PIN(PD08, EXTINT_CHANNEL(3), NO_ADC, NO_ADC,
|
PIN(PD08, EXTINT_CHANNEL(3), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 0),
|
SERCOM(7, 0),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 1),
|
SERCOM(6, 1),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -500,12 +506,12 @@ PIN(PD08, EXTINT_CHANNEL(3), NO_ADC, NO_ADC,
|
||||||
PIN(PD09, EXTINT_CHANNEL(4), NO_ADC, NO_ADC,
|
PIN(PD09, EXTINT_CHANNEL(4), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 1),
|
SERCOM(7, 1),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 0),
|
SERCOM(6, 0),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -517,12 +523,12 @@ PIN(PD09, EXTINT_CHANNEL(4), NO_ADC, NO_ADC,
|
||||||
PIN(PD10, EXTINT_CHANNEL(5), NO_ADC, NO_ADC,
|
PIN(PD10, EXTINT_CHANNEL(5), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 2),
|
SERCOM(7, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 2),
|
SERCOM(6, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -534,12 +540,12 @@ PIN(PD10, EXTINT_CHANNEL(5), NO_ADC, NO_ADC,
|
||||||
PIN(PD11, EXTINT_CHANNEL(6), NO_ADC, NO_ADC,
|
PIN(PD11, EXTINT_CHANNEL(6), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 3),
|
SERCOM(7, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 3),
|
SERCOM(6, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -560,12 +566,12 @@ PIN(PD12, EXTINT_CHANNEL(7), NO_ADC, NO_ADC,
|
||||||
PIN(PC10, EXTINT_CHANNEL(10), NO_ADC, NO_ADC,
|
PIN(PC10, EXTINT_CHANNEL(10), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 2),
|
SERCOM(6, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 2),
|
SERCOM(7, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -577,12 +583,12 @@ PIN(PC10, EXTINT_CHANNEL(10), NO_ADC, NO_ADC,
|
||||||
PIN(PC11, EXTINT_CHANNEL(11), NO_ADC, NO_ADC,
|
PIN(PC11, EXTINT_CHANNEL(11), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 3),
|
SERCOM(6, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 3),
|
SERCOM(7, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -594,12 +600,12 @@ PIN(PC11, EXTINT_CHANNEL(11), NO_ADC, NO_ADC,
|
||||||
PIN(PC12, EXTINT_CHANNEL(12), NO_ADC, NO_ADC,
|
PIN(PC12, EXTINT_CHANNEL(12), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 0),
|
SERCOM(7, 0),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 1),
|
SERCOM(6, 1),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -611,12 +617,12 @@ PIN(PC12, EXTINT_CHANNEL(12), NO_ADC, NO_ADC,
|
||||||
PIN(PC13, EXTINT_CHANNEL(13), NO_ADC, NO_ADC,
|
PIN(PC13, EXTINT_CHANNEL(13), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 1),
|
SERCOM(7, 1),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 0),
|
SERCOM(6, 0),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -628,12 +634,12 @@ PIN(PC13, EXTINT_CHANNEL(13), NO_ADC, NO_ADC,
|
||||||
PIN(PC14, EXTINT_CHANNEL(14), NO_ADC, NO_ADC,
|
PIN(PC14, EXTINT_CHANNEL(14), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 2),
|
SERCOM(7, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 2),
|
SERCOM(6, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -645,12 +651,12 @@ PIN(PC14, EXTINT_CHANNEL(14), NO_ADC, NO_ADC,
|
||||||
PIN(PC15, EXTINT_CHANNEL(15), NO_ADC, NO_ADC,
|
PIN(PC15, EXTINT_CHANNEL(15), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 3),
|
SERCOM(7, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 3),
|
SERCOM(6, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -660,16 +666,16 @@ PIN(PC15, EXTINT_CHANNEL(15), NO_ADC, NO_ADC,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA12
|
#ifdef PIN_PA12
|
||||||
PIN(PA12, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PA12, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 0),
|
SERCOM(2, 0),
|
||||||
SERCOM(SERCOM4, 1),
|
SERCOM(4, 1),
|
||||||
TC(TC2, 0),
|
TC(TC2, 0),
|
||||||
TCC(TCC0, 6),
|
TCC(TCC0, 6),
|
||||||
TCC(TCC1, 2));
|
TCC(TCC1, 2));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA13
|
#ifdef PIN_PA13
|
||||||
PIN(PA13, EXTINT_CHANNEL(13), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PA13, EXTINT_CHANNEL(13), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 1),
|
SERCOM(2, 1),
|
||||||
SERCOM(SERCOM4, 0),
|
SERCOM(4, 0),
|
||||||
TC(TC2, 1),
|
TC(TC2, 1),
|
||||||
TCC(TCC0, 7),
|
TCC(TCC0, 7),
|
||||||
TCC(TCC1, 3));
|
TCC(TCC1, 3));
|
||||||
|
@ -678,48 +684,48 @@ PIN(PA13, EXTINT_CHANNEL(13), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
// Third page
|
// Third page
|
||||||
#ifdef PIN_PA14
|
#ifdef PIN_PA14
|
||||||
PIN(PA14, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PA14, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 2),
|
SERCOM(2, 2),
|
||||||
SERCOM(SERCOM4, 2),
|
SERCOM(4, 2),
|
||||||
TC(TC3, 0),
|
TC(TC3, 0),
|
||||||
TCC(TCC2, 0),
|
TCC(TCC2, 0),
|
||||||
TCC(TCC1, 2));
|
TCC(TCC1, 2));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA15
|
#ifdef PIN_PA15
|
||||||
PIN(PA15, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PA15, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 3),
|
SERCOM(2, 3),
|
||||||
SERCOM(SERCOM4, 3),
|
SERCOM(4, 3),
|
||||||
TC(TC3, 1),
|
TC(TC3, 1),
|
||||||
TCC(TCC2, 1),
|
TCC(TCC2, 1),
|
||||||
TCC(TCC1, 3));
|
TCC(TCC1, 3));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA16
|
#ifdef PIN_PA16
|
||||||
PIN(PA16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC, TOUCH(10),
|
PIN(PA16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC, TOUCH(10),
|
||||||
SERCOM(SERCOM1, 0),
|
SERCOM(1, 0),
|
||||||
SERCOM(SERCOM3, 1),
|
SERCOM(3, 1),
|
||||||
TC(TC2, 0),
|
TC(TC2, 0),
|
||||||
TCC(TCC1, 0),
|
TCC(TCC1, 0),
|
||||||
TCC(TCC0, 4));
|
TCC(TCC0, 4));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA17
|
#ifdef PIN_PA17
|
||||||
PIN(PA17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC, TOUCH(11),
|
PIN(PA17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC, TOUCH(11),
|
||||||
SERCOM(SERCOM1, 1),
|
SERCOM(1, 1),
|
||||||
SERCOM(SERCOM3, 0),
|
SERCOM(3, 0),
|
||||||
TC(TC2, 1),
|
TC(TC2, 1),
|
||||||
TCC(TCC1, 1),
|
TCC(TCC1, 1),
|
||||||
TCC(TCC0, 5));
|
TCC(TCC0, 5));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA18
|
#ifdef PIN_PA18
|
||||||
PIN(PA18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC, TOUCH(12),
|
PIN(PA18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC, TOUCH(12),
|
||||||
SERCOM(SERCOM1, 2),
|
SERCOM(1, 2),
|
||||||
SERCOM(SERCOM3, 2),
|
SERCOM(3, 2),
|
||||||
TC(TC3, 0),
|
TC(TC3, 0),
|
||||||
TCC(TCC1, 2),
|
TCC(TCC1, 2),
|
||||||
TCC(TCC0, 6));
|
TCC(TCC0, 6));
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA19
|
#ifdef PIN_PA19
|
||||||
PIN(PA19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC, TOUCH(13),
|
PIN(PA19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC, TOUCH(13),
|
||||||
SERCOM(SERCOM1, 3),
|
SERCOM(1, 3),
|
||||||
SERCOM(SERCOM3, 3),
|
SERCOM(3, 3),
|
||||||
TC(TC3, 1),
|
TC(TC3, 1),
|
||||||
TCC(TCC1, 3),
|
TCC(TCC1, 3),
|
||||||
TCC(TCC0, 7));
|
TCC(TCC0, 7));
|
||||||
|
@ -728,11 +734,11 @@ PIN(PA19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC, TOUCH(13),
|
||||||
PIN(PC16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC,
|
PIN(PC16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 0),
|
SERCOM(6, 0),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM0, 1),
|
SERCOM(0, 1),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC0, 0),
|
TCC(TCC0, 0),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -741,11 +747,11 @@ PIN(PC16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC,
|
||||||
PIN(PC17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC,
|
PIN(PC17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 1),
|
SERCOM(6, 1),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM0, 0),
|
SERCOM(0, 0),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC0, 1),
|
TCC(TCC0, 1),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -754,11 +760,11 @@ PIN(PC17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC,
|
||||||
PIN(PC18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC,
|
PIN(PC18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 2),
|
SERCOM(6, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM0, 2),
|
SERCOM(0, 2),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC0, 2),
|
TCC(TCC0, 2),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -767,11 +773,11 @@ PIN(PC18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC,
|
||||||
PIN(PC19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC,
|
PIN(PC19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#ifdef SERCOM6
|
#ifdef SERCOM6
|
||||||
SERCOM(SERCOM6, 3),
|
SERCOM(6, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM0, 3),
|
SERCOM(0, 3),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC0, 3),
|
TCC(TCC0, 3),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -797,8 +803,8 @@ PIN(PC21, EXTINT_CHANNEL(5), NO_ADC, NO_ADC,
|
||||||
#ifdef PIN_PC22
|
#ifdef PIN_PC22
|
||||||
PIN(PC22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC,
|
PIN(PC22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 0),
|
SERCOM(1, 0),
|
||||||
SERCOM(SERCOM3, 1),
|
SERCOM(3, 1),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC0, 6),
|
TCC(TCC0, 6),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -806,8 +812,8 @@ PIN(PC22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC,
|
||||||
#ifdef PIN_PC23
|
#ifdef PIN_PC23
|
||||||
PIN(PC23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC,
|
PIN(PC23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 1),
|
SERCOM(1, 1),
|
||||||
SERCOM(SERCOM3, 0),
|
SERCOM(3, 0),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC0, 7),
|
TCC(TCC0, 7),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -815,8 +821,8 @@ PIN(PC23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC,
|
||||||
#ifdef PIN_PD20
|
#ifdef PIN_PD20
|
||||||
PIN(PD20, EXTINT_CHANNEL(10), NO_ADC, NO_ADC,
|
PIN(PD20, EXTINT_CHANNEL(10), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 2),
|
SERCOM(1, 2),
|
||||||
SERCOM(SERCOM3, 2),
|
SERCOM(3, 2),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC1, 0),
|
TCC(TCC1, 0),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -824,8 +830,8 @@ PIN(PD20, EXTINT_CHANNEL(10), NO_ADC, NO_ADC,
|
||||||
#ifdef PIN_PD21
|
#ifdef PIN_PD21
|
||||||
PIN(PD21, EXTINT_CHANNEL(11), NO_ADC, NO_ADC,
|
PIN(PD21, EXTINT_CHANNEL(11), NO_ADC, NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 3),
|
SERCOM(1, 3),
|
||||||
SERCOM(SERCOM3, 3),
|
SERCOM(3, 3),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC1, 1),
|
TCC(TCC1, 1),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -836,7 +842,7 @@ PIN(PD21, EXTINT_CHANNEL(11), NO_ADC, NO_ADC,
|
||||||
|
|
||||||
#ifdef PIN_PB16
|
#ifdef PIN_PB16
|
||||||
PIN(PB16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM5, 0),
|
SERCOM(5, 0),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#ifdef TC6
|
#ifdef TC6
|
||||||
TC(TC6, 0),
|
TC(TC6, 0),
|
||||||
|
@ -848,7 +854,7 @@ PIN(PB16, EXTINT_CHANNEL(0), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB17
|
#ifdef PIN_PB17
|
||||||
PIN(PB17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM5, 1),
|
SERCOM(5, 1),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#ifdef TC6
|
#ifdef TC6
|
||||||
TC(TC6, 1),
|
TC(TC6, 1),
|
||||||
|
@ -860,9 +866,9 @@ PIN(PB17, EXTINT_CHANNEL(1), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB18
|
#ifdef PIN_PB18
|
||||||
PIN(PB18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM5, 2),
|
SERCOM(5, 2),
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 2),
|
SERCOM(7, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -872,9 +878,9 @@ PIN(PB18, EXTINT_CHANNEL(2), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB19
|
#ifdef PIN_PB19
|
||||||
PIN(PB19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM5, 3),
|
SERCOM(5, 3),
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 3),
|
SERCOM(7, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -884,9 +890,9 @@ PIN(PB19, EXTINT_CHANNEL(3), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB20
|
#ifdef PIN_PB20
|
||||||
PIN(PB20, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB20, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM5, 0),
|
SERCOM(5, 0),
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 1),
|
SERCOM(7, 1),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -896,9 +902,9 @@ PIN(PB20, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB21
|
#ifdef PIN_PB21
|
||||||
PIN(PB21, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB21, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM5, 1),
|
SERCOM(5, 1),
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 0),
|
SERCOM(7, 0),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
|
@ -908,8 +914,8 @@ PIN(PB21, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA20
|
#ifdef PIN_PA20
|
||||||
PIN(PA20, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, TOUCH(14),
|
PIN(PA20, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, TOUCH(14),
|
||||||
SERCOM(SERCOM5, 2),
|
SERCOM(5, 2),
|
||||||
SERCOM(SERCOM3, 2),
|
SERCOM(3, 2),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 0),
|
TC(TC7, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -920,8 +926,8 @@ PIN(PA20, EXTINT_CHANNEL(4), NO_ADC, NO_ADC, TOUCH(14),
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA21
|
#ifdef PIN_PA21
|
||||||
PIN(PA21, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, TOUCH(15),
|
PIN(PA21, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, TOUCH(15),
|
||||||
SERCOM(SERCOM5, 3),
|
SERCOM(5, 3),
|
||||||
SERCOM(SERCOM3, 3),
|
SERCOM(3, 3),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 1),
|
TC(TC7, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -932,8 +938,8 @@ PIN(PA21, EXTINT_CHANNEL(5), NO_ADC, NO_ADC, TOUCH(15),
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA22
|
#ifdef PIN_PA22
|
||||||
PIN(PA22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, TOUCH(16),
|
PIN(PA22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, TOUCH(16),
|
||||||
SERCOM(SERCOM3, 0),
|
SERCOM(3, 0),
|
||||||
SERCOM(SERCOM5, 1),
|
SERCOM(5, 1),
|
||||||
#ifdef TC4
|
#ifdef TC4
|
||||||
TC(TC4, 0),
|
TC(TC4, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -944,8 +950,8 @@ PIN(PA22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, TOUCH(16),
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA23
|
#ifdef PIN_PA23
|
||||||
PIN(PA23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, TOUCH(17),
|
PIN(PA23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, TOUCH(17),
|
||||||
SERCOM(SERCOM3, 1),
|
SERCOM(3, 1),
|
||||||
SERCOM(SERCOM5, 0),
|
SERCOM(5, 0),
|
||||||
#ifdef TC4
|
#ifdef TC4
|
||||||
TC(TC4, 1),
|
TC(TC4, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -956,8 +962,8 @@ PIN(PA23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, TOUCH(17),
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA24
|
#ifdef PIN_PA24
|
||||||
PIN(PA24, EXTINT_CHANNEL(8), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PA24, EXTINT_CHANNEL(8), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM3, 2),
|
SERCOM(3, 2),
|
||||||
SERCOM(SERCOM5, 2),
|
SERCOM(5, 2),
|
||||||
#ifdef TC5
|
#ifdef TC5
|
||||||
TC(TC5, 0),
|
TC(TC5, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -968,8 +974,8 @@ PIN(PA24, EXTINT_CHANNEL(8), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PA25
|
#ifdef PIN_PA25
|
||||||
PIN(PA25, EXTINT_CHANNEL(9), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PA25, EXTINT_CHANNEL(9), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM3, 3),
|
SERCOM(3, 3),
|
||||||
SERCOM(SERCOM5, 3),
|
SERCOM(5, 3),
|
||||||
#ifdef TC5
|
#ifdef TC5
|
||||||
TC(TC5, 1),
|
TC(TC5, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -982,8 +988,8 @@ PIN(PA25, EXTINT_CHANNEL(9), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
// Fourth page
|
// Fourth page
|
||||||
#ifdef PIN_PB22
|
#ifdef PIN_PB22
|
||||||
PIN(PB22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 2),
|
SERCOM(1, 2),
|
||||||
SERCOM(SERCOM5, 2),
|
SERCOM(5, 2),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 0),
|
TC(TC7, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -994,8 +1000,8 @@ PIN(PB22, EXTINT_CHANNEL(6), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB23
|
#ifdef PIN_PB23
|
||||||
PIN(PB23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 3),
|
SERCOM(1, 3),
|
||||||
SERCOM(SERCOM5, 3),
|
SERCOM(5, 3),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 1),
|
TC(TC7, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -1006,64 +1012,64 @@ PIN(PB23, EXTINT_CHANNEL(7), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB24
|
#ifdef PIN_PB24
|
||||||
PIN(PB24, EXTINT_CHANNEL(8), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB24, EXTINT_CHANNEL(8), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM0, 0),
|
SERCOM(0, 0),
|
||||||
SERCOM(SERCOM2, 1),
|
SERCOM(2, 1),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB25
|
#ifdef PIN_PB25
|
||||||
PIN(PB25, EXTINT_CHANNEL(9), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB25, EXTINT_CHANNEL(9), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM0, 1),
|
SERCOM(0, 1),
|
||||||
SERCOM(SERCOM2, 0),
|
SERCOM(2, 0),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB26
|
#ifdef PIN_PB26
|
||||||
PIN(PB26, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB26, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 0),
|
SERCOM(2, 0),
|
||||||
SERCOM(SERCOM4, 1),
|
SERCOM(4, 1),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC1, 2),
|
TCC(TCC1, 2),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB27
|
#ifdef PIN_PB27
|
||||||
PIN(PB27, EXTINT_CHANNEL(13), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB27, EXTINT_CHANNEL(13), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 1),
|
SERCOM(2, 1),
|
||||||
SERCOM(SERCOM4, 0),
|
SERCOM(4, 0),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC1, 3),
|
TCC(TCC1, 3),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB28
|
#ifdef PIN_PB28
|
||||||
PIN(PB28, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB28, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 2),
|
SERCOM(2, 2),
|
||||||
SERCOM(SERCOM4, 2),
|
SERCOM(4, 2),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC1, 4),
|
TCC(TCC1, 4),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PB29
|
#ifdef PIN_PB29
|
||||||
PIN(PB29, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB29, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM2, 3),
|
SERCOM(2, 3),
|
||||||
SERCOM(SERCOM4, 3),
|
SERCOM(4, 3),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
TCC(TCC1, 5),
|
TCC(TCC1, 5),
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PC24
|
#ifdef PIN_PC24
|
||||||
PIN(PC24, EXTINT_CHANNEL(8), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PC24, EXTINT_CHANNEL(8), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM0, 2),
|
SERCOM(0, 2),
|
||||||
SERCOM(SERCOM2, 2),
|
SERCOM(2, 2),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PC25
|
#ifdef PIN_PC25
|
||||||
PIN(PC25, EXTINT_CHANNEL(9), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PC25, EXTINT_CHANNEL(9), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM0, 3),
|
SERCOM(0, 3),
|
||||||
SERCOM(SERCOM2, 3),
|
SERCOM(2, 3),
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER);
|
NO_TIMER);
|
||||||
|
@ -1078,7 +1084,7 @@ PIN(PC26, EXTINT_CHANNEL(10), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PC27
|
#ifdef PIN_PC27
|
||||||
PIN(PC27, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PC27, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 0),
|
SERCOM(1, 0),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
|
@ -1086,7 +1092,7 @@ PIN(PC27, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
#ifdef PIN_PC28
|
#ifdef PIN_PC28
|
||||||
PIN(PC28, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PC28, EXTINT_CHANNEL(12), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
SERCOM(SERCOM1, 1),
|
SERCOM(1, 1),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
NO_TIMER,
|
NO_TIMER,
|
||||||
|
@ -1103,11 +1109,11 @@ PIN(PA27, EXTINT_CHANNEL(11), NO_ADC, NO_ADC, TOUCH(18),
|
||||||
#ifdef PIN_PA30
|
#ifdef PIN_PA30
|
||||||
PIN(PA30, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, TOUCH(19),
|
PIN(PA30, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, TOUCH(19),
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 2),
|
SERCOM(7, 2),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM1, 2),
|
SERCOM(1, 2),
|
||||||
#ifdef TC6
|
#ifdef TC6
|
||||||
TC(TC6, 0),
|
TC(TC6, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -1119,11 +1125,11 @@ PIN(PA30, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, TOUCH(19),
|
||||||
#ifdef PIN_PA31
|
#ifdef PIN_PA31
|
||||||
PIN(PA31, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PA31, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 3),
|
SERCOM(7, 3),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM1, 23),
|
SERCOM(1, 23),
|
||||||
#ifdef TC6
|
#ifdef TC6
|
||||||
TC(TC6, 1),
|
TC(TC6, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -1135,11 +1141,11 @@ PIN(PA31, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef PIN_PB30
|
#ifdef PIN_PB30
|
||||||
PIN(PB30, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB30, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 0),
|
SERCOM(7, 0),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM5, 1),
|
SERCOM(5, 1),
|
||||||
TC(TC0, 0),
|
TC(TC0, 0),
|
||||||
TCC(TCC4, 0),
|
TCC(TCC4, 0),
|
||||||
TCC(TCC0, 6));
|
TCC(TCC0, 6));
|
||||||
|
@ -1147,11 +1153,11 @@ PIN(PB30, EXTINT_CHANNEL(14), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef PIN_PB31
|
#ifdef PIN_PB31
|
||||||
PIN(PB31, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH,
|
PIN(PB31, EXTINT_CHANNEL(15), NO_ADC, NO_ADC, NO_TOUCH,
|
||||||
#ifdef SERCOM7
|
#ifdef SERCOM7
|
||||||
SERCOM(SERCOM7, 1),
|
SERCOM(7, 1),
|
||||||
#else
|
#else
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
#endif
|
#endif
|
||||||
SERCOM(SERCOM5, 0),
|
SERCOM(5, 0),
|
||||||
TC(TC0, 1),
|
TC(TC0, 1),
|
||||||
TCC(TCC4, 1),
|
TCC(TCC4, 1),
|
||||||
TCC(TCC0, 7));
|
TCC(TCC0, 7));
|
||||||
|
@ -1182,7 +1188,7 @@ PIN(PB00, EXTINT_CHANNEL(0), ADC_INPUT(12), NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 2),
|
SERCOM(5, 2),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 0),
|
TC(TC7, 0),
|
||||||
#else
|
#else
|
||||||
|
@ -1199,7 +1205,7 @@ PIN(PB01, EXTINT_CHANNEL(1), ADC_INPUT(13), NO_ADC,
|
||||||
NO_TOUCH,
|
NO_TOUCH,
|
||||||
#endif
|
#endif
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 3),
|
SERCOM(5, 3),
|
||||||
#ifdef TC7
|
#ifdef TC7
|
||||||
TC(TC7, 1),
|
TC(TC7, 1),
|
||||||
#else
|
#else
|
||||||
|
@ -1211,7 +1217,7 @@ PIN(PB01, EXTINT_CHANNEL(1), ADC_INPUT(13), NO_ADC,
|
||||||
#ifdef PIN_PB02
|
#ifdef PIN_PB02
|
||||||
PIN(PB02, EXTINT_CHANNEL(2), ADC_INPUT(14), NO_ADC, TOUCH(20),
|
PIN(PB02, EXTINT_CHANNEL(2), ADC_INPUT(14), NO_ADC, TOUCH(20),
|
||||||
NO_SERCOM,
|
NO_SERCOM,
|
||||||
SERCOM(SERCOM5, 0),
|
SERCOM(5, 0),
|
||||||
#ifdef TC6
|
#ifdef TC6
|
||||||
TC(TC6, 0),
|
TC(TC6, 0),
|
||||||
#else
|
#else
|
||||||
|
|
|
@ -24,8 +24,8 @@
|
||||||
* THE SOFTWARE.
|
* THE SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PINS_H__
|
#ifndef MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PINS_H
|
||||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PINS_H__
|
#define MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PINS_H
|
||||||
|
|
||||||
#include "include/sam.h"
|
#include "include/sam.h"
|
||||||
|
|
||||||
|
@ -345,4 +345,4 @@ extern const mcu_pin_obj_t pin_PB01;
|
||||||
#ifdef PIN_PB02
|
#ifdef PIN_PB02
|
||||||
extern const mcu_pin_obj_t pin_PB02;
|
extern const mcu_pin_obj_t pin_PB02;
|
||||||
#endif
|
#endif
|
||||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PINS_H__
|
#endif // MICROPY_INCLUDED_ATMEL_SAMD_SAMD51_PINS_H
|
||||||
|
|
|
@ -166,22 +166,23 @@ safe_mode_t port_init(void) {
|
||||||
}
|
}
|
||||||
|
|
||||||
void reset_port(void) {
|
void reset_port(void) {
|
||||||
// Reset all SERCOMs except the one being used by the SPI flash.
|
// Reset all SERCOMs except the ones being used by on-board devices.
|
||||||
// Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS;
|
Sercom *sercom_instances[SERCOM_INST_NUM] = SERCOM_INSTS;
|
||||||
// for (int i = 0; i < SERCOM_INST_NUM; i++) {
|
for (int i = 0; i < SERCOM_INST_NUM; i++) {
|
||||||
// #ifdef SPI_FLASH_SERCOM
|
#ifdef SPI_FLASH_SERCOM
|
||||||
// if (sercom_instances[i] == SPI_FLASH_SERCOM) {
|
if (sercom_instances[i] == SPI_FLASH_SERCOM) {
|
||||||
// continue;
|
continue;
|
||||||
// }
|
}
|
||||||
// #endif
|
#endif
|
||||||
// #ifdef MICROPY_HW_APA102_SERCOM
|
#ifdef MICROPY_HW_APA102_SERCOM
|
||||||
// if (sercom_instances[i] == MICROPY_HW_APA102_SERCOM) {
|
if (sercom_instances[i] == MICROPY_HW_APA102_SERCOM) {
|
||||||
// continue;
|
continue;
|
||||||
// }
|
}
|
||||||
// #endif
|
#endif
|
||||||
// sercom_instances[i]->SPI.CTRLA.bit.SWRST = 1;
|
// SWRST is same for all modes of SERCOMs.
|
||||||
// }
|
sercom_instances[i]->SPI.CTRLA.bit.SWRST = 1;
|
||||||
//
|
}
|
||||||
|
|
||||||
// #ifdef EXPRESS_BOARD
|
// #ifdef EXPRESS_BOARD
|
||||||
// audioout_reset();
|
// audioout_reset();
|
||||||
// touchin_reset();
|
// touchin_reset();
|
||||||
|
|
|
@ -24,8 +24,8 @@
|
||||||
* THE SOFTWARE.
|
* THE SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_TOOLS_AUTOGEN_USB_DESCRIPTOR_H__
|
#ifndef MICROPY_INCLUDED_ATMEL_SAMD_TOOLS_AUTOGEN_USB_DESCRIPTOR_H
|
||||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_TOOLS_AUTOGEN_USB_DESCRIPTOR_H__
|
#define MICROPY_INCLUDED_ATMEL_SAMD_TOOLS_AUTOGEN_USB_DESCRIPTOR_H
|
||||||
|
|
||||||
#include "usb/device/usbdc.h"
|
#include "usb/device/usbdc.h"
|
||||||
|
|
||||||
|
@ -33,4 +33,4 @@ struct usbd_descriptors descriptor_bounds;
|
||||||
uint8_t* serial_number;
|
uint8_t* serial_number;
|
||||||
uint8_t serial_number_length;
|
uint8_t serial_number_length;
|
||||||
|
|
||||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_TOOLS_AUTOGEN_USB_DESCRIPTOR_H__
|
#endif // MICROPY_INCLUDED_ATMEL_SAMD_TOOLS_AUTOGEN_USB_DESCRIPTOR_H
|
||||||
|
|
|
@ -24,8 +24,8 @@
|
||||||
* THE SOFTWARE.
|
* THE SOFTWARE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_USB_H__
|
#ifndef MICROPY_INCLUDED_ATMEL_SAMD_USB_H
|
||||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_USB_H__
|
#define MICROPY_INCLUDED_ATMEL_SAMD_USB_H
|
||||||
|
|
||||||
#include <stdbool.h>
|
#include <stdbool.h>
|
||||||
#include <stdint.h>
|
#include <stdint.h>
|
||||||
|
@ -39,4 +39,4 @@ bool usb_bytes_available(void);
|
||||||
bool usb_connected(void);
|
bool usb_connected(void);
|
||||||
void usb_cdc_background(void);
|
void usb_cdc_background(void);
|
||||||
|
|
||||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_USB_H__
|
#endif // MICROPY_INCLUDED_ATMEL_SAMD_USB_H
|
||||||
|
|
|
@ -32,9 +32,9 @@
|
||||||
#include "shared-bindings/microcontroller/Pin.h"
|
#include "shared-bindings/microcontroller/Pin.h"
|
||||||
#include "shared-bindings/busio/__init__.h"
|
#include "shared-bindings/busio/__init__.h"
|
||||||
#include "shared-bindings/busio/I2C.h"
|
#include "shared-bindings/busio/I2C.h"
|
||||||
#include "shared-bindings/busio/OneWire.h"
|
//xxxx #include "shared-bindings/busio/OneWire.h"
|
||||||
#include "shared-bindings/busio/SPI.h"
|
//xxxx #include "shared-bindings/busio/SPI.h"
|
||||||
#include "shared-bindings/busio/UART.h"
|
//xxxx #include "shared-bindings/busio/UART.h"
|
||||||
#include "shared-bindings/busio/__init__.h"
|
#include "shared-bindings/busio/__init__.h"
|
||||||
|
|
||||||
#include "py/runtime.h"
|
#include "py/runtime.h"
|
||||||
|
@ -88,9 +88,9 @@
|
||||||
STATIC const mp_rom_map_elem_t busio_module_globals_table[] = {
|
STATIC const mp_rom_map_elem_t busio_module_globals_table[] = {
|
||||||
{ MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_busio) },
|
{ MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_busio) },
|
||||||
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&busio_i2c_type) },
|
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&busio_i2c_type) },
|
||||||
{ MP_ROM_QSTR(MP_QSTR_OneWire), MP_ROM_PTR(&busio_onewire_type) },
|
//xxxx { MP_ROM_QSTR(MP_QSTR_OneWire), MP_ROM_PTR(&busio_onewire_type) },
|
||||||
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&busio_spi_type) },
|
//xxxx { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&busio_spi_type) },
|
||||||
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&busio_uart_type) },
|
//xxxx { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&busio_uart_type) },
|
||||||
};
|
};
|
||||||
|
|
||||||
STATIC MP_DEFINE_CONST_DICT(busio_module_globals, busio_module_globals_table);
|
STATIC MP_DEFINE_CONST_DICT(busio_module_globals, busio_module_globals_table);
|
||||||
|
|
Loading…
Reference in New Issue