Add some NORETURN attributes
I have a function where it should be impossible to reach the end, so I put in a safe-mode reset at the bottom: ``` int find_unused_slot(void) { // precondition: you already verified that a slot was available for (int i=0; i<NUM_SLOTS; i++) { if( slot_free(i)) { return i; } } safe_mode_reset(MICROPY_FATAL_ERROR); } ``` However, the compiler still gave a diagnostic, because safe_mode_reset was not declared NORETURN. So I started by teaching the compiler that reset_into_safe_mode never returned. This leads at least one level deeper due to reset_cpu needing to be a NORETURN function. Each port is a little different in this area. I also marked reset_to_bootloader as NORETURN. Additional notes: * stm32's reset_to_bootloader was not implemented, but now does a bare reset. Most stm32s are not fitted with uf2 bootloaders anyway. * ditto cxd56 * esp32s2 did not implement reset_cpu at all. I used esp_restart(). (not tested) * litex did not implement reset_cpu at all. I used reboot_ctrl_write. But notably this is what reset_to_bootloader already did, so one or the other must be incorrect (not tested). reboot_ctrl_write cannot be declared NORETURN, as it returns unless the special value 0xac is written), so a new unreachable forever-loop is added. * cxd56's reset is via a boardctl() call which can't generically be declared NORETURN, so a new unreacahble "for(;;)" forever-loop is added. * In several places, NVIC_SystemReset is redeclared with NORETURN applied. This is accepted just fine by gcc. I chose this as preferable to editing the multiple copies of CMSIS headers where it is normally declared. * the stub safe_mode reset simply aborts. This is used in mpy-cross.
This commit is contained in:
parent
6bfcb01ee7
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726dcdb60a
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@ -29,6 +29,8 @@
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#include "reset.h"
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#include "reset.h"
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#include "supervisor/filesystem.h"
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#include "supervisor/filesystem.h"
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void NVIC_SystemReset(void) NORETURN;
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void reset(void) {
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void reset(void) {
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filesystem_flush();
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filesystem_flush();
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NVIC_SystemReset();
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NVIC_SystemReset();
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@ -29,14 +29,16 @@
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#include <stdbool.h>
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#include <stdbool.h>
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#include <stdint.h>
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#include <stdint.h>
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#include "py/mpconfig.h"
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// Copied from inc/uf2.h in https://github.com/Microsoft/uf2-samd21
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// Copied from inc/uf2.h in https://github.com/Microsoft/uf2-samd21
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#define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set
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#define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set
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#define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef
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#define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef
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extern uint32_t _bootloader_dbl_tap;
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extern uint32_t _bootloader_dbl_tap;
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void reset_to_bootloader(void);
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void reset_to_bootloader(void) NORETURN;
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void reset(void);
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void reset(void) NORETURN;
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bool bootloader_available(void);
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bool bootloader_available(void);
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#endif // MICROPY_INCLUDED_ATMEL_SAMD_RESET_H
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#endif // MICROPY_INCLUDED_ATMEL_SAMD_RESET_H
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@ -71,6 +71,8 @@ safe_mode_t port_init(void) {
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void reset_cpu(void) {
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void reset_cpu(void) {
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boardctl(BOARDIOC_RESET, 0);
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boardctl(BOARDIOC_RESET, 0);
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for (;;) {
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}
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}
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}
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void reset_port(void) {
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void reset_port(void) {
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@ -91,6 +93,9 @@ void reset_port(void) {
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}
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}
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void reset_to_bootloader(void) {
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void reset_to_bootloader(void) {
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boardctl(BOARDIOC_RESET, 0);
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for (;;) {
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}
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}
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}
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supervisor_allocation* port_fixed_stack(void) {
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supervisor_allocation* port_fixed_stack(void) {
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@ -121,6 +121,7 @@ void reset_to_bootloader(void) {
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}
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}
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void reset_cpu(void) {
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void reset_cpu(void) {
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esp_restart();
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}
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}
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uint32_t *port_heap_get_bottom(void) {
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uint32_t *port_heap_get_bottom(void) {
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void reset_to_bootloader(void) {
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void reset_to_bootloader(void) {
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reboot_ctrl_write(0xac);
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reboot_ctrl_write(0xac);
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for(;;) {}
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}
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}
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void reset_cpu(void) {
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void reset_cpu(void) {
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// "You can reset Fomu by writing a special value to the CSR_REBOOT_CTRL
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// register at 0xe0006000L. All writes to this register must start with
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// 0xac, to ensure random values aren’t written. We can reboot Fomu by
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// simply writing this value" --
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// https://workshop.fomu.im/en/latest/riscv.html
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reboot_ctrl_write(0xac);
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for(;;) {}
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}
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}
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supervisor_allocation* port_fixed_stack(void) {
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supervisor_allocation* port_fixed_stack(void) {
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#define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set
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#define DBL_TAP_MAGIC 0xf01669ef // Randomly selected, adjusted to have first and last bit set
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#define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef
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#define DBL_TAP_MAGIC_QUICK_BOOT 0xf02669ef
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void reset_to_bootloader(void);
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void reset_to_bootloader(void) NORETURN;
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void reset(void);
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void reset(void) NORETURN;
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bool bootloader_available(void);
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bool bootloader_available(void);
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#endif // MICROPY_INCLUDED_MIMXRT10XX_RESET_H
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#endif // MICROPY_INCLUDED_MIMXRT10XX_RESET_H
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uint32_t ticks = nrfx_rtc_counter_get(&rtc_instance);
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uint32_t ticks = nrfx_rtc_counter_get(&rtc_instance);
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overflow_tracker.overflowed_ticks += ticks / 32;
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overflow_tracker.overflowed_ticks += ticks / 32;
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NVIC_SystemReset();
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NVIC_SystemReset();
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for (;;) {
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}
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}
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}
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// The uninitialized data section is placed directly after BSS, under the theory
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// The uninitialized data section is placed directly after BSS, under the theory
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#include STM32_HAL_H
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#include STM32_HAL_H
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void NVIC_SystemReset(void) NORETURN;
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#if (CPY_STM32H7) || (CPY_STM32F7)
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#if (CPY_STM32H7) || (CPY_STM32F7)
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// Device memories must be accessed in order.
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// Device memories must be accessed in order.
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}
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}
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void reset_to_bootloader(void) {
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void reset_to_bootloader(void) {
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NVIC_SystemReset();
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}
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}
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void reset_cpu(void) {
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void reset_cpu(void) {
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safe_mode_t port_init(void);
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safe_mode_t port_init(void);
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// Reset the microcontroller completely.
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// Reset the microcontroller completely.
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void reset_cpu(void);
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void reset_cpu(void) NORETURN;
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// Reset the microcontroller state.
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// Reset the microcontroller state.
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void reset_port(void);
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void reset_port(void);
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void reset_board(void);
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void reset_board(void);
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// Reset to the bootloader
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// Reset to the bootloader
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void reset_to_bootloader(void);
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void reset_to_bootloader(void) NORETURN;
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// Get stack limit address
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// Get stack limit address
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uint32_t *port_stack_get_limit(void);
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uint32_t *port_stack_get_limit(void);
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#ifndef MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H
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#ifndef MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H
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#define MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H
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#define MICROPY_INCLUDED_SUPERVISOR_SAFE_MODE_H
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#include "py/mpconfig.h"
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typedef enum {
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typedef enum {
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NO_SAFE_MODE = 0,
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NO_SAFE_MODE = 0,
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BROWNOUT,
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BROWNOUT,
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safe_mode_t wait_for_safe_mode_reset(void);
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safe_mode_t wait_for_safe_mode_reset(void);
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void safe_mode_on_next_reset(safe_mode_t reason);
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void safe_mode_on_next_reset(safe_mode_t reason);
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void reset_into_safe_mode(safe_mode_t reason);
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void reset_into_safe_mode(safe_mode_t reason) NORETURN;
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void print_safe_mode_message(safe_mode_t reason);
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void print_safe_mode_message(safe_mode_t reason);
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#include "supervisor/shared/safe_mode.h"
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#include "supervisor/shared/safe_mode.h"
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#include <stdlib.h>
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safe_mode_t wait_for_safe_mode_reset(void) {
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safe_mode_t wait_for_safe_mode_reset(void) {
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return NO_SAFE_MODE;
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return NO_SAFE_MODE;
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}
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}
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void reset_into_safe_mode(safe_mode_t reason) {
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void reset_into_safe_mode(safe_mode_t reason) {
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(void) reason;
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(void) reason;
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for (;;) {
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abort();
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}
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}
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}
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void print_safe_mode_message(safe_mode_t reason) {
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void print_safe_mode_message(safe_mode_t reason) {
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