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corrected pre-commit errors

This commit is contained in:
root 2022-04-13 12:04:28 -04:00
parent 60e330fb0d
commit 716497c132
10 changed files with 203 additions and 176 deletions
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6
locale/circuitpython.pot
View File

@ -2149,6 +2149,10 @@ msgstr ""
msgid "Set pin count must be between 1 and 5"
msgstr ""
#: shared-bindings/microcontroller/Processor.c
msgid "Settable Clock Not Implemented for Your Board"
msgstr ""
#: ports/raspberrypi/bindings/rp2pio/StateMachine.c
msgid "Side set pin count must be between 1 and 5"
msgstr ""
@ -3019,7 +3023,7 @@ msgstr ""
msgid "complex values not supported"
msgstr ""
#: extmod/moduzlib.c shared-module/zlib/DecompIO.c
#: extmod/moduzlib.c
msgid "compression header"
msgstr ""

2
ports/mimxrt10xx/boards/sparkfun_teensy_micromod/mpconfigboard.h
View File

@ -20,4 +20,4 @@
#define CIRCUITPY_USB_DEVICE_INSTANCE 0
#define CIRCUITPY_USB_HOST_INSTANCE 1
#define HAS_SETTABLE_CLOCK 1
#define HAS_SETTABLE_CLOCK 1

2
ports/mimxrt10xx/boards/teensy40/mpconfigboard.h
View File

@ -17,4 +17,4 @@
#define DEFAULT_UART_BUS_RX (&pin_GPIO_AD_B0_03)
#define DEFAULT_UART_BUS_TX (&pin_GPIO_AD_B0_02)
#define HAS_SETTABLE_CLOCK 1
#define HAS_SETTABLE_CLOCK 1

2
ports/mimxrt10xx/boards/teensy41/mpconfigboard.h
View File

@ -20,4 +20,4 @@
#define CIRCUITPY_USB_DEVICE_INSTANCE 0
#define CIRCUITPY_USB_HOST_INSTANCE 1
#define HAS_SETTABLE_CLOCK 1
#define HAS_SETTABLE_CLOCK 1

6
ports/mimxrt10xx/common-hal/microcontroller/Processor.c
View File

@ -25,7 +25,7 @@
* THE SOFTWARE.
*/
//https://raw.githubusercontent.com/adafruit/circuitpython/main/ports/mimxrt10xx/common-hal/microcontroller/Processor.c
// https://raw.githubusercontent.com/adafruit/circuitpython/main/ports/mimxrt10xx/common-hal/microcontroller/Processor.c
#include <math.h>
@ -54,7 +54,7 @@ float common_hal_mcu_processor_get_temperature(void) {
uint32_t common_hal_mcu_processor_set_sys_clock(mcu_processor_obj_t *self,
uint32_t frequency) {
SystemCoreClock = setarmclock(frequency);
SystemCoreClock = setarmclock(frequency);
return SystemCoreClock;
}
@ -84,4 +84,4 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) {
mcu_reset_reason_t common_hal_mcu_processor_get_reset_reason(void) {
return RESET_REASON_UNKNOWN;
}
}

2
ports/mimxrt10xx/common-hal/microcontroller/Processor.h
View File

@ -36,7 +36,7 @@
typedef struct {
mp_obj_base_t base;
// Stores no state currently.
uint32_t frequency;
uint32_t frequency;
} mcu_processor_obj_t;
#endif // MICROPY_INCLUDED_MIMXRT10XX_COMMON_HAL_MICROCONTROLLER_PROCESSOR_H

335
ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/clocks.c
View File

@ -359,7 +359,7 @@ void clocks_init(void) {
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
//Note setarmclock is a port from Teensyduino for the Teensy 4.x written by Paul Stroffgren,
// Note setarmclock is a port from Teensyduino for the Teensy 4.x written by Paul Stroffgren,
// A brief explanation of F_CPU_ACTUAL vs F_CPU
// https://forum.pjrc.com/threads/57236?p=212642&viewfull=1#post212642
volatile uint32_t F_CPU_ACTUAL = 396000000;
@ -373,25 +373,25 @@ volatile uint32_t F_BUS_ACTUAL = 132000000;
#define OVERCLOCK_STEPSIZE 28000000
#define OVERCLOCK_MAX_VOLT 1575
#define DCDC_REG3 0x40080012
#define DCDC_REG0 0x40080000
#define DCDC_REG0_STS_DC_OK_L ((uint32_t)(1<<31))
#define CCM_ANALOG_PLL_USB1_ENABLE_L ((uint32_t)(1<<13))
#define CCM_ANALOG_PLL_USB1_POWER_L ((uint32_t)(1<<12))
#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS_L ((uint32_t)(1<<6))
#define CCM_ANALOG_PLL_USB1_LOCK_L ((uint32_t)(1<<31))
#define CCM_CCGR6_DCDC(n) ((uint32_t)(((n) & 0x03) << 6))
#define CCM_ANALOG_PLL_ARM_LOCK_L ((uint32_t)(1<<31))
#define CCM_ANALOG_PLL_ARM_BYPASS_L ((uint32_t)(1<<16))
#define CCM_ANALOG_PLL_ARM_ENABLE_L ((uint32_t)(1<<13))
#define CCM_ANALOG_PLL_ARM_POWERDOWN_L ((uint32_t)(1<<12))
#define CCM_CDHIPR_ARM_PODF_BUSY_L ((uint32_t)(1<<16))
#define CCM_CDHIPR_AHB_PODF_BUSY_L ((uint32_t)(1<<1))
#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_L ((uint32_t)(1<<5))
#define CCM_CBCDR_PERIPH_CLK_SEL_L ((uint32_t)(1<<25))
#define CCM_CCGR_OFF 0
#define CCM_CCGR_ON_RUNONLY 1
#define CCM_CCGR_ON 3
#define DCDC_REG3 0x40080012
#define DCDC_REG0 0x40080000
#define DCDC_REG0_STS_DC_OK_L ((uint32_t)(1 << 31))
#define CCM_ANALOG_PLL_USB1_ENABLE_L ((uint32_t)(1 << 13))
#define CCM_ANALOG_PLL_USB1_POWER_L ((uint32_t)(1 << 12))
#define CCM_ANALOG_PLL_USB1_EN_USB_CLKS_L ((uint32_t)(1 << 6))
#define CCM_ANALOG_PLL_USB1_LOCK_L ((uint32_t)(1 << 31))
#define CCM_CCGR6_DCDC(n) ((uint32_t)(((n) & 0x03) << 6))
#define CCM_ANALOG_PLL_ARM_LOCK_L ((uint32_t)(1 << 31))
#define CCM_ANALOG_PLL_ARM_BYPASS_L ((uint32_t)(1 << 16))
#define CCM_ANALOG_PLL_ARM_ENABLE_L ((uint32_t)(1 << 13))
#define CCM_ANALOG_PLL_ARM_POWERDOWN_L ((uint32_t)(1 << 12))
#define CCM_CDHIPR_ARM_PODF_BUSY_L ((uint32_t)(1 << 16))
#define CCM_CDHIPR_AHB_PODF_BUSY_L ((uint32_t)(1 << 1))
#define CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_L ((uint32_t)(1 << 5))
#define CCM_CBCDR_PERIPH_CLK_SEL_L ((uint32_t)(1 << 25))
#define CCM_CCGR_OFF 0
#define CCM_CCGR_ON_RUNONLY 1
#define CCM_CCGR_ON 3
/* Teensyduino Core Library - clockspeed.c
* http://www.pjrc.com/teensy/
@ -423,7 +423,7 @@ volatile uint32_t F_BUS_ACTUAL = 132000000;
* SOFTWARE.
*/
//uint32_t set_arm_clock(uint32_t frequency);
// uint32_t set_arm_clock(uint32_t frequency);
// stuff needing wait handshake:
// CCM_CACRR ARM_PODF
@ -432,151 +432,174 @@ volatile uint32_t F_BUS_ACTUAL = 132000000;
// CCM_CBCDR AHB_PODF
// CCM_CBCDR SEMC_PODF
uint32_t setarmclock(uint32_t frequency)
{
uint32_t cbcdr = CCM->CBCDR; // pg 1021
uint32_t cbcmr = CCM->CBCMR; // pg 1023
uint32_t dcdc = DCDC->REG3;
uint32_t setarmclock(uint32_t frequency) {
uint32_t cbcdr = CCM->CBCDR; // pg 1021
uint32_t cbcmr = CCM->CBCMR; // pg 1023
uint32_t dcdc = DCDC->REG3;
// compute required voltage
uint32_t voltage = 1150; // default = 1.15V
if (frequency > 528000000) {
voltage = 1250; // 1.25V
#if defined(OVERCLOCK_STEPSIZE) && defined(OVERCLOCK_MAX_VOLT)
if (frequency > 600000000) {
voltage += ((frequency - 600000000) / OVERCLOCK_STEPSIZE) * 25;
if (voltage > OVERCLOCK_MAX_VOLT) voltage = OVERCLOCK_MAX_VOLT;
}
#endif
} else if (frequency <= 24000000) {
voltage = 950; // 0.95
}
// compute required voltage
uint32_t voltage = 1150; // default = 1.15V
if (frequency > 528000000) {
voltage = 1250; // 1.25V
#if defined(OVERCLOCK_STEPSIZE) && defined(OVERCLOCK_MAX_VOLT)
if (frequency > 600000000) {
voltage += ((frequency - 600000000) / OVERCLOCK_STEPSIZE) * 25;
if (voltage > OVERCLOCK_MAX_VOLT) {
voltage = OVERCLOCK_MAX_VOLT;
}
}
#endif
} else if (frequency <= 24000000) {
voltage = 950; // 0.95
}
// if voltage needs to increase, do it before switch clock speed
CCM->CCGR6 |= CCM_CCGR6_DCDC(CCM_CCGR_ON);
if ((dcdc & ((uint32_t)(0x1F << 0))) < ((uint32_t)(((voltage - 800) / 25) & 0x1F) << 0)) {
//printf("Increasing voltage to %u mV\n", voltage);
dcdc &= ~((uint32_t)(0x1F << 0));
dcdc |= ((uint32_t)(((voltage - 800) / 25) & 0x1F) << 0);
DCDC->REG3 = dcdc;
while (!(DCDC->REG0 & DCDC_REG0_STS_DC_OK_L)) ; // wait voltage settling
}
// if voltage needs to increase, do it before switch clock speed
CCM->CCGR6 |= CCM_CCGR6_DCDC(CCM_CCGR_ON);
if ((dcdc & ((uint32_t)(0x1F << 0))) < ((uint32_t)(((voltage - 800) / 25) & 0x1F) << 0)) {
// printf("Increasing voltage to %u mV\n", voltage);
dcdc &= ~((uint32_t)(0x1F << 0));
dcdc |= ((uint32_t)(((voltage - 800) / 25) & 0x1F) << 0);
DCDC->REG3 = dcdc;
while (!(DCDC->REG0 & DCDC_REG0_STS_DC_OK_L)) {
; // wait voltage settling
}
}
if (!(cbcdr & CCM_CBCDR_PERIPH_CLK_SEL_L)) {
//printf("need to switch to alternate clock during reconfigure of ARM PLL\n");
const uint32_t need1s = CCM_ANALOG_PLL_USB1_ENABLE_L | CCM_ANALOG_PLL_USB1_POWER_L |
CCM_ANALOG_PLL_USB1_LOCK_L | CCM_ANALOG_PLL_USB1_EN_USB_CLKS_L;
uint32_t sel, div;
if ((CCM_ANALOG->PLL_USB1 & need1s) == need1s) {
//printf("USB PLL is running, so we can use 120 MHz\n");
sel = 0;
div = 3; // divide down to 120 MHz, so IPG is ok even if IPG_PODF=0
} else {
//printf("USB PLL is off, use 24 MHz crystal\n");
sel = 1;
div = 0;
}
if ((cbcdr & ((uint32_t)(0x07 << 27))) != CCM_CBCDR_PERIPH_CLK2_PODF(div)) {
// PERIPH_CLK2 divider needs to be changed
cbcdr &= ~((uint32_t)(0x07 << 27));
cbcdr |= CCM_CBCDR_PERIPH_CLK2_PODF(div);
CCM->CBCDR = cbcdr;
}
if ((cbcmr & ((uint32_t)(0x03 << 12))) != CCM_CBCMR_PERIPH_CLK2_SEL(sel)) {
// PERIPH_CLK2 source select needs to be changed
cbcmr &= ~((uint32_t)(0x03 << 12));
cbcmr |= CCM_CBCMR_PERIPH_CLK2_SEL(sel);
CCM->CBCMR = cbcmr;
while (CCM->CDHIPR & ((uint32_t)(1<<3))) ; // wait
}
// switch over to PERIPH_CLK2
cbcdr |= ((uint32_t)(1<<25));
CCM->CBCDR = cbcdr;
while (CCM->CDHIPR & ((uint32_t)(1<<5))) ; // wait
} else {
//printf("already running from PERIPH_CLK2, safe to mess with ARM PLL\n");
}
if (!(cbcdr & CCM_CBCDR_PERIPH_CLK_SEL_L)) {
// printf("need to switch to alternate clock during reconfigure of ARM PLL\n");
const uint32_t need1s = CCM_ANALOG_PLL_USB1_ENABLE_L | CCM_ANALOG_PLL_USB1_POWER_L |
CCM_ANALOG_PLL_USB1_LOCK_L | CCM_ANALOG_PLL_USB1_EN_USB_CLKS_L;
uint32_t sel, div;
if ((CCM_ANALOG->PLL_USB1 & need1s) == need1s) {
// printf("USB PLL is running, so we can use 120 MHz\n");
sel = 0;
div = 3; // divide down to 120 MHz, so IPG is ok even if IPG_PODF=0
} else {
// printf("USB PLL is off, use 24 MHz crystal\n");
sel = 1;
div = 0;
}
if ((cbcdr & ((uint32_t)(0x07 << 27))) != CCM_CBCDR_PERIPH_CLK2_PODF(div)) {
// PERIPH_CLK2 divider needs to be changed
cbcdr &= ~((uint32_t)(0x07 << 27));
cbcdr |= CCM_CBCDR_PERIPH_CLK2_PODF(div);
CCM->CBCDR = cbcdr;
}
if ((cbcmr & ((uint32_t)(0x03 << 12))) != CCM_CBCMR_PERIPH_CLK2_SEL(sel)) {
// PERIPH_CLK2 source select needs to be changed
cbcmr &= ~((uint32_t)(0x03 << 12));
cbcmr |= CCM_CBCMR_PERIPH_CLK2_SEL(sel);
CCM->CBCMR = cbcmr;
while (CCM->CDHIPR & ((uint32_t)(1 << 3))) {
; // wait
}
}
// switch over to PERIPH_CLK2
cbcdr |= ((uint32_t)(1 << 25));
CCM->CBCDR = cbcdr;
while (CCM->CDHIPR & ((uint32_t)(1 << 5))) {
; // wait
}
} else {
// printf("already running from PERIPH_CLK2, safe to mess with ARM PLL\n");
}
// TODO: check if PLL2 running, can 352, 396 or 528 can work? (no need for ARM PLL)
// TODO: check if PLL2 running, can 352, 396 or 528 can work? (no need for ARM PLL)
// DIV_SELECT: 54-108 = official range 648 to 1296 in 12 MHz steps
uint32_t div_arm = 1;
uint32_t div_ahb = 1;
while (frequency * div_arm * div_ahb < 648000000) {
if (div_arm < 8) {
div_arm = div_arm + 1;
} else {
if (div_ahb < 5) {
div_ahb = div_ahb + 1;
div_arm = 1;
} else {
break;
}
}
}
uint32_t mult = (frequency * div_arm * div_ahb + 6000000) / 12000000;
if (mult > 108) mult = 108;
if (mult < 54) mult = 54;
//printf("Freq: 12 MHz * %u / %u / %u\n", mult, div_arm, div_ahb);
frequency = mult * 12000000 / div_arm / div_ahb;
// DIV_SELECT: 54-108 = official range 648 to 1296 in 12 MHz steps
uint32_t div_arm = 1;
uint32_t div_ahb = 1;
while (frequency * div_arm * div_ahb < 648000000) {
if (div_arm < 8) {
div_arm = div_arm + 1;
} else {
if (div_ahb < 5) {
div_ahb = div_ahb + 1;
div_arm = 1;
} else {
break;
}
}
}
uint32_t mult = (frequency * div_arm * div_ahb + 6000000) / 12000000;
if (mult > 108) {
mult = 108;
}
if (mult < 54) {
mult = 54;
}
// printf("Freq: 12 MHz * %u / %u / %u\n", mult, div_arm, div_ahb);
frequency = mult * 12000000 / div_arm / div_ahb;
//printf("ARM PLL=%x\n", CCM_ANALOG->PLL_ARM);
const uint32_t arm_pll_mask = CCM_ANALOG_PLL_ARM_LOCK_L | CCM_ANALOG_PLL_ARM_BYPASS_L |
CCM_ANALOG_PLL_ARM_ENABLE_L | CCM_ANALOG_PLL_ARM_POWERDOWN_L |
CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK;
if ((CCM_ANALOG->PLL_ARM & arm_pll_mask) != (CCM_ANALOG_PLL_ARM_LOCK_L
| CCM_ANALOG_PLL_ARM_ENABLE_L | CCM_ANALOG_PLL_ARM_DIV_SELECT(mult))) {
//printf("ARM PLL needs reconfigure\n");
CCM_ANALOG->PLL_ARM = CCM_ANALOG_PLL_ARM_POWERDOWN_L;
// TODO: delay needed?
CCM_ANALOG->PLL_ARM = CCM_ANALOG_PLL_ARM_ENABLE_L
| CCM_ANALOG_PLL_ARM_DIV_SELECT(mult);
while (!(CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_L)) ; // wait for lock
//printf("ARM PLL=%x\n", CCM_ANALOG->PLL_ARM);
} else {
//printf("ARM PLL already running at required frequency\n");
}
// printf("ARM PLL=%x\n", CCM_ANALOG->PLL_ARM);
const uint32_t arm_pll_mask = CCM_ANALOG_PLL_ARM_LOCK_L | CCM_ANALOG_PLL_ARM_BYPASS_L |
CCM_ANALOG_PLL_ARM_ENABLE_L | CCM_ANALOG_PLL_ARM_POWERDOWN_L |
CCM_ANALOG_PLL_ARM_DIV_SELECT_MASK;
if ((CCM_ANALOG->PLL_ARM & arm_pll_mask) != (CCM_ANALOG_PLL_ARM_LOCK_L
| CCM_ANALOG_PLL_ARM_ENABLE_L | CCM_ANALOG_PLL_ARM_DIV_SELECT(mult))) {
// printf("ARM PLL needs reconfigure\n");
CCM_ANALOG->PLL_ARM = CCM_ANALOG_PLL_ARM_POWERDOWN_L;
// TODO: delay needed?
CCM_ANALOG->PLL_ARM = CCM_ANALOG_PLL_ARM_ENABLE_L
| CCM_ANALOG_PLL_ARM_DIV_SELECT(mult);
while (!(CCM_ANALOG->PLL_ARM & CCM_ANALOG_PLL_ARM_LOCK_L)) {
; // wait for lock
}
// printf("ARM PLL=%x\n", CCM_ANALOG->PLL_ARM);
} else {
// printf("ARM PLL already running at required frequency\n");
}
if ((CCM->CACRR & ((uint32_t)(0x07 << 0))) != (div_arm - 1)) {
CCM->CACRR = CCM_CACRR_ARM_PODF(div_arm - 1);
while (CCM->CDHIPR & CCM_CDHIPR_ARM_PODF_BUSY_L) ; // wait
}
if ((CCM->CACRR & ((uint32_t)(0x07 << 0))) != (div_arm - 1)) {
CCM->CACRR = CCM_CACRR_ARM_PODF(div_arm - 1);
while (CCM->CDHIPR & CCM_CDHIPR_ARM_PODF_BUSY_L) {
; // wait
}
}
if ((cbcdr & ((uint32_t)(0x07 << 10))) != CCM_CBCDR_AHB_PODF(div_ahb - 1)) {
cbcdr &= ~((uint32_t)(0x07 << 10));
cbcdr |= CCM_CBCDR_AHB_PODF(div_ahb - 1);
CCM->CBCDR = cbcdr;
while (CCM->CDHIPR & CCM_CDHIPR_AHB_PODF_BUSY_L); // wait
}
if ((cbcdr & ((uint32_t)(0x07 << 10))) != CCM_CBCDR_AHB_PODF(div_ahb - 1)) {
cbcdr &= ~((uint32_t)(0x07 << 10));
cbcdr |= CCM_CBCDR_AHB_PODF(div_ahb - 1);
CCM->CBCDR = cbcdr;
while (CCM->CDHIPR & CCM_CDHIPR_AHB_PODF_BUSY_L) {
; // wait
}
}
uint32_t div_ipg = (frequency + 149999999) / 150000000;
if (div_ipg > 4) div_ipg = 4;
if ((cbcdr & ((uint32_t)(0x03 << 8))) != (CCM_CBCDR_IPG_PODF(div_ipg - 1))) {
cbcdr &= ~((uint32_t)(0x03 << 8));
cbcdr |= CCM_CBCDR_IPG_PODF(div_ipg - 1);
// TODO: how to safely change IPG_PODF ??
CCM->CBCDR = cbcdr;
}
uint32_t div_ipg = (frequency + 149999999) / 150000000;
if (div_ipg > 4) {
div_ipg = 4;
}
if ((cbcdr & ((uint32_t)(0x03 << 8))) != (CCM_CBCDR_IPG_PODF(div_ipg - 1))) {
cbcdr &= ~((uint32_t)(0x03 << 8));
cbcdr |= CCM_CBCDR_IPG_PODF(div_ipg - 1);
// TODO: how to safely change IPG_PODF ??
CCM->CBCDR = cbcdr;
}
//cbcdr &= ~CCM_CBCDR_PERIPH_CLK_SEL;
//CCM_CBCDR = cbcdr; // why does this not work at 24 MHz?
CCM->CBCDR &= ~((uint32_t)(1<<25));
while (CCM->CDHIPR & CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_L) ; // wait
// cbcdr &= ~CCM_CBCDR_PERIPH_CLK_SEL;
// CCM_CBCDR = cbcdr; // why does this not work at 24 MHz?
CCM->CBCDR &= ~((uint32_t)(1 << 25));
while (CCM->CDHIPR & CCM_CDHIPR_PERIPH_CLK_SEL_BUSY_L) {
; // wait
F_CPU_ACTUAL = frequency;
F_BUS_ACTUAL = frequency / div_ipg;
//scale_cpu_cycles_to_microseconds = 0xFFFFFFFFu / (uint32_t)(frequency / 1000000u);
}
F_CPU_ACTUAL = frequency;
F_BUS_ACTUAL = frequency / div_ipg;
// scale_cpu_cycles_to_microseconds = 0xFFFFFFFFu / (uint32_t)(frequency / 1000000u);
//printf("New Frequency: ARM=%u, IPG=%u\n", frequency, frequency / div_ipg);
// printf("New Frequency: ARM=%u, IPG=%u\n", frequency, frequency / div_ipg);
// if voltage needs to decrease, do it after switch clock speed
if ((dcdc & ((uint32_t)(0x1F << 0))) > ((uint32_t)(((voltage - 800) / 25) & 0x1F) << 0)) {
//printf("Decreasing voltage to %u mV\n", voltage);
dcdc &= ~((uint32_t)(0x1F << 0));
dcdc |= ((uint32_t)(0x1F << 0));
DCDC->REG3 = dcdc;
while (!(DCDC->REG0 & DCDC_REG0_STS_DC_OK_L)) ; // wait voltage settling
}
return frequency;
}
// if voltage needs to decrease, do it after switch clock speed
if ((dcdc & ((uint32_t)(0x1F << 0))) > ((uint32_t)(((voltage - 800) / 25) & 0x1F) << 0)) {
// printf("Decreasing voltage to %u mV\n", voltage);
dcdc &= ~((uint32_t)(0x1F << 0));
dcdc |= ((uint32_t)(0x1F << 0));
DCDC->REG3 = dcdc;
while (!(DCDC->REG0 & DCDC_REG0_STS_DC_OK_L)) {
; // wait voltage settling
}
}
return frequency;
}

2
ports/mimxrt10xx/peripherals/mimxrt10xx/clocks.h
View File

@ -27,4 +27,4 @@
extern uint32_t SystemCoreClock;
void clocks_init(void);
uint32_t setarmclock(uint32_t frequency);
uint32_t setarmclock(uint32_t frequency);

20
shared-bindings/microcontroller/Processor.c
View File

@ -30,9 +30,9 @@
#include <math.h>
#include <stdint.h>
//#include "py/objproperty.h"
// #include "py/objproperty.h"
//#include "py/runtime.h"
// #include "py/runtime.h"
#include "shared-bindings/util.h"
@ -75,12 +75,12 @@
STATIC mp_obj_t mcu_processor_set_sys_clock(mp_obj_t self_in, mp_obj_t freq) {
mcu_processor_obj_t *self = MP_OBJ_TO_PTR(self_in);
#if defined(HAS_SETTABLE_CLOCK)
uint32_t value_of_freq = MP_OBJ_SMALL_INT_VALUE(freq);
common_hal_mcu_processor_set_sys_clock(self, value_of_freq);
#else
mp_raise_msg(&mp_type_NotImplementedError,translate("Settable Clock Not Implemented for Your Board"));
#endif
#if defined(HAS_SETTABLE_CLOCK)
uint32_t value_of_freq = MP_OBJ_SMALL_INT_VALUE(freq);
common_hal_mcu_processor_set_sys_clock(self, value_of_freq);
#else
mp_raise_msg(&mp_type_NotImplementedError,translate("Settable Clock Not Implemented for Your Board"));
#endif
return mp_const_none;
}
@ -89,7 +89,7 @@ MP_DEFINE_CONST_FUN_OBJ_2(mcu_processor_set_sys_clock_obj, mcu_processor_set_sys
const mp_obj_property_t mcu_processor_freq_obj = {
.base.type = &mp_type_property,
.proxy = {(mp_obj_t)&mcu_processor_set_sys_clock_obj,
MP_ROM_NONE,
MP_ROM_NONE,
MP_ROM_NONE},
};
@ -189,7 +189,7 @@ STATIC const mp_rom_map_elem_t mcu_processor_locals_dict_table[] = {
{ MP_ROM_QSTR(MP_QSTR_temperature), MP_ROM_PTR(&mcu_processor_temperature_obj) },
{ MP_ROM_QSTR(MP_QSTR_uid), MP_ROM_PTR(&mcu_processor_uid_obj) },
{ MP_ROM_QSTR(MP_QSTR_voltage), MP_ROM_PTR(&mcu_processor_voltage_obj) },
{ MP_ROM_QSTR(MP_QSTR_setfrequency), MP_ROM_PTR(&mcu_processor_set_sys_clock_obj) },
{ MP_ROM_QSTR(MP_QSTR_setfrequency), MP_ROM_PTR(&mcu_processor_set_sys_clock_obj) },
};
STATIC MP_DEFINE_CONST_DICT(mcu_processor_locals_dict, mcu_processor_locals_dict_table);

2
shared-bindings/microcontroller/Processor.h
View File

@ -38,7 +38,7 @@ uint32_t common_hal_mcu_processor_get_frequency(void);
mcu_reset_reason_t common_hal_mcu_processor_get_reset_reason(void);
float common_hal_mcu_processor_get_temperature(void);
void common_hal_mcu_processor_get_uid(uint8_t raw_id[]);
float common_hal_mcu_processor_get_voltage(void);
float common_hal_mcu_processor_get_voltage(void);
uint32_t common_hal_mcu_processor_set_sys_clock(mcu_processor_obj_t *self, uint32_t frequency);
#endif // MICROPY_INCLUDED_SHARED_BINDINGS_MICROCONTROLLER_PROCESSOR_H