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m4 tc and tcc works. multi-tcc channels ok too.

This commit is contained in:
Scott Shawcroft 2018-02-13 14:22:55 -08:00
parent cc616aea4e
commit 6c3075bec6
1 changed files with 10 additions and 6 deletions
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16
ports/atmel-samd/common-hal/pulseio/PWMOut.c
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@ -336,18 +336,17 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
}
tc_set_enable(tc, false);
tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER(divisor);
//tc->COUNT16.CTRLBSET.bit.LUPD = true;
tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MPWM;
tc->COUNT16.CCBUF[0].reg = top;
tc->COUNT16.CCBUF[1].reg = top / 2;
tc->COUNT16.CCBUF[1].reg = 0;
#endif
tc_set_enable(tc, true);
} else {
tcc_periods[timer->index] = top;
Tcc* tcc = tcc_insts[timer->index];
tcc_set_enable(tcc, false);
tcc->CTRLA.bit.PRESCALER = divisor;
tcc->CTRLBSET.bit.LUPD = true;
tcc->PER.bit.PER = top;
tcc->WAVE.bit.WAVEGEN = TCC_WAVE_WAVEGEN_NPWM_Val;
tcc_set_enable(tcc, true);
@ -410,15 +409,20 @@ extern void common_hal_pulseio_pwmout_set_duty_cycle(pulseio_pwmout_obj_t* self,
tc_insts[t->index]->COUNT16.CC[t->wave_output].reg = adjusted_duty;
#endif
#ifdef SAMD51
while (tc_insts[t->index]->COUNT16.SYNCBUSY.bit.CC1 != 0) {
Tc* tc = tc_insts[t->index];
while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) {
// Wait for a previous value to be written.
}
tc_insts[t->index]->COUNT16.CCBUF[1].reg = adjusted_duty;
tc->COUNT16.CCBUF[1].reg = adjusted_duty;
#endif
} else {
uint32_t adjusted_duty = ((uint64_t) tcc_periods[t->index]) * duty / 0xffff;
uint8_t channel = tcc_channel(t);
tcc_insts[t->index]->CCBUF[channel].reg = adjusted_duty;
Tcc* tcc = tcc_insts[t->index];
while ((tcc->SYNCBUSY.vec.CC & (1 << channel)) != 0) {
// Wait for a previous value to be written.
}
tcc->CCBUF[channel].reg = adjusted_duty;
}
}