add support for Plasma2040W
This commit is contained in:
Bernhard Bablok
parent
a8ea8ea81a
commit
690168b1ab
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "supervisor/board.h"
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// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here.
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@ -0,0 +1,294 @@
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/* Based on GCC ARM embedded samples.
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Defines the following symbols for use by code:
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__exidx_start
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__exidx_end
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__etext
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__data_start__
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__preinit_array_start
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__preinit_array_end
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__init_array_start
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__init_array_end
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__fini_array_start
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__fini_array_end
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__data_end__
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__bss_start__
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__bss_end__
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__end__
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end
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__HeapLimit
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__StackLimit
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__StackTop
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__stack (== StackTop)
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*/
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MEMORY
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{
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FLASH_FIRMWARE (rx) : ORIGIN = 0x10000000, LENGTH = 1532k
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/* Followed by: 4kB of NVRAM and at least 512kB of CIRCUITPY */
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RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256k
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SCRATCH_X (rwx) : ORIGIN = 0x20040000, LENGTH = 4k
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SCRATCH_Y (rwx) : ORIGIN = 0x20041000, LENGTH = 4k
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}
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ENTRY(_entry_point)
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SECTIONS
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{
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/* Second stage bootloader is prepended to the image. It must be 256 bytes big
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and checksummed. It is usually built by the boot_stage2 target
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in the Pico SDK
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*/
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.flash_begin : {
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__flash_binary_start = .;
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} > FLASH_FIRMWARE
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.boot2 : {
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__boot2_start__ = .;
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KEEP (*(.boot2))
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__boot2_end__ = .;
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} > FLASH_FIRMWARE
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ASSERT(__boot2_end__ - __boot2_start__ == 256,
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"ERROR: Pico second stage bootloader must be 256 bytes in size")
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/* The second stage will always enter the image at the start of .text.
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The debugger will use the ELF entry point, which is the _entry_point
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symbol if present, otherwise defaults to start of .text.
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This can be used to transfer control back to the bootrom on debugger
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launches only, to perform proper flash setup.
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*/
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.text : {
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__logical_binary_start = .;
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KEEP (*(.vectors))
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KEEP (*(.binary_info_header))
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__binary_info_header_end = .;
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KEEP (*(.reset))
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/* TODO revisit this now memset/memcpy/float in ROM */
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/* bit of a hack right now to exclude all floating point and time critical (e.g. memset, memcpy) code from
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* FLASH ... we will include any thing excluded here in .data below by default */
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*(.init)
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__property_getter_start = .;
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*(.property_getter)
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__property_getter_end = .;
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__property_getset_start = .;
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*(.property_getset)
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__property_getset_end = .;
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*(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .text*)
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*(.fini)
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/* Pull all c'tors into .text */
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*crtbegin.o(.ctors)
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*crtbegin?.o(.ctors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
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*(SORT(.ctors.*))
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*(.ctors)
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/* Followed by destructors */
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*crtbegin.o(.dtors)
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*crtbegin?.o(.dtors)
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*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
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*(SORT(.dtors.*))
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*(.dtors)
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*(.eh_frame*)
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. = ALIGN(4);
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} > FLASH_FIRMWARE
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.rodata : {
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*(EXCLUDE_FILE(*libgcc.a: *libc.a:*lib_a-mem*.o *libm.a:) .rodata*)
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. = ALIGN(4);
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.flashdata*)))
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. = ALIGN(4);
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} > FLASH_FIRMWARE
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.ARM.extab :
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{
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*(.ARM.extab* .gnu.linkonce.armextab.*)
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} > FLASH_FIRMWARE
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__exidx_start = .;
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.ARM.exidx :
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{
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*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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} > FLASH_FIRMWARE
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__exidx_end = .;
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/* Machine inspectable binary information */
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. = ALIGN(4);
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__binary_info_start = .;
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.binary_info :
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{
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KEEP(*(.binary_info.keep.*))
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*(.binary_info.*)
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} > FLASH_FIRMWARE
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__binary_info_end = .;
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. = ALIGN(4);
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/* End of .text-like segments */
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__etext = .;
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.ram_vector_table (COPY): {
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*(.ram_vector_table)
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} > RAM
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.data : {
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__data_start__ = .;
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*(vtable)
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*(.time_critical*)
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/* remaining .text and .rodata; i.e. stuff we exclude above because we want it in RAM */
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*(.text*)
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. = ALIGN(4);
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*(.rodata*)
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. = ALIGN(4);
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*(.data*)
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. = ALIGN(4);
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*(.after_data.*)
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__mutex_array_start = .);
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KEEP(*(SORT(.mutex_array.*)))
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KEEP(*(.mutex_array))
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PROVIDE_HIDDEN (__mutex_array_end = .);
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. = ALIGN(4);
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/* preinit data */
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP(*(SORT(.preinit_array.*)))
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KEEP(*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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. = ALIGN(4);
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/* init data */
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP(*(SORT(.init_array.*)))
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KEEP(*(.init_array))
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PROVIDE_HIDDEN (__init_array_end = .);
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. = ALIGN(4);
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/* finit data */
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PROVIDE_HIDDEN (__fini_array_start = .);
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*(SORT(.fini_array.*))
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*(.fini_array)
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PROVIDE_HIDDEN (__fini_array_end = .);
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*(.jcr)
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. = ALIGN(4);
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/* All data end */
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__data_end__ = .;
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} > RAM AT> FLASH_FIRMWARE
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.itcm :
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{
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. = ALIGN(4);
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*(.itcm.*)
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. = ALIGN(4);
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} > RAM AT> FLASH_FIRMWARE
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_ld_itcm_destination = ADDR(.itcm);
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_ld_itcm_flash_copy = LOADADDR(.itcm);
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_ld_itcm_size = SIZEOF(.itcm);
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.dtcm_data :
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{
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. = ALIGN(4);
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*(.dtcm_data.*)
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. = ALIGN(4);
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} > RAM AT> FLASH_FIRMWARE
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_ld_dtcm_data_destination = ADDR(.dtcm_data);
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_ld_dtcm_data_flash_copy = LOADADDR(.dtcm_data);
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_ld_dtcm_data_size = SIZEOF(.dtcm_data);
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.dtcm_bss :
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{
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. = ALIGN(4);
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*(.dtcm_bss.*)
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. = ALIGN(4);
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} > RAM AT> RAM
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_ld_dtcm_bss_start = ADDR(.dtcm_bss);
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_ld_dtcm_bss_size = SIZEOF(.dtcm_bss);
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.uninitialized_data (COPY): {
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. = ALIGN(4);
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*(.uninitialized_data*)
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} > RAM
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/* Start and end symbols must be word-aligned */
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.scratch_x : {
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__scratch_x_start__ = .;
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*(.scratch_x.*)
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. = ALIGN(4);
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__scratch_x_end__ = .;
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} > SCRATCH_X AT > FLASH_FIRMWARE
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__scratch_x_source__ = LOADADDR(.scratch_x);
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.scratch_y : {
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__scratch_y_start__ = .;
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*(.scratch_y.*)
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. = ALIGN(4);
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__scratch_y_end__ = .;
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} > SCRATCH_Y AT > FLASH_FIRMWARE
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__scratch_y_source__ = LOADADDR(.scratch_y);
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.bss : {
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. = ALIGN(4);
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__bss_start__ = .;
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*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.bss*)))
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*(COMMON)
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. = ALIGN(4);
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__bss_end__ = .;
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} > RAM
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.heap (COPY):
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{
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__end__ = .;
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end = __end__;
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*(.heap*)
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__HeapLimit = .;
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} > RAM
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/* .stack*_dummy section doesn't contains any symbols. It is only
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* used for linker to calculate size of stack sections, and assign
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* values to stack symbols later
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*
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* stack1 section may be empty/missing if platform_launch_core1 is not used */
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/* by default we put core 0 stack at the end of scratch Y, so that if core 1
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* stack is not used then all of SCRATCH_X is free.
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*/
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.stack1_dummy (COPY):
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{
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*(.stack1*)
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} > SCRATCH_X
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.stack_dummy (COPY):
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{
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*(.stack*)
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} > SCRATCH_Y
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.flash_end : {
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__flash_binary_end = .;
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} > FLASH_FIRMWARE
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/* stack limit is poorly named, but historically is maximum heap ptr */
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__StackLimit = ORIGIN(RAM) + LENGTH(RAM);
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__StackOneTop = ORIGIN(SCRATCH_X) + LENGTH(SCRATCH_X);
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__StackTop = ORIGIN(SCRATCH_Y) + LENGTH(SCRATCH_Y);
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__StackOneBottom = __StackOneTop - SIZEOF(.stack1_dummy);
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__StackBottom = __StackTop - SIZEOF(.stack_dummy);
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PROVIDE(__stack = __StackTop);
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/* Check if data + heap + stack exceeds RAM limit */
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ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed")
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ASSERT( __binary_info_header_end - __logical_binary_start <= 256, "Binary info must be in first 256 bytes of the binary")
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/* todo assert on extra code */
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}
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#define MICROPY_HW_BOARD_NAME "Pimoroni Plasma 2040W"
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#define MICROPY_HW_MCU_NAME "rp2040"
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#define CIRCUITPY_DIGITALIO_HAVE_INVALID_PULL (1)
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#define CIRCUITPY_DIGITALIO_HAVE_INVALID_DRIVE_MODE (1)
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#define MICROPY_HW_LED_STATUS (&pin_CYW0)
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#define DEFAULT_I2C_BUS_SCL (&pin_GPIO4)
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#define DEFAULT_I2C_BUS_SDA (&pin_GPIO5)
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USB_VID = 0x2E8A
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USB_PID = 0x100a
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USB_PRODUCT = "Plasma 2040 W"
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USB_MANUFACTURER = "Pimoroni"
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CHIP_VARIANT = RP2040
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CHIP_FAMILY = rp2
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EXTERNAL_FLASH_DEVICES = "W25Q16JVxQ"
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CIRCUITPY__EVE = 1
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CIRCUITPY_CYW43 = 1
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CIRCUITPY_SSL = 1
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CIRCUITPY_SSL_MBEDTLS = 1
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CIRCUITPY_HASHLIB = 1
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CIRCUITPY_WEB_WORKFLOW = 1
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CIRCUITPY_MDNS = 1
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CIRCUITPY_SOCKETPOOL = 1
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CIRCUITPY_WIFI = 1
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CFLAGS += -DCYW43_PIN_WL_HOST_WAKE=24 -DCYW43_PIN_WL_REG_ON=23 -DCYW43_WL_GPIO_COUNT=3 -DCYW43_WL_GPIO_LED_PIN=0
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# Must be accompanied by a linker script change
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CFLAGS += -DCIRCUITPY_FIRMWARE_SIZE='(1536 * 1024)'
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FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel
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@ -0,0 +1 @@
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// Put board-specific pico-sdk definitions here. This file must exist.
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#include "shared-bindings/board/__init__.h"
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STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
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CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
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{ MP_ROM_QSTR(MP_QSTR_GP0), MP_ROM_PTR(&pin_GPIO0) },
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{ MP_ROM_QSTR(MP_QSTR_GP1), MP_ROM_PTR(&pin_GPIO1) },
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{ MP_ROM_QSTR(MP_QSTR_GP2), MP_ROM_PTR(&pin_GPIO2) },
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{ MP_ROM_QSTR(MP_QSTR_GP3), MP_ROM_PTR(&pin_GPIO3) },
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{ MP_ROM_QSTR(MP_QSTR_GP4), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO4) },
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{ MP_ROM_QSTR(MP_QSTR_GP5), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO5) },
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{ MP_ROM_QSTR(MP_QSTR_GP6), MP_ROM_PTR(&pin_GPIO6) },
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{ MP_ROM_QSTR(MP_QSTR_GP7), MP_ROM_PTR(&pin_GPIO7) },
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{ MP_ROM_QSTR(MP_QSTR_GP8), MP_ROM_PTR(&pin_GPIO8) },
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{ MP_ROM_QSTR(MP_QSTR_GP9), MP_ROM_PTR(&pin_GPIO9) },
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{ MP_ROM_QSTR(MP_QSTR_GP10), MP_ROM_PTR(&pin_GPIO10) },
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{ MP_ROM_QSTR(MP_QSTR_GP11), MP_ROM_PTR(&pin_GPIO11) },
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{ MP_ROM_QSTR(MP_QSTR_GP12), MP_ROM_PTR(&pin_GPIO12) },
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{ MP_ROM_QSTR(MP_QSTR_GP13), MP_ROM_PTR(&pin_GPIO13) },
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{ MP_ROM_QSTR(MP_QSTR_GP14), MP_ROM_PTR(&pin_GPIO14) },
|
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{ MP_ROM_QSTR(MP_QSTR_DATA), MP_ROM_PTR(&pin_GPIO15) },
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{ MP_ROM_QSTR(MP_QSTR_GP15), MP_ROM_PTR(&pin_GPIO15) },
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{ MP_ROM_QSTR(MP_QSTR_GP16), MP_ROM_PTR(&pin_GPIO16) },
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{ MP_ROM_QSTR(MP_QSTR_GP17), MP_ROM_PTR(&pin_GPIO17) },
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{ MP_ROM_QSTR(MP_QSTR_GP18), MP_ROM_PTR(&pin_GPIO18) },
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{ MP_ROM_QSTR(MP_QSTR_GP19), MP_ROM_PTR(&pin_GPIO19) },
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{ MP_ROM_QSTR(MP_QSTR_GP20), MP_ROM_PTR(&pin_GPIO20) },
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{ MP_ROM_QSTR(MP_QSTR_GP21), MP_ROM_PTR(&pin_GPIO21) },
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{ MP_ROM_QSTR(MP_QSTR_GP22), MP_ROM_PTR(&pin_GPIO22) },
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{ MP_ROM_QSTR(MP_QSTR_SMPS_MODE), MP_ROM_PTR(&pin_CYW1) },
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{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_CYW0) },
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{ MP_ROM_QSTR(MP_QSTR_VBUS_SENSE), MP_ROM_PTR(&pin_CYW2) },
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{ MP_ROM_QSTR(MP_QSTR_GP26_A0), MP_ROM_PTR(&pin_GPIO26) },
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{ MP_ROM_QSTR(MP_QSTR_GP26), MP_ROM_PTR(&pin_GPIO26) },
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{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) },
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{ MP_ROM_QSTR(MP_QSTR_GP27_A1), MP_ROM_PTR(&pin_GPIO27) },
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{ MP_ROM_QSTR(MP_QSTR_GP27), MP_ROM_PTR(&pin_GPIO27) },
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{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO27) },
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||||
{ MP_ROM_QSTR(MP_QSTR_GP28_A2), MP_ROM_PTR(&pin_GPIO28) },
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{ MP_ROM_QSTR(MP_QSTR_GP28), MP_ROM_PTR(&pin_GPIO28) },
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{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO28) },
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{ MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO29) },
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{ MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO29) },
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||||
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) },
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
|
||||
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Reference in New Issue