docs/machine.SPI.rst: Fix typos and formatting, clarify.
Clarify the class implements master side of the protocol, also put adhoc WiPy paramter after the generic, described in the current Hardware API version.
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@ -1,13 +1,14 @@
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.. currentmodule:: machine
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class SPI -- a Serial Peripheral Interface bus protocol
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=======================================================
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class SPI -- a Serial Peripheral Interface bus protocol (master side)
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=====================================================================
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SPI is a serial protocol that is driven by a master. At the physical level,
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bus consistens of 3 lines: SCK, MOSI, MISO. Multiple devices can share the
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same bus. Each device should have a separate, 4th signal, SS (Slave Select),
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to select a particualr device on a bus with which communication takes place.
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Management of an SS signal should happen in user code (via machine.Pin class).
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SPI is a synchronous serial protocol that is driven by a master. At the
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physical level, a bus consists of 3 lines: SCK, MOSI, MISO. Multiple devices
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can share the same bus. Each device should have a separate, 4th signal,
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SS (Slave Select), to select a particualr device on a bus with which
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communication takes place. Management of an SS signal should happen in
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user code (via machine.Pin class).
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.. only:: port_wipy
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@ -39,7 +40,7 @@ Constructors
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Methods
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-------
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.. method:: SPI.init(baudrate=1000000, \*, polarity=0, phase=0, bits=8, firstbit=SPI.MSB, pins=(CLK, MOSI, MISO), sck=None, mosi=None, miso=None)
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.. method:: SPI.init(baudrate=1000000, \*, polarity=0, phase=0, bits=8, firstbit=SPI.MSB, sck=None, mosi=None, miso=None, pins=(SCK, MOSI, MISO))
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Initialise the SPI bus with the given parameters:
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@ -49,12 +50,13 @@ Methods
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respectively.
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- ``bits`` is the width in bits of each transfer. Only 8 is guaranteed to be supported by all hardware.
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- ``firstbit`` can be ``SPI.MSB`` or ``SPI.LSB``.
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- ``pins`` is an optional tuple with the pins to assign to the SPI bus (deprecated, only for WiPy).
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- ``sck``, ``mosi``, ``miso`` are pins (machine.Pin) objects to use for bus signals. For most
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hardware SPI blocks (as selected by ``id`` parameter to the constructore), pins are fixed
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and cannot be changed. In some cases, hardware blocks allow 2-3 alternative pin sets for
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a hardware SPI block. Arbitrary pin assignments are possible only for a bitbanging SPI driver
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(``id``=-1).
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(``id`` = -1).
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- ``pins`` - WiPy port doesn't ``sck``, ``mosi``, ``miso`` arguments, and instead allows to
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specify them as a tuple of ``pins`` paramter.
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.. method:: SPI.deinit()
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