diff --git a/esp8266/Makefile b/esp8266/Makefile index 2f14f49575..483e8d59a1 100644 --- a/esp8266/Makefile +++ b/esp8266/Makefile @@ -61,6 +61,7 @@ SRC_C = \ uart.c \ esppwm.c \ espneopixel.c \ + intr.c \ modpyb.c \ modpybpin.c \ modpybpwm.c \ diff --git a/esp8266/intr.c b/esp8266/intr.c new file mode 100644 index 0000000000..62da4a721a --- /dev/null +++ b/esp8266/intr.c @@ -0,0 +1,37 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "etshal.h" +#include "ets_alt_task.h" + +#include "modpyb.h" + +// this is in a separate file so it can go in iRAM +void pin_intr_handler_iram(void *arg) { + uint32_t status = GPIO_REG_READ(GPIO_STATUS_ADDRESS); + GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, status); + pin_intr_handler(status); +} diff --git a/esp8266/main.c b/esp8266/main.c index 08085299ba..518ecf17d2 100644 --- a/esp8266/main.c +++ b/esp8266/main.c @@ -53,6 +53,7 @@ STATIC void mp_reset(void) { #endif MP_STATE_PORT(mp_kbd_exception) = mp_obj_new_exception(&mp_type_KeyboardInterrupt); MP_STATE_PORT(term_obj) = MP_OBJ_NULL; + pin_init0(); #if MICROPY_MODULE_FROZEN pyexec_frozen_module("_boot"); pyexec_file("boot.py"); diff --git a/esp8266/modpyb.h b/esp8266/modpyb.h index 69a6edb709..8d27ebed72 100644 --- a/esp8266/modpyb.h +++ b/esp8266/modpyb.h @@ -18,6 +18,10 @@ typedef struct _pyb_pin_obj_t { uint32_t periph; } pyb_pin_obj_t; +void pin_init0(void); +void pin_intr_handler_iram(void *arg); +void pin_intr_handler(uint32_t); + uint mp_obj_get_pin(mp_obj_t pin_in); pyb_pin_obj_t *mp_obj_get_pin_obj(mp_obj_t pin_in); int pin_get(uint pin); diff --git a/esp8266/modpybpin.c b/esp8266/modpybpin.c index a85b3f1ac6..2049d4bf34 100644 --- a/esp8266/modpybpin.c +++ b/esp8266/modpybpin.c @@ -28,13 +28,23 @@ #include #include +#include "etshal.h" #include "c_types.h" #include "user_interface.h" #include "gpio.h" #include "py/nlr.h" #include "py/runtime.h" +#include "py/gc.h" #include "modpyb.h" +#include "utils.h" + +#define GET_TRIGGER(phys_port) \ + GPIO_PIN_INT_TYPE_GET(GPIO_REG_READ(GPIO_PIN_ADDR(phys_port))) +#define SET_TRIGGER(phys_port, trig) \ + (GPIO_REG_WRITE(GPIO_PIN_ADDR(phys_port), \ + (GPIO_REG_READ(GPIO_PIN_ADDR(phys_port)) & ~GPIO_PIN_INT_TYPE_MASK) \ + | GPIO_PIN_INT_TYPE_SET(trig))) \ #define GPIO_MODE_INPUT (0) #define GPIO_MODE_OUTPUT (1) @@ -44,6 +54,11 @@ // Removed in SDK 1.1.0 //#define GPIO_PULL_DOWN (2) +typedef struct _pin_irq_obj_t { + mp_obj_base_t base; + uint16_t phys_port; +} pin_irq_obj_t; + STATIC const pyb_pin_obj_t pyb_pin_obj[16 + 1] = { {{&pyb_pin_type}, 0, FUNC_GPIO0, PERIPHS_IO_MUX_GPIO0_U}, {{&pyb_pin_type}, 1, FUNC_GPIO1, PERIPHS_IO_MUX_U0TXD_U}, @@ -68,6 +83,35 @@ STATIC const pyb_pin_obj_t pyb_pin_obj[16 + 1] = { STATIC uint8_t pin_mode[16 + 1]; +// forward declaration +STATIC const pin_irq_obj_t pin_irq_obj[16]; + +void pin_init0(void) { + ETS_GPIO_INTR_DISABLE(); + ETS_GPIO_INTR_ATTACH(pin_intr_handler_iram, NULL); + // disable all interrupts + memset(&MP_STATE_PORT(pin_irq_handler)[0], 0, 16 * sizeof(mp_obj_t)); + for (int p = 0; p < 16; ++p) { + GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1 << p); + SET_TRIGGER(p, 0); + } + ETS_GPIO_INTR_ENABLE(); +} + +void pin_intr_handler(uint32_t status) { + gc_lock(); + status &= 0xffff; + for (int p = 0; status; ++p, status >>= 1) { + if (status & 1) { + mp_obj_t handler = MP_STATE_PORT(pin_irq_handler)[p]; + if (handler != MP_OBJ_NULL) { + call_function_1_protected(handler, MP_OBJ_FROM_PTR(&pyb_pin_obj[p])); + } + } + } + gc_unlock(); +} + pyb_pin_obj_t *mp_obj_get_pin_obj(mp_obj_t pin_in) { if (mp_obj_get_type(pin_in) != &pyb_pin_type) { nlr_raise(mp_obj_new_exception_msg(&mp_type_ValueError, "expecting a pin")); @@ -264,12 +308,39 @@ STATIC mp_obj_t pyb_pin_high(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_pin_high_obj, pyb_pin_high); +// pin.irq() +STATIC mp_obj_t pyb_pin_irq(size_t n_args, const mp_obj_t *args) { + pyb_pin_obj_t *self = MP_OBJ_TO_PTR(args[0]); + if (self->phys_port >= 16) { + nlr_raise(mp_obj_new_exception_msg(&mp_type_OSError, "pin does not have IRQ capabilities")); + } + + if (n_args > 1) { + // configure irq + int trig = mp_obj_get_int(args[1]); + mp_obj_t handler = args[2]; + if (handler == mp_const_none) { + handler = MP_OBJ_NULL; + } + ETS_GPIO_INTR_DISABLE(); + MP_STATE_PORT(pin_irq_handler)[self->phys_port] = handler; + SET_TRIGGER(self->phys_port, trig); + GPIO_REG_WRITE(GPIO_STATUS_W1TC_ADDRESS, 1 << self->phys_port); + ETS_GPIO_INTR_ENABLE(); + } + + // return the irq object + return MP_OBJ_FROM_PTR(&pin_irq_obj[self->phys_port]); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pyb_pin_irq_obj, 1, 3, pyb_pin_irq); + STATIC const mp_map_elem_t pyb_pin_locals_dict_table[] = { // instance methods { MP_OBJ_NEW_QSTR(MP_QSTR_init), (mp_obj_t)&pyb_pin_init_obj }, { MP_OBJ_NEW_QSTR(MP_QSTR_value), (mp_obj_t)&pyb_pin_value_obj }, { MP_OBJ_NEW_QSTR(MP_QSTR_low), (mp_obj_t)&pyb_pin_low_obj }, { MP_OBJ_NEW_QSTR(MP_QSTR_high), (mp_obj_t)&pyb_pin_high_obj }, + { MP_OBJ_NEW_QSTR(MP_QSTR_irq), (mp_obj_t)&pyb_pin_irq_obj }, // class constants { MP_OBJ_NEW_QSTR(MP_QSTR_IN), MP_OBJ_NEW_SMALL_INT(GPIO_MODE_INPUT) }, @@ -278,6 +349,10 @@ STATIC const mp_map_elem_t pyb_pin_locals_dict_table[] = { { MP_OBJ_NEW_QSTR(MP_QSTR_PULL_NONE), MP_OBJ_NEW_SMALL_INT(GPIO_PULL_NONE) }, { MP_OBJ_NEW_QSTR(MP_QSTR_PULL_UP), MP_OBJ_NEW_SMALL_INT(GPIO_PULL_UP) }, //{ MP_OBJ_NEW_QSTR(MP_QSTR_PULL_DOWN), MP_OBJ_NEW_SMALL_INT(GPIO_PULL_DOWN) }, + + // IRG triggers, can be or'd together + { MP_OBJ_NEW_QSTR(MP_QSTR_IRQ_RISING), MP_OBJ_NEW_SMALL_INT(GPIO_PIN_INTR_POSEDGE) }, + { MP_OBJ_NEW_QSTR(MP_QSTR_IRQ_FALLING), MP_OBJ_NEW_SMALL_INT(GPIO_PIN_INTR_NEGEDGE) }, }; STATIC MP_DEFINE_CONST_DICT(pyb_pin_locals_dict, pyb_pin_locals_dict_table); @@ -290,3 +365,59 @@ const mp_obj_type_t pyb_pin_type = { .call = pyb_pin_call, .locals_dict = (mp_obj_t)&pyb_pin_locals_dict, }; + +/******************************************************************************/ +// Pin IRQ object + +STATIC const mp_obj_type_t pin_irq_type; + +STATIC const pin_irq_obj_t pin_irq_obj[16] = { + {{&pin_irq_type}, 0}, + {{&pin_irq_type}, 1}, + {{&pin_irq_type}, 2}, + {{&pin_irq_type}, 3}, + {{&pin_irq_type}, 4}, + {{&pin_irq_type}, 5}, + {{&pin_irq_type}, 6}, + {{&pin_irq_type}, 7}, + {{&pin_irq_type}, 8}, + {{&pin_irq_type}, 9}, + {{&pin_irq_type}, 10}, + {{&pin_irq_type}, 11}, + {{&pin_irq_type}, 12}, + {{&pin_irq_type}, 13}, + {{&pin_irq_type}, 14}, + {{&pin_irq_type}, 15}, +}; + +STATIC mp_obj_t pin_irq_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args) { + pin_irq_obj_t *self = self_in; + mp_arg_check_num(n_args, n_kw, 0, 0, false); + pin_intr_handler(1 << self->phys_port); + return mp_const_none; +} + +STATIC mp_obj_t pin_irq_trigger(size_t n_args, const mp_obj_t *args) { + pin_irq_obj_t *self = args[0]; + uint32_t orig_trig = GET_TRIGGER(self->phys_port); + if (n_args == 2) { + // set trigger + SET_TRIGGER(self->phys_port, mp_obj_get_int(args[1])); + } + // return original trigger value + return MP_OBJ_NEW_SMALL_INT(orig_trig); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(pin_irq_trigger_obj, 1, 2, pin_irq_trigger); + +STATIC const mp_rom_map_elem_t pin_irq_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_trigger), MP_ROM_PTR(&pin_irq_trigger_obj) }, +}; + +STATIC MP_DEFINE_CONST_DICT(pin_irq_locals_dict, pin_irq_locals_dict_table); + +STATIC const mp_obj_type_t pin_irq_type = { + { &mp_type_type }, + .name = MP_QSTR_IRQ, + .call = pin_irq_call, + .locals_dict = (mp_obj_dict_t*)&pin_irq_locals_dict, +}; diff --git a/esp8266/mpconfigport.h b/esp8266/mpconfigport.h index a19572a20d..4aba682676 100644 --- a/esp8266/mpconfigport.h +++ b/esp8266/mpconfigport.h @@ -141,6 +141,7 @@ extern const struct _mp_obj_module_t onewire_module; const char *readline_hist[8]; \ vstr_t *repl_line; \ mp_obj_t mp_kbd_exception; \ + mp_obj_t pin_irq_handler[16]; \ // We need to provide a declaration/definition of alloca() #include diff --git a/esp8266/qstrdefsport.h b/esp8266/qstrdefsport.h index 08e284a59d..dc9efe06fd 100644 --- a/esp8266/qstrdefsport.h +++ b/esp8266/qstrdefsport.h @@ -128,6 +128,11 @@ Q(essid) Q(authmode) Q(password) +// IRQ class +Q(IRQ) +Q(irq) +Q(trigger) + // Pin class Q(Pin) Q(init) @@ -142,6 +147,8 @@ Q(OPEN_DRAIN) Q(PULL_NONE) Q(PULL_UP) Q(PULL_DOWN) +Q(IRQ_RISING) +Q(IRQ_FALLING) // PWM class Q(PWM)