diff --git a/stmhal/dma.c b/stmhal/dma.c index 7b540f847e..60d7b0210c 100644 --- a/stmhal/dma.c +++ b/stmhal/dma.c @@ -434,6 +434,13 @@ void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data){ HAL_DMA_DeInit(dma); HAL_DMA_Init(dma); HAL_NVIC_SetPriority(dma_irqn[dma_id], IRQ_PRI_DMA, IRQ_SUBPRI_DMA); + } else { + // only necessary initialization +#if defined(MCU_SERIES_F4) + // calculate DMA base address and bitshift to be used in IRQ handler + extern uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); + DMA_CalcBaseAndBitshift(dma); +#endif } HAL_NVIC_EnableIRQ(dma_irqn[dma_id]); diff --git a/stmhal/hal/f4/src/stm32f4xx_hal_dma.c b/stmhal/hal/f4/src/stm32f4xx_hal_dma.c index 9f8f4c75dc..326aa0afb9 100644 --- a/stmhal/hal/f4/src/stm32f4xx_hal_dma.c +++ b/stmhal/hal/f4/src/stm32f4xx_hal_dma.c @@ -152,7 +152,7 @@ typedef struct * @{ */ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength); -static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); +uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma); static HAL_StatusTypeDef DMA_CheckFifoParam(DMA_HandleTypeDef *hdma); /** @@ -1188,7 +1188,7 @@ static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t * the configuration information for the specified DMA Stream. * @retval Stream base address */ -static uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) +uint32_t DMA_CalcBaseAndBitshift(DMA_HandleTypeDef *hdma) { uint32_t stream_number = (((uint32_t)hdma->Instance & 0xFFU) - 16U) / 24U;