Add F405 support
This commit is contained in:
parent
fd1a257df3
commit
60bb6acf38
@ -88,22 +88,7 @@ else
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### CFLAGS += -flto
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endif
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# C defines and other board specifics
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ifeq ($(MCU_SUB_VARIANT), stm32f412zx)
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C_DEFS = \
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-DUSE_FULL_LL_DRIVER \
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-DUSE_HAL_DRIVER \
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-DSTM32F412Zx
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endif
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ifeq ($(MCU_SUB_VARIANT), stm32f411xe)
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C_DEFS = \
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-DUSE_FULL_LL_DRIVER \
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-DUSE_HAL_DRIVER \
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-DSTM32F411xE
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endif
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C_DEFS += -DMCU_PACKAGE=$(MCU_PACKAGE)
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C_DEFS += -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(MCU_SUB_VARIANT)
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CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
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109
ports/stm32f4/boards/STM32F405.ld
Normal file
109
ports/stm32f4/boards/STM32F405.ld
Normal file
@ -0,0 +1,109 @@
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/*
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GNU linker script for STM32F405 via Micropython
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*/
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/* Specify the memory areas */
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
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FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
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FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
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FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 960K /* sector 4 is 64K, sectors 5,6,7 are 128K */
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K
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}
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/* produce a link error if there is not this amount of RAM for these sections */
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_minimum_stack_size = 2K;
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_minimum_heap_size = 16K;
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/* Define tho top end of the stack. The stack is full descending so begins just
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above last byte of RAM. Note that EABI requires the stack to be 8-byte
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aligned for a call. */
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_estack = ORIGIN(RAM) + LENGTH(RAM);
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/* RAM extents for the garbage collector */
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_ram_start = ORIGIN(RAM);
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_ram_end = ORIGIN(RAM) + LENGTH(RAM);
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_heap_start = _ebss; /* heap starts just after statically allocated memory */
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_heap_end = 0x2001c000; /* tunable */
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ENTRY(Reset_Handler)
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/* define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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/* This first flash block is 16K annd the isr vectors only take up
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about 400 bytes. Micropython pads this with files, but this didn't
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work with the size of Circuitpython's ff object. */
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. = ALIGN(4);
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} >FLASH_ISR
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text*) /* .text* sections (code) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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/* *(.glue_7) */ /* glue arm to thumb code */
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/* *(.glue_7t) */ /* glue thumb to arm code */
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. = ALIGN(4);
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_etext = .; /* define a global symbol at end of code */
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} >FLASH_TEXT
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* This is the initialized data section
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The program executes knowing that the data is in the RAM
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but the loader puts the initial values in the FLASH (inidata).
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It is one task of the startup to copy the initial values from FLASH to RAM. */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
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} >RAM AT> FLASH_TEXT
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/* Uninitialized data section */
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.bss :
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{
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. = ALIGN(4);
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_sbss = .; /* define a global symbol at bss start; used by startup code */
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
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} >RAM
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/* this is to define the start of the heap, and make sure we have a minimum size */
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.heap :
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{
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. = ALIGN(4);
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. = . + _minimum_heap_size;
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. = ALIGN(4);
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} >RAM
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/* this just checks there is enough RAM for the stack */
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.stack :
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{
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. = ALIGN(4);
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. = . + _minimum_stack_size;
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. = ALIGN(4);
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} >RAM
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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38
ports/stm32f4/boards/pybv1_1/board.c
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38
ports/stm32f4/boards/pybv1_1/board.c
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@ -0,0 +1,38 @@
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "boards/board.h"
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void board_init(void) {
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}
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bool board_requests_safe_mode(void) {
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return false;
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}
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void reset_board(void) {
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}
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37
ports/stm32f4/boards/pybv1_1/mpconfigboard.h
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37
ports/stm32f4/boards/pybv1_1/mpconfigboard.h
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@ -0,0 +1,37 @@
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2016 Glenn Ruben Bakke
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* Copyright (c) 2018 Dan Halbert for Adafruit Industries
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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//Micropython setup
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#define MICROPY_HW_BOARD_NAME "PyboardV1_1"
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#define MICROPY_HW_MCU_NAME "STM32F405RG"
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#define FLASH_SIZE (0x100000)
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#define FLASH_PAGE_SIZE (0x4000)
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#define AUTORESET_DELAY_MS 500
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#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)
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17
ports/stm32f4/boards/pybv1_1/mpconfigboard.mk
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17
ports/stm32f4/boards/pybv1_1/mpconfigboard.mk
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@ -0,0 +1,17 @@
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USB_VID = 0x239A
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USB_PID = 0x8056
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USB_PRODUCT = "Pyboard Version 1.1"
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USB_MANUFACTURER = "STMicroelectronics"
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INTERNAL_FLASH_FILESYSTEM = 1
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LONGINT_IMPL = NONE
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MCU_SERIES = m4
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MCU_VARIANT = stm32f4
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MCU_SUB_VARIANT = stm32f405xx
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MCU_PACKAGE = 64
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CMSIS_MCU = STM32F405xx
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LD_FILE = boards/STM32F405.ld
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TEXT0_ADDR = 0x08000000
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TEXT1_ADDR = 0x08020000
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53
ports/stm32f4/boards/pybv1_1/pins.c
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53
ports/stm32f4/boards/pybv1_1/pins.c
Normal file
@ -0,0 +1,53 @@
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#include "shared-bindings/board/__init__.h"
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STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_Y1), MP_ROM_PTR(&pin_PC06) },
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{ MP_ROM_QSTR(MP_QSTR_Y2), MP_ROM_PTR(&pin_PC07) },
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{ MP_ROM_QSTR(MP_QSTR_Y3), MP_ROM_PTR(&pin_PB08) },
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{ MP_ROM_QSTR(MP_QSTR_Y4), MP_ROM_PTR(&pin_PB09) },
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{ MP_ROM_QSTR(MP_QSTR_Y5), MP_ROM_PTR(&pin_PB12) },
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{ MP_ROM_QSTR(MP_QSTR_Y6), MP_ROM_PTR(&pin_PB13) },
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{ MP_ROM_QSTR(MP_QSTR_Y7), MP_ROM_PTR(&pin_PB14) },
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{ MP_ROM_QSTR(MP_QSTR_Y8), MP_ROM_PTR(&pin_PB15) },
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{ MP_ROM_QSTR(MP_QSTR_Y9), MP_ROM_PTR(&pin_PB10) },
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{ MP_ROM_QSTR(MP_QSTR_Y10), MP_ROM_PTR(&pin_PB11) },
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{ MP_ROM_QSTR(MP_QSTR_Y11), MP_ROM_PTR(&pin_PB00) },
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{ MP_ROM_QSTR(MP_QSTR_Y12), MP_ROM_PTR(&pin_PB01) },
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{ MP_ROM_QSTR(MP_QSTR_X1), MP_ROM_PTR(&pin_PA00) },
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{ MP_ROM_QSTR(MP_QSTR_X2), MP_ROM_PTR(&pin_PA01) },
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{ MP_ROM_QSTR(MP_QSTR_X3), MP_ROM_PTR(&pin_PA02) },
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{ MP_ROM_QSTR(MP_QSTR_X4), MP_ROM_PTR(&pin_PA03) },
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{ MP_ROM_QSTR(MP_QSTR_X5), MP_ROM_PTR(&pin_PA04) },
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{ MP_ROM_QSTR(MP_QSTR_X6), MP_ROM_PTR(&pin_PA05) },
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{ MP_ROM_QSTR(MP_QSTR_X7), MP_ROM_PTR(&pin_PA06) },
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{ MP_ROM_QSTR(MP_QSTR_X8), MP_ROM_PTR(&pin_PA07) },
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{ MP_ROM_QSTR(MP_QSTR_X9), MP_ROM_PTR(&pin_PB06) },
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{ MP_ROM_QSTR(MP_QSTR_X10), MP_ROM_PTR(&pin_PB07) },
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{ MP_ROM_QSTR(MP_QSTR_X11), MP_ROM_PTR(&pin_PC04) },
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{ MP_ROM_QSTR(MP_QSTR_X12), MP_ROM_PTR(&pin_PC05) },
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{ MP_ROM_QSTR(MP_QSTR_X17), MP_ROM_PTR(&pin_PB03) },
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{ MP_ROM_QSTR(MP_QSTR_X18), MP_ROM_PTR(&pin_PC13) },
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{ MP_ROM_QSTR(MP_QSTR_X19), MP_ROM_PTR(&pin_PC00) },
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{ MP_ROM_QSTR(MP_QSTR_X20), MP_ROM_PTR(&pin_PC01) },
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{ MP_ROM_QSTR(MP_QSTR_X21), MP_ROM_PTR(&pin_PC02) },
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{ MP_ROM_QSTR(MP_QSTR_X22), MP_ROM_PTR(&pin_PC03) },
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{ MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_PB04) },
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{ MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PA15) },
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{ MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_PA14) },
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{ MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_PA13) },
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{ MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_PB04) },
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{ MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_PA15) },
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{ MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_PA14) },
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{ MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_PA13) },
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{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) },
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{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) },
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{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) },
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{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) },
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};
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MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
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439
ports/stm32f4/boards/pybv1_1/stm32f4xx_hal_conf.h
Normal file
439
ports/stm32f4/boards/pybv1_1/stm32f4xx_hal_conf.h
Normal file
@ -0,0 +1,439 @@
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/**
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******************************************************************************
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* @file stm32f4xx_hal_conf_template.h
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* @author MCD Application Team
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* @brief HAL configuration template file.
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* This file should be copied to the application folder and renamed
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* to stm32f4xx_hal_conf.h.
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2017 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
|
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* License. You may obtain a copy of the License at:
|
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __STM32F4xx_HAL_CONF_H
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#define __STM32F4xx_HAL_CONF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Exported types ------------------------------------------------------------*/
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/* Exported constants --------------------------------------------------------*/
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/* ########################## Module Selection ############################## */
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/**
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* @brief This is the list of modules to be used in the HAL driver
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*/
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#define HAL_MODULE_ENABLED
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#define HAL_ADC_MODULE_ENABLED
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/* #define HAL_CRYP_MODULE_ENABLED */
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/* #define HAL_CAN_MODULE_ENABLED */
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/* #define HAL_CRC_MODULE_ENABLED */
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/* #define HAL_CRYP_MODULE_ENABLED */
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/* #define HAL_DAC_MODULE_ENABLED */
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/* #define HAL_DCMI_MODULE_ENABLED */
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/* #define HAL_DMA2D_MODULE_ENABLED */
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/* #define HAL_ETH_MODULE_ENABLED */
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/* #define HAL_NAND_MODULE_ENABLED */
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/* #define HAL_NOR_MODULE_ENABLED */
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/* #define HAL_PCCARD_MODULE_ENABLED */
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#define HAL_SRAM_MODULE_ENABLED
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/* #define HAL_SDRAM_MODULE_ENABLED */
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/* #define HAL_HASH_MODULE_ENABLED */
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#define HAL_I2C_MODULE_ENABLED
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#define HAL_I2S_MODULE_ENABLED
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/* #define HAL_IWDG_MODULE_ENABLED */
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/* #define HAL_LTDC_MODULE_ENABLED */
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/* #define HAL_RNG_MODULE_ENABLED */
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/* #define HAL_RTC_MODULE_ENABLED */
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/* #define HAL_SAI_MODULE_ENABLED */
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#define HAL_SD_MODULE_ENABLED
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/* #define HAL_MMC_MODULE_ENABLED */
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/* #define HAL_SPI_MODULE_ENABLED */
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/* #define HAL_TIM_MODULE_ENABLED */
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#define HAL_UART_MODULE_ENABLED
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/* #define HAL_USART_MODULE_ENABLED */
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/* #define HAL_IRDA_MODULE_ENABLED */
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/* #define HAL_SMARTCARD_MODULE_ENABLED */
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/* #define HAL_WWDG_MODULE_ENABLED */
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#define HAL_PCD_MODULE_ENABLED
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/* #define HAL_HCD_MODULE_ENABLED */
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/* #define HAL_DSI_MODULE_ENABLED */
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/* #define HAL_QSPI_MODULE_ENABLED */
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#define HAL_QSPI_MODULE_ENABLED
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/* #define HAL_CEC_MODULE_ENABLED */
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/* #define HAL_FMPI2C_MODULE_ENABLED */
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/* #define HAL_SPDIFRX_MODULE_ENABLED */
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/* #define HAL_DFSDM_MODULE_ENABLED */
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/* #define HAL_LPTIM_MODULE_ENABLED */
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/* #define HAL_EXTI_MODULE_ENABLED */
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#define HAL_GPIO_MODULE_ENABLED
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#define HAL_EXTI_MODULE_ENABLED
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#define HAL_DMA_MODULE_ENABLED
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#define HAL_RCC_MODULE_ENABLED
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#define HAL_FLASH_MODULE_ENABLED
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#define HAL_PWR_MODULE_ENABLED
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#define HAL_CORTEX_MODULE_ENABLED
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/* ########################## HSE/HSI Values adaptation ##################### */
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/**
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* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
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* This value is used by the RCC HAL module to compute the system frequency
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* (when HSE is used as system clock source, directly or through the PLL).
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*/
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#if !defined (HSE_VALUE)
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#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */
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#endif /* HSE_VALUE */
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#if !defined (HSE_STARTUP_TIMEOUT)
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#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
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#endif /* HSE_STARTUP_TIMEOUT */
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/**
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* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S peripheral
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## Ethernet peripheral configuration ##################### */
|
||||
|
||||
/* Section 1 : Ethernet peripheral configuration */
|
||||
|
||||
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
|
||||
#define MAC_ADDR0 2U
|
||||
#define MAC_ADDR1 0U
|
||||
#define MAC_ADDR2 0U
|
||||
#define MAC_ADDR3 0U
|
||||
#define MAC_ADDR4 0U
|
||||
#define MAC_ADDR5 0U
|
||||
|
||||
/* Definition of the Ethernet driver buffers size and count */
|
||||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
||||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||
#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
|
||||
/* Section 2: PHY configuration section */
|
||||
|
||||
/* DP83848_PHY_ADDRESS Address*/
|
||||
#define DP83848_PHY_ADDRESS 0x01U
|
||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
|
||||
/* PHY Configuration delay */
|
||||
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
|
||||
|
||||
#define PHY_READ_TO ((uint32_t)0x0000FFFFU)
|
||||
#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)
|
||||
|
||||
/* Section 3: Common PHY Registers */
|
||||
|
||||
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
|
||||
|
||||
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
|
||||
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
|
||||
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
|
||||
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
|
||||
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
|
||||
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
|
||||
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
|
||||
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
|
||||
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
|
||||
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
|
||||
|
||||
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
|
||||
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
|
||||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
|
||||
|
||||
/* Section 4: Extended PHY Registers */
|
||||
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
|
||||
|
||||
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DSI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dsi.h"
|
||||
#endif /* HAL_DSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMPI2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_fmpi2c.h"
|
||||
#endif /* HAL_FMPI2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spdifrx.h"
|
||||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_CONF_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
516
ports/stm32f4/boards/startup_stm32f405xx.s
Normal file
516
ports/stm32f4/boards/startup_stm32f405xx.s
Normal file
@ -0,0 +1,516 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file startup_stm32f405xx.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32F405xx Devices vector table for GCC based toolchains.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m4
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
ldr sp, =_estack /* set stack pointer */
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
|
||||
/* External Interrupts */
|
||||
.word WWDG_IRQHandler /* Window WatchDog */
|
||||
.word PVD_IRQHandler /* PVD through EXTI Line detection */
|
||||
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
|
||||
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
|
||||
.word FLASH_IRQHandler /* FLASH */
|
||||
.word RCC_IRQHandler /* RCC */
|
||||
.word EXTI0_IRQHandler /* EXTI Line0 */
|
||||
.word EXTI1_IRQHandler /* EXTI Line1 */
|
||||
.word EXTI2_IRQHandler /* EXTI Line2 */
|
||||
.word EXTI3_IRQHandler /* EXTI Line3 */
|
||||
.word EXTI4_IRQHandler /* EXTI Line4 */
|
||||
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
|
||||
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
|
||||
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
|
||||
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
|
||||
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
|
||||
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
|
||||
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
|
||||
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
|
||||
.word CAN1_TX_IRQHandler /* CAN1 TX */
|
||||
.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
|
||||
.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
|
||||
.word CAN1_SCE_IRQHandler /* CAN1 SCE */
|
||||
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
|
||||
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
|
||||
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
|
||||
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
|
||||
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||
.word TIM2_IRQHandler /* TIM2 */
|
||||
.word TIM3_IRQHandler /* TIM3 */
|
||||
.word TIM4_IRQHandler /* TIM4 */
|
||||
.word I2C1_EV_IRQHandler /* I2C1 Event */
|
||||
.word I2C1_ER_IRQHandler /* I2C1 Error */
|
||||
.word I2C2_EV_IRQHandler /* I2C2 Event */
|
||||
.word I2C2_ER_IRQHandler /* I2C2 Error */
|
||||
.word SPI1_IRQHandler /* SPI1 */
|
||||
.word SPI2_IRQHandler /* SPI2 */
|
||||
.word USART1_IRQHandler /* USART1 */
|
||||
.word USART2_IRQHandler /* USART2 */
|
||||
.word USART3_IRQHandler /* USART3 */
|
||||
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
|
||||
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
|
||||
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
|
||||
.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
|
||||
.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
|
||||
.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
|
||||
.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
|
||||
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
|
||||
.word FSMC_IRQHandler /* FSMC */
|
||||
.word SDIO_IRQHandler /* SDIO */
|
||||
.word TIM5_IRQHandler /* TIM5 */
|
||||
.word SPI3_IRQHandler /* SPI3 */
|
||||
.word UART4_IRQHandler /* UART4 */
|
||||
.word UART5_IRQHandler /* UART5 */
|
||||
.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
|
||||
.word TIM7_IRQHandler /* TIM7 */
|
||||
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
|
||||
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
|
||||
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
|
||||
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
|
||||
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word CAN2_TX_IRQHandler /* CAN2 TX */
|
||||
.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
|
||||
.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
|
||||
.word CAN2_SCE_IRQHandler /* CAN2 SCE */
|
||||
.word OTG_FS_IRQHandler /* USB OTG FS */
|
||||
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
|
||||
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
|
||||
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
|
||||
.word USART6_IRQHandler /* USART6 */
|
||||
.word I2C3_EV_IRQHandler /* I2C3 event */
|
||||
.word I2C3_ER_IRQHandler /* I2C3 error */
|
||||
.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
|
||||
.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
|
||||
.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
|
||||
.word OTG_HS_IRQHandler /* USB OTG HS */
|
||||
.word 0 /* Reserved */
|
||||
.word 0 /* Reserved */
|
||||
.word HASH_RNG_IRQHandler /* Hash and Rng */
|
||||
.word FPU_IRQHandler /* FPU */
|
||||
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMP_STAMP_IRQHandler
|
||||
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_WKUP_IRQHandler
|
||||
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream0_IRQHandler
|
||||
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream1_IRQHandler
|
||||
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream2_IRQHandler
|
||||
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream3_IRQHandler
|
||||
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream4_IRQHandler
|
||||
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream5_IRQHandler
|
||||
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream6_IRQHandler
|
||||
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC_IRQHandler
|
||||
.thumb_set ADC_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_TX_IRQHandler
|
||||
.thumb_set CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX0_IRQHandler
|
||||
.thumb_set CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_TIM9_IRQHandler
|
||||
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_TIM10_IRQHandler
|
||||
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_TIM11_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_WKUP_IRQHandler
|
||||
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_TIM12_IRQHandler
|
||||
.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_TIM13_IRQHandler
|
||||
.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_TIM14_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Stream7_IRQHandler
|
||||
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak FSMC_IRQHandler
|
||||
.thumb_set FSMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDIO_IRQHandler
|
||||
.thumb_set SDIO_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_DAC_IRQHandler
|
||||
.thumb_set TIM6_DAC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream0_IRQHandler
|
||||
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream1_IRQHandler
|
||||
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream2_IRQHandler
|
||||
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream3_IRQHandler
|
||||
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream4_IRQHandler
|
||||
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_TX_IRQHandler
|
||||
.thumb_set CAN2_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_RX0_IRQHandler
|
||||
.thumb_set CAN2_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_RX1_IRQHandler
|
||||
.thumb_set CAN2_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN2_SCE_IRQHandler
|
||||
.thumb_set CAN2_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_FS_IRQHandler
|
||||
.thumb_set OTG_FS_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream5_IRQHandler
|
||||
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream6_IRQHandler
|
||||
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Stream7_IRQHandler
|
||||
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART6_IRQHandler
|
||||
.thumb_set USART6_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_EV_IRQHandler
|
||||
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C3_ER_IRQHandler
|
||||
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_OUT_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_EP1_IN_IRQHandler
|
||||
.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_WKUP_IRQHandler
|
||||
.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
|
||||
|
||||
.weak OTG_HS_IRQHandler
|
||||
.thumb_set OTG_HS_IRQHandler,Default_Handler
|
||||
|
||||
.weak HASH_RNG_IRQHandler
|
||||
.thumb_set HASH_RNG_IRQHandler,Default_Handler
|
||||
|
||||
.weak FPU_IRQHandler
|
||||
.thumb_set FPU_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
|
||||
|
@ -37,6 +37,9 @@
|
||||
#elif MCU_PACKAGE == 100
|
||||
#define GPIO_PORT_COUNT 5
|
||||
GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC, GPIOD, GPIOE};
|
||||
#elif MCU_PACKAGE == 64
|
||||
#define GPIO_PORT_COUNT 3
|
||||
GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC};
|
||||
#endif
|
||||
|
||||
STATIC uint16_t claimed_pins[GPIO_PORT_COUNT];
|
||||
|
@ -71,13 +71,15 @@ const mcu_processor_obj_t common_hal_mcu_processor_obj = {
|
||||
};
|
||||
|
||||
STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
|
||||
#if MCU_PACKAGE <= 100
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE02), MP_ROM_PTR(&pin_PE02) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE03), MP_ROM_PTR(&pin_PE03) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE04), MP_ROM_PTR(&pin_PE04) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE05), MP_ROM_PTR(&pin_PE05) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE06), MP_ROM_PTR(&pin_PE06) },
|
||||
#endif
|
||||
{ MP_ROM_QSTR(MP_QSTR_PC13), MP_ROM_PTR(&pin_PC13) },
|
||||
#if MCU_PACKAGE == LQFP144
|
||||
#if MCU_PACKAGE <= 144
|
||||
{ MP_ROM_QSTR(MP_QSTR_PF00), MP_ROM_PTR(&pin_PF00) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PF01), MP_ROM_PTR(&pin_PF01) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PF02), MP_ROM_PTR(&pin_PF02) },
|
||||
@ -107,7 +109,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB00), MP_ROM_PTR(&pin_PB00) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB01), MP_ROM_PTR(&pin_PB01) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB02), MP_ROM_PTR(&pin_PB02) },
|
||||
#if MCU_PACKAGE == LQFP144
|
||||
#if MCU_PACKAGE == 144
|
||||
{ MP_ROM_QSTR(MP_QSTR_PF11), MP_ROM_PTR(&pin_PF11) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PF12), MP_ROM_PTR(&pin_PF12) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PF13), MP_ROM_PTR(&pin_PF13) },
|
||||
@ -116,6 +118,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
|
||||
{ MP_ROM_QSTR(MP_QSTR_PG00), MP_ROM_PTR(&pin_PG00) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PG01), MP_ROM_PTR(&pin_PG01) },
|
||||
#endif
|
||||
#if MCU_PACKAGE <= 100
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE07), MP_ROM_PTR(&pin_PE07) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE08), MP_ROM_PTR(&pin_PE08) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE09), MP_ROM_PTR(&pin_PE09) },
|
||||
@ -125,14 +128,16 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE13), MP_ROM_PTR(&pin_PE13) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE14), MP_ROM_PTR(&pin_PE14) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) },
|
||||
#endif
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) },
|
||||
#if MCU_PACKAGE == LQFP144
|
||||
#if MCU_PACKAGE != 144
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) },
|
||||
#endif
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB13), MP_ROM_PTR(&pin_PB13) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB14), MP_ROM_PTR(&pin_PB14) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB15), MP_ROM_PTR(&pin_PB15) },
|
||||
#if MCU_PACKAGE <= 100
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD08), MP_ROM_PTR(&pin_PD08) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD09), MP_ROM_PTR(&pin_PD09) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD10), MP_ROM_PTR(&pin_PD10) },
|
||||
@ -141,7 +146,8 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD13), MP_ROM_PTR(&pin_PD13) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD14), MP_ROM_PTR(&pin_PD14) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD15), MP_ROM_PTR(&pin_PD15) },
|
||||
#if MCU_PACKAGE == LQFP144
|
||||
#endif
|
||||
#if MCU_PACKAGE == 144
|
||||
{ MP_ROM_QSTR(MP_QSTR_PG02), MP_ROM_PTR(&pin_PG02) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PG03), MP_ROM_PTR(&pin_PG03) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PG04), MP_ROM_PTR(&pin_PG04) },
|
||||
@ -165,6 +171,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
|
||||
{ MP_ROM_QSTR(MP_QSTR_PC10), MP_ROM_PTR(&pin_PC10) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PC11), MP_ROM_PTR(&pin_PC11) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PC12), MP_ROM_PTR(&pin_PC12) },
|
||||
#if MCU_PACKAGE <= 100
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD00), MP_ROM_PTR(&pin_PD00) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD01), MP_ROM_PTR(&pin_PD01) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD02), MP_ROM_PTR(&pin_PD02) },
|
||||
@ -173,7 +180,8 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD05), MP_ROM_PTR(&pin_PD05) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD06), MP_ROM_PTR(&pin_PD06) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PD07), MP_ROM_PTR(&pin_PD07) },
|
||||
#if MCU_PACKAGE == LQFP144
|
||||
#endif
|
||||
#if MCU_PACKAGE == 144
|
||||
{ MP_ROM_QSTR(MP_QSTR_PG09), MP_ROM_PTR(&pin_PG09) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PG10), MP_ROM_PTR(&pin_PG10) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PG11), MP_ROM_PTR(&pin_PG11) },
|
||||
@ -189,7 +197,9 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB07), MP_ROM_PTR(&pin_PB07) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB08), MP_ROM_PTR(&pin_PB08) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PB09), MP_ROM_PTR(&pin_PB09) },
|
||||
#if MCU_PACKAGE <= 100
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE00), MP_ROM_PTR(&pin_PE00) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PE01), MP_ROM_PTR(&pin_PE01) },
|
||||
#endif
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table);
|
||||
|
@ -65,10 +65,13 @@ typedef struct {
|
||||
// TODO: SPI, UART, etc
|
||||
|
||||
// Choose based on chip
|
||||
#ifdef STM32F412Zx
|
||||
#ifdef stm32f412zx
|
||||
#include "stm32f412zx/periph.h"
|
||||
#endif
|
||||
#ifdef STM32F411xE
|
||||
#ifdef stm32f411xe
|
||||
#include "stm32f411xe/periph.h"
|
||||
#endif
|
||||
#ifdef stm32f405xx
|
||||
#include "stm32f405xx/periph.h"
|
||||
#endif
|
||||
#endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PERIPH_H__
|
||||
|
@ -77,10 +77,13 @@ extern const mp_obj_type_t mcu_pin_type;
|
||||
#define NO_PIN 0xff
|
||||
|
||||
// Choose based on chip
|
||||
#ifdef STM32F412Zx
|
||||
#ifdef stm32f412zx
|
||||
#include "stm32f412zx/pins.h"
|
||||
#endif
|
||||
#ifdef STM32F411xE
|
||||
#ifdef stm32f411xe
|
||||
#include "stm32f411xe/pins.h"
|
||||
#endif
|
||||
#ifdef stm32f405xx
|
||||
#include "stm32f405xx/pins.h"
|
||||
#endif
|
||||
#endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__
|
||||
|
@ -30,15 +30,13 @@ void stm32f4_peripherals_clocks_init(void) {
|
||||
//System clock init
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
|
||||
|
||||
/* Enable Power Control clock */
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
/* The voltage scaling allows optimizing the power consumption when the
|
||||
* device is clocked below the maximum system frequency, to update the
|
||||
* voltage scaling value regarding system frequency refer to product
|
||||
* datasheet. */
|
||||
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||
clocked below the maximum system frequency, to update the voltage scaling value
|
||||
regarding system frequency refer to product datasheet. */
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
||||
|
||||
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
||||
@ -47,28 +45,17 @@ void stm32f4_peripherals_clocks_init(void) {
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
RCC_OscInitStruct.PLL.PLLM = 8;
|
||||
RCC_OscInitStruct.PLL.PLLN = 200;
|
||||
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||
|
||||
/* Select PLLSAI output as USB clock source */
|
||||
PeriphClkInitStruct.PLLI2S.PLLI2SM = 8;
|
||||
PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4;
|
||||
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CK48;
|
||||
PeriphClkInitStruct.Clk48ClockSelection = RCC_CK48CLKSOURCE_PLLI2SQ;
|
||||
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
|
||||
|
||||
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
||||
* clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
|
||||
RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
|
||||
|
||||
clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
|
||||
}
|
||||
|
@ -24,159 +24,6 @@
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
/* GPIO PIN REFERENCE
|
||||
#define LED3_Pin GPIO_PIN_2
|
||||
#define LED3_GPIO_Port GPIOE
|
||||
#define LED4_Pin GPIO_PIN_3
|
||||
#define LED4_GPIO_Port GPIOE
|
||||
#define DFSDM_DATIN3_Pin GPIO_PIN_4
|
||||
#define DFSDM_DATIN3_GPIO_Port GPIOE
|
||||
#define A0_Pin GPIO_PIN_0
|
||||
#define A0_GPIO_Port GPIOF
|
||||
#define LCD_BLCTRL_Pin GPIO_PIN_5
|
||||
#define LCD_BLCTRL_GPIO_Port GPIOF
|
||||
#define QSPI_BK1_IO3_Pin GPIO_PIN_6
|
||||
#define QSPI_BK1_IO3_GPIO_Port GPIOF
|
||||
#define QSPI_BK1_IO2_Pin GPIO_PIN_7
|
||||
#define QSPI_BK1_IO2_GPIO_Port GPIOF
|
||||
#define QSPI_BK1_IO0_Pin GPIO_PIN_8
|
||||
#define QSPI_BK1_IO0_GPIO_Port GPIOF
|
||||
#define QSPI_BK1_IO1_Pin GPIO_PIN_9
|
||||
#define QSPI_BK1_IO1_GPIO_Port GPIOF
|
||||
#define STLK_MCO_Pin GPIO_PIN_0
|
||||
#define STLK_MCO_GPIO_Port GPIOH
|
||||
#define DFSDM_CKOUT_Pin GPIO_PIN_2
|
||||
#define DFSDM_CKOUT_GPIO_Port GPIOC
|
||||
#define JOY_SEL_Pin GPIO_PIN_0
|
||||
#define JOY_SEL_GPIO_Port GPIOA
|
||||
#define STLINK_RX_Pin GPIO_PIN_2
|
||||
#define STLINK_RX_GPIO_Port GPIOA
|
||||
#define STLINK_TX_Pin GPIO_PIN_3
|
||||
#define STLINK_TX_GPIO_Port GPIOA
|
||||
#define CODEC_I2S3_WS_Pin GPIO_PIN_4
|
||||
#define CODEC_I2S3_WS_GPIO_Port GPIOA
|
||||
#define DFSDM_DATIN0_Pin GPIO_PIN_1
|
||||
#define DFSDM_DATIN0_GPIO_Port GPIOB
|
||||
#define QSPI_CLK_Pin GPIO_PIN_2
|
||||
#define QSPI_CLK_GPIO_Port GPIOB
|
||||
#define EXT_RESET_Pin GPIO_PIN_11
|
||||
#define EXT_RESET_GPIO_Port GPIOF
|
||||
#define CTP_RST_Pin GPIO_PIN_12
|
||||
#define CTP_RST_GPIO_Port GPIOF
|
||||
#define JOY_RIGHT_Pin GPIO_PIN_14
|
||||
#define JOY_RIGHT_GPIO_Port GPIOF
|
||||
#define JOY_LEFT_Pin GPIO_PIN_15
|
||||
#define JOY_LEFT_GPIO_Port GPIOF
|
||||
#define JOY_UP_Pin GPIO_PIN_0
|
||||
#define JOY_UP_GPIO_Port GPIOG
|
||||
#define JOY_DOWN_Pin GPIO_PIN_1
|
||||
#define JOY_DOWN_GPIO_Port GPIOG
|
||||
#define D4_Pin GPIO_PIN_7
|
||||
#define D4_GPIO_Port GPIOE
|
||||
#define D5_Pin GPIO_PIN_8
|
||||
#define D5_GPIO_Port GPIOE
|
||||
#define D6_Pin GPIO_PIN_9
|
||||
#define D6_GPIO_Port GPIOE
|
||||
#define D7_Pin GPIO_PIN_10
|
||||
#define D7_GPIO_Port GPIOE
|
||||
#define D8_Pin GPIO_PIN_11
|
||||
#define D8_GPIO_Port GPIOE
|
||||
#define D9_Pin GPIO_PIN_12
|
||||
#define D9_GPIO_Port GPIOE
|
||||
#define D10_Pin GPIO_PIN_13
|
||||
#define D10_GPIO_Port GPIOE
|
||||
#define D11_Pin GPIO_PIN_14
|
||||
#define D11_GPIO_Port GPIOE
|
||||
#define D12_Pin GPIO_PIN_15
|
||||
#define D12_GPIO_Port GPIOE
|
||||
#define I2C2_SCL_Pin GPIO_PIN_10
|
||||
#define I2C2_SCL_GPIO_Port GPIOB
|
||||
#define M2_CKIN_Pin GPIO_PIN_11
|
||||
#define M2_CKIN_GPIO_Port GPIOB
|
||||
#define CODEC_I2S3_SCK_Pin GPIO_PIN_12
|
||||
#define CODEC_I2S3_SCK_GPIO_Port GPIOB
|
||||
#define D13_Pin GPIO_PIN_8
|
||||
#define D13_GPIO_Port GPIOD
|
||||
#define D14_Pin GPIO_PIN_9
|
||||
#define D14_GPIO_Port GPIOD
|
||||
#define D15_Pin GPIO_PIN_10
|
||||
#define D15_GPIO_Port GPIOD
|
||||
#define LCD_RESET_Pin GPIO_PIN_11
|
||||
#define LCD_RESET_GPIO_Port GPIOD
|
||||
#define D0_Pin GPIO_PIN_14
|
||||
#define D0_GPIO_Port GPIOD
|
||||
#define D1_Pin GPIO_PIN_15
|
||||
#define D1_GPIO_Port GPIOD
|
||||
#define CODEC_INT_Pin GPIO_PIN_2
|
||||
#define CODEC_INT_GPIO_Port GPIOG
|
||||
#define LCD_TE_Pin GPIO_PIN_4
|
||||
#define LCD_TE_GPIO_Port GPIOG
|
||||
#define CTP_INT_Pin GPIO_PIN_5
|
||||
#define CTP_INT_GPIO_Port GPIOG
|
||||
#define QSPI_BK1_NCS_Pin GPIO_PIN_6
|
||||
#define QSPI_BK1_NCS_GPIO_Port GPIOG
|
||||
#define USB_OTGFS_OVRCR_Pin GPIO_PIN_7
|
||||
#define USB_OTGFS_OVRCR_GPIO_Port GPIOG
|
||||
#define USB_OTGFS_PPWR_EN_Pin GPIO_PIN_8
|
||||
#define USB_OTGFS_PPWR_EN_GPIO_Port GPIOG
|
||||
#define CODEC_I2S3_MCK_Pin GPIO_PIN_7
|
||||
#define CODEC_I2S3_MCK_GPIO_Port GPIOC
|
||||
#define uSD_D0_Pin GPIO_PIN_8
|
||||
#define uSD_D0_GPIO_Port GPIOC
|
||||
#define uSD_D1_Pin GPIO_PIN_9
|
||||
#define uSD_D1_GPIO_Port GPIOC
|
||||
#define M2_CKINA8_Pin GPIO_PIN_8
|
||||
#define M2_CKINA8_GPIO_Port GPIOA
|
||||
#define USB_OTGFS_VBUS_Pin GPIO_PIN_9
|
||||
#define USB_OTGFS_VBUS_GPIO_Port GPIOA
|
||||
#define USB_OTGFS_ID_Pin GPIO_PIN_10
|
||||
#define USB_OTGFS_ID_GPIO_Port GPIOA
|
||||
#define USB_OTGFS_DM_Pin GPIO_PIN_11
|
||||
#define USB_OTGFS_DM_GPIO_Port GPIOA
|
||||
#define USB_OTGFS_DP_Pin GPIO_PIN_12
|
||||
#define USB_OTGFS_DP_GPIO_Port GPIOA
|
||||
#define SWDIO_Pin GPIO_PIN_13
|
||||
#define SWDIO_GPIO_Port GPIOA
|
||||
#define SWCLK_Pin GPIO_PIN_14
|
||||
#define SWCLK_GPIO_Port GPIOA
|
||||
#define uSD_D2_Pin GPIO_PIN_10
|
||||
#define uSD_D2_GPIO_Port GPIOC
|
||||
#define uSD_D3_Pin GPIO_PIN_11
|
||||
#define uSD_D3_GPIO_Port GPIOC
|
||||
#define uSD_CLK_Pin GPIO_PIN_12
|
||||
#define uSD_CLK_GPIO_Port GPIOC
|
||||
#define D2_Pin GPIO_PIN_0
|
||||
#define D2_GPIO_Port GPIOD
|
||||
#define D3_Pin GPIO_PIN_1
|
||||
#define D3_GPIO_Port GPIOD
|
||||
#define uSD_CMD_Pin GPIO_PIN_2
|
||||
#define uSD_CMD_GPIO_Port GPIOD
|
||||
#define uSD_DETECT_Pin GPIO_PIN_3
|
||||
#define uSD_DETECT_GPIO_Port GPIOD
|
||||
#define FMC_NOE_Pin GPIO_PIN_4
|
||||
#define FMC_NOE_GPIO_Port GPIOD
|
||||
#define FMC_NWE_Pin GPIO_PIN_5
|
||||
#define FMC_NWE_GPIO_Port GPIOD
|
||||
#define FMC_NE1_Pin GPIO_PIN_7
|
||||
#define FMC_NE1_GPIO_Port GPIOD
|
||||
#define SWO_Pin GPIO_PIN_3
|
||||
#define SWO_GPIO_Port GPIOB
|
||||
#define CODEC_I2S3ext_SD_Pin GPIO_PIN_4
|
||||
#define CODEC_I2S3ext_SD_GPIO_Port GPIOB
|
||||
#define CODEC_I2S3_SD_Pin GPIO_PIN_5
|
||||
#define CODEC_I2S3_SD_GPIO_Port GPIOB
|
||||
#define I2C1_SCL_Pin GPIO_PIN_6
|
||||
#define I2C1_SCL_GPIO_Port GPIOB
|
||||
#define I2C1_SDA_Pin GPIO_PIN_7
|
||||
#define I2C1_SDA_GPIO_Port GPIOB
|
||||
#define I2C2_SDA_Pin GPIO_PIN_9
|
||||
#define I2C2_SDA_GPIO_Port GPIOB
|
||||
#define LED1_Pin GPIO_PIN_0
|
||||
#define LED1_GPIO_Port GPIOE
|
||||
#define LED2_Pin GPIO_PIN_1
|
||||
#define LED2_GPIO_Port GPIOE
|
||||
*/
|
||||
|
||||
#include "stm32f4xx_hal.h"
|
||||
#include "stm32f4/gpio.h"
|
||||
#include "common-hal/microcontroller/Pin.h"
|
||||
@ -193,16 +40,6 @@ void stm32f4_peripherals_gpio_init(void) {
|
||||
__HAL_RCC_GPIOG_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
|
||||
HAL_GPIO_WritePin(GPIOE, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3, GPIO_PIN_RESET);
|
||||
//HAL_GPIO_WritePin(USB_OTGFS_PPWR_EN_GPIO_Port, USB_OTGFS_PPWR_EN_Pin, GPIO_PIN_SET);
|
||||
|
||||
//Configure LED pins
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
|
||||
|
||||
//Status LED chain
|
||||
stm32f4_peripherals_status_led(0,1);
|
||||
stm32f4_peripherals_status_led(1,0);
|
||||
@ -224,20 +61,8 @@ void stm32f4_peripherals_gpio_init(void) {
|
||||
// never_reset_pin_number(5,1); //PH1 JTRST
|
||||
}
|
||||
|
||||
//LEDs are inverted on F411 DISCO
|
||||
void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) {
|
||||
switch(led)
|
||||
{
|
||||
case 0: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_0, (state ^ 1));
|
||||
break;
|
||||
case 1: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_1, (state ^ 1));
|
||||
break;
|
||||
case 2: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, (state ^ 1));
|
||||
break;
|
||||
case 3: HAL_GPIO_WritePin(GPIOE, GPIO_PIN_3, (state ^ 1));
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
49
ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c
Normal file
49
ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c
Normal file
@ -0,0 +1,49 @@
|
||||
/*
|
||||
* This file is part of the MicroPython project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include "py/obj.h"
|
||||
#include "py/mphal.h"
|
||||
#include "stm32f4/pins.h"
|
||||
#include "stm32f4/periph.h"
|
||||
|
||||
// I2C
|
||||
|
||||
I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3};
|
||||
|
||||
const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4] = {
|
||||
I2C_SDA(1, 4, &pin_PB07),
|
||||
I2C_SDA(1, 4, &pin_PB09),
|
||||
I2C_SDA(2, 4, &pin_PB11),
|
||||
I2C_SDA(3, 4, &pin_PC09),
|
||||
};
|
||||
|
||||
const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = {
|
||||
I2C_SCL(1, 4, &pin_PB06),
|
||||
I2C_SCL(1, 4, &pin_PB08),
|
||||
I2C_SCL(2, 4, &pin_PB10),
|
||||
I2C_SCL(3, 4, &pin_PA08)
|
||||
};
|
||||
//SPI, UART, Etc
|
37
ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h
Normal file
37
ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h
Normal file
@ -0,0 +1,37 @@
|
||||
/*
|
||||
* This file is part of the MicroPython project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H
|
||||
#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H
|
||||
|
||||
//I2C
|
||||
extern I2C_TypeDef * mcu_i2c_banks[3];
|
||||
|
||||
extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[4];
|
||||
extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4];
|
||||
|
||||
|
||||
#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H
|
@ -41,35 +41,35 @@ const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT
|
||||
const mcu_pin_obj_t pin_PF00 = PIN(5, 0, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF01 = PIN(5, 1, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF02 = PIN(5, 2, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF03 = PIN(5, 3, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF04 = PIN(5, 4, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF05 = PIN(5, 5, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF06 = PIN(5, 6, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF07 = PIN(5, 7, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF08 = PIN(5, 8, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF09 = PIN(5, 9, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF10 = PIN(5, 10, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF03 = PIN(5, 3, ADC_INPUT(ADC_3,9)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF04 = PIN(5, 4, ADC_INPUT(ADC_3,14)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF05 = PIN(5, 5, ADC_INPUT(ADC_3,15)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF06 = PIN(5, 6, ADC_INPUT(ADC_3,4)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF07 = PIN(5, 7, ADC_INPUT(ADC_3,5)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF08 = PIN(5, 8, ADC_INPUT(ADC_3,6)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF09 = PIN(5, 9, ADC_INPUT(ADC_3,7)); // 144 only
|
||||
const mcu_pin_obj_t pin_PF10 = PIN(5, 10, ADC_INPUT(ADC_3,8)); // 144 only
|
||||
|
||||
const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_1,10));
|
||||
const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_1,11));
|
||||
const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_1,12));
|
||||
const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_1,13));
|
||||
const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_123,10));
|
||||
const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_123,11));
|
||||
const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_123,12));
|
||||
const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_123,13));
|
||||
|
||||
const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_1,0));
|
||||
const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_1,1));
|
||||
const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_1,2));
|
||||
const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_1,3));
|
||||
const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_1,4));
|
||||
const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_1,5));
|
||||
const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_1,6));
|
||||
const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_1,7));
|
||||
const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_123,0));
|
||||
const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_123,1));
|
||||
const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_123,2));
|
||||
const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_123,3));
|
||||
const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_12,4));
|
||||
const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_12,5));
|
||||
const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_12,6));
|
||||
const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_12,7));
|
||||
|
||||
const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_1,14));
|
||||
const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_1,15));
|
||||
const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_12,14));
|
||||
const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_12,15));
|
||||
|
||||
const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_1,8));
|
||||
const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_1,9));
|
||||
const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_12,8));
|
||||
const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_12,9));
|
||||
const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC); //BOOT1
|
||||
|
||||
const mcu_pin_obj_t pin_PF11 = PIN(5, 11, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PF12 = PIN(5, 12, NO_ADC); // 144 only
|
||||
@ -91,7 +91,7 @@ const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC);
|
||||
|
||||
const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC); // 144 only
|
||||
const mcu_pin_obj_t pin_PB11 = PIN(1, 11, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC);
|
||||
const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC);
|
||||
|
Loading…
Reference in New Issue
Block a user