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fixed c formating for pre-commit check

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This commit is contained in:
Max Holliday 2021-10-03 22:42:04 -06:00
parent 9f0cb0e0c5
commit 5ceb72009e
4 changed files with 37 additions and 22 deletions
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31
ports/atmel-samd/common-hal/alarm/__init__.c
View File

@ -196,9 +196,13 @@ void NORETURN common_hal_alarm_enter_deep_sleep(void) {
NVIC_DisableIRQ(RTC_IRQn);
// Must disable the RTC before writing to EVCTRL and TMPCTRL
RTC->MODE0.CTRLA.bit.ENABLE = 0; // Disable the RTC
while (RTC->MODE0.SYNCBUSY.bit.ENABLE); // Wait for synchronization
while (RTC->MODE0.SYNCBUSY.bit.ENABLE) { // Wait for synchronization
;
}
RTC->MODE0.CTRLA.bit.SWRST = 1; // Software reset the RTC
while (RTC->MODE0.SYNCBUSY.bit.SWRST); // Wait for synchronization
while (RTC->MODE0.SYNCBUSY.bit.SWRST) { // Wait for synchronization
;
}
RTC->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_PRESCALER_DIV1024 | // Set prescaler to 1024
RTC_MODE0_CTRLA_MODE_COUNT32; // Set RTC to mode 0, 32-bit timer
@ -213,24 +217,29 @@ void NORETURN common_hal_alarm_enter_deep_sleep(void) {
NVIC_EnableIRQ(RTC_IRQn);
// Set interrupts for TAMPER or overflow
RTC->MODE0.INTENSET.reg = RTC_MODE0_INTENSET_TAMPER;
// TimeAlarm
} else {
// TimeAlarm
// Retrieve COMP1 value before resetting RTC
// Disable interrupts
NVIC_DisableIRQ(RTC_IRQn);
// Must disable the RTC before writing to EVCTRL and TMPCTRL
RTC->MODE0.CTRLA.bit.ENABLE = 0; // Disable the RTC
while (RTC->MODE0.SYNCBUSY.bit.ENABLE); // Wait for synchronization
while (RTC->MODE0.SYNCBUSY.bit.ENABLE) { // Wait for synchronization
;
}
RTC->MODE0.CTRLA.bit.SWRST = 1; // Software reset the RTC
while (RTC->MODE0.SYNCBUSY.bit.SWRST); // Wait for synchronization
while (RTC->MODE0.SYNCBUSY.bit.SWRST) { // Wait for synchronization
;
}
RTC->MODE0.CTRLA.reg = RTC_MODE0_CTRLA_PRESCALER_DIV1024 | // Set prescaler to 1024
RTC_MODE0_CTRLA_MODE_COUNT32; // Set RTC to mode 0, 32-bit timer
RTC->MODE0.COMP[1].reg = (_target/1024) * 32;
while(RTC->MODE0.SYNCBUSY.reg);
while(RTC->MODE0.SYNCBUSY.reg) {
;
}
// Enable interrupts
NVIC_SetPriority(RTC_IRQn, 0);
@ -241,9 +250,13 @@ void NORETURN common_hal_alarm_enter_deep_sleep(void) {
// Set-up Deep Sleep Mode
// RAM retention
PM->BKUPCFG.reg = PM_BKUPCFG_BRAMCFG(0x2); // No RAM retention 0x2 partial:0x1
while (PM->BKUPCFG.bit.BRAMCFG != 0x2); // Wait for synchronization
while (PM->BKUPCFG.bit.BRAMCFG != 0x2) { // Wait for synchronization
;
}
PM->SLEEPCFG.reg = PM_SLEEPCFG_SLEEPMODE_BACKUP;
while(PM->SLEEPCFG.bit.SLEEPMODE != PM_SLEEPCFG_SLEEPMODE_BACKUP_Val);
while (PM->SLEEPCFG.bit.SLEEPMODE != PM_SLEEPCFG_SLEEPMODE_BACKUP_Val) {
;
}
RTC->MODE0.CTRLA.bit.ENABLE = 1; // Enable the RTC
while (RTC->MODE0.SYNCBUSY.bit.ENABLE); // Wait for synchronization

4
ports/atmel-samd/common-hal/alarm/time/TimeAlarm.c
View File

@ -119,7 +119,9 @@ void alarm_time_timealarm_set_alarms(bool deep_sleep, size_t n_alarms, const mp_
}
// Set COMP1 for fake sleep. This will be reset for real deep sleep anyways.
RTC->MODE0.COMP[1].reg = wakeup_in_ticks;
while (RTC->MODE0.SYNCBUSY.reg);
while (RTC->MODE0.SYNCBUSY.reg) {
;
}
// This is set for fake sleep. Max fake sleep time is ~72 hours
// True deep sleep isn't limited by this