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Implement SPI flash settings, bugfix for SPI pin assignment

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This commit is contained in:
Hierophect 2019-10-02 15:17:49 -04:00
parent d6e987e587
commit 5a2f82095a
5 changed files with 22 additions and 14 deletions
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6
ports/stm32f4/boards/feather_f405/mpconfigboard.h
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@ -35,3 +35,9 @@
#define AUTORESET_DELAY_MS 500
#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)
// On-board flash
#define SPI_FLASH_MOSI_PIN &pin_PB05
#define SPI_FLASH_MISO_PIN &pin_PB04
#define SPI_FLASH_SCK_PIN &pin_PB03
#define SPI_FLASH_CS_PIN &pin_PA15

6
ports/stm32f4/boards/feather_f405/mpconfigboard.mk
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@ -4,8 +4,10 @@ USB_PRODUCT = "Feather F405"
USB_MANUFACTURER = "Adafruit Industries LLC"
USB_DEVICES = "CDC,MSC"
INTERNAL_FLASH_FILESYSTEM = 1
LONGINT_IMPL = NONE
SPI_FLASH_FILESYSTEM = 1
EXTERNAL_FLASH_DEVICE_COUNT = 1
EXTERNAL_FLASH_DEVICES = GD25Q16C
LONGINT_IMPL = MPZ
MCU_SERIES = m4
MCU_VARIANT = stm32f4

10
ports/stm32f4/common-hal/busio/SPI.c
View File

@ -107,7 +107,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
continue;
}
//store pins if not
self->sck = &mcu_spi_sck_list[j];
self->sck = &mcu_spi_sck_list[i];
self->mosi = &mcu_spi_mosi_list[j];
self->miso = &mcu_spi_miso_list[k];
break;
@ -196,7 +196,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
self->handle.Init.CLKPolarity = SPI_POLARITY_LOW;
self->handle.Init.CLKPhase = SPI_PHASE_1EDGE;
self->handle.Init.NSS = SPI_NSS_SOFT;
self->handle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
self->handle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
self->handle.Init.FirstBit = SPI_FIRSTBIT_MSB;
self->handle.Init.TIMode = SPI_TIMODE_DISABLE;
self->handle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
@ -383,20 +383,20 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
bool common_hal_busio_spi_write(busio_spi_obj_t *self,
const uint8_t *data, size_t len) {
HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, 2);
HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, 5);
return result == HAL_OK ? 1 : 0;
}
bool common_hal_busio_spi_read(busio_spi_obj_t *self,
uint8_t *data, size_t len, uint8_t write_value) {
HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, 2);
HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, 5);
return result == HAL_OK ? 1 : 0;
}
bool common_hal_busio_spi_transfer(busio_spi_obj_t *self,
uint8_t *data_out, uint8_t *data_in, size_t len) {
HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle,
data_out, data_in, (uint16_t)len,2);
data_out, data_in, (uint16_t)len,5);
return result == HAL_OK ? 1 : 0;
}

6
ports/stm32f4/peripherals/stm32f4/stm32f405xx/gpio.c
View File

@ -40,9 +40,9 @@ void stm32f4_peripherals_gpio_init(void) {
never_reset_pin_number(2,15); //PC15 OSC32_OUT
never_reset_pin_number(0,13); //PA13 SWDIO
never_reset_pin_number(0,14); //PA14 SWCLK
never_reset_pin_number(0,15); //PA15 JTDI
never_reset_pin_number(1,3); //PB3 JTDO
never_reset_pin_number(1,4); //PB4 JTRST
// never_reset_pin_number(0,15); //PA15 JTDI
// never_reset_pin_number(1,3); //PB3 JTDO
// never_reset_pin_number(1,4); //PB4 JTRST
// Port H is not included in GPIO port array
// never_reset_pin_number(5,0); //PH0 JTDO

6
ports/stm32f4/peripherals/stm32f4/stm32f412zx/gpio.c
View File

@ -215,9 +215,9 @@ void stm32f4_peripherals_gpio_init(void) {
never_reset_pin_number(2,15); //PC15 OSC32_OUT
never_reset_pin_number(0,13); //PA13 SWDIO
never_reset_pin_number(0,14); //PA14 SWCLK
never_reset_pin_number(0,15); //PA15 JTDI
never_reset_pin_number(1,3); //PB3 JTDO
never_reset_pin_number(1,4); //PB4 JTRST
//never_reset_pin_number(0,15); //PA15 JTDI
//never_reset_pin_number(1,3); //PB3 JTDO
//never_reset_pin_number(1,4); //PB4 JTRST
// Port H is not included in GPIO port array
// never_reset_pin_number(5,0); //PH0 JTDO