diff --git a/ports/stm32f4/boards/feather_f405/mpconfigboard.h b/ports/stm32f4/boards/feather_f405/mpconfigboard.h
index edbc79ea92..831a17573a 100644
--- a/ports/stm32f4/boards/feather_f405/mpconfigboard.h
+++ b/ports/stm32f4/boards/feather_f405/mpconfigboard.h
@@ -34,4 +34,10 @@
 #define FLASH_PAGE_SIZE             (0x4000)
 
 #define AUTORESET_DELAY_MS 500
-#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)
\ No newline at end of file
+#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)
+
+// On-board flash
+#define SPI_FLASH_MOSI_PIN          &pin_PB05
+#define SPI_FLASH_MISO_PIN          &pin_PB04
+#define SPI_FLASH_SCK_PIN           &pin_PB03
+#define SPI_FLASH_CS_PIN            &pin_PA15
diff --git a/ports/stm32f4/boards/feather_f405/mpconfigboard.mk b/ports/stm32f4/boards/feather_f405/mpconfigboard.mk
index 5ea1ab4501..789dc0f05d 100644
--- a/ports/stm32f4/boards/feather_f405/mpconfigboard.mk
+++ b/ports/stm32f4/boards/feather_f405/mpconfigboard.mk
@@ -4,8 +4,10 @@ USB_PRODUCT = "Feather F405"
 USB_MANUFACTURER = "Adafruit Industries LLC"
 USB_DEVICES = "CDC,MSC"
 
-INTERNAL_FLASH_FILESYSTEM = 1
-LONGINT_IMPL = NONE
+SPI_FLASH_FILESYSTEM = 1
+EXTERNAL_FLASH_DEVICE_COUNT = 1
+EXTERNAL_FLASH_DEVICES = GD25Q16C
+LONGINT_IMPL = MPZ
 
 MCU_SERIES = m4
 MCU_VARIANT = stm32f4
diff --git a/ports/stm32f4/common-hal/busio/SPI.c b/ports/stm32f4/common-hal/busio/SPI.c
index 50b15978c5..ec2bf7ef1b 100644
--- a/ports/stm32f4/common-hal/busio/SPI.c
+++ b/ports/stm32f4/common-hal/busio/SPI.c
@@ -107,7 +107,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
                                 continue;
                             }
                             //store pins if not
-                            self->sck = &mcu_spi_sck_list[j];
+                            self->sck = &mcu_spi_sck_list[i];
                             self->mosi = &mcu_spi_mosi_list[j];
                             self->miso = &mcu_spi_miso_list[k];
                             break;
@@ -196,7 +196,7 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self,
     self->handle.Init.CLKPolarity = SPI_POLARITY_LOW;
     self->handle.Init.CLKPhase = SPI_PHASE_1EDGE;
     self->handle.Init.NSS = SPI_NSS_SOFT;
-    self->handle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_16;
+    self->handle.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
     self->handle.Init.FirstBit = SPI_FIRSTBIT_MSB;
     self->handle.Init.TIMode = SPI_TIMODE_DISABLE;
     self->handle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
@@ -383,20 +383,20 @@ void common_hal_busio_spi_unlock(busio_spi_obj_t *self) {
 
 bool common_hal_busio_spi_write(busio_spi_obj_t *self,
         const uint8_t *data, size_t len) {
-    HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, 2);
+    HAL_StatusTypeDef result = HAL_SPI_Transmit (&self->handle, (uint8_t *)data, (uint16_t)len, 5);
     return result == HAL_OK ? 1 : 0;
 }
 
 bool common_hal_busio_spi_read(busio_spi_obj_t *self,
         uint8_t *data, size_t len, uint8_t write_value) {
-    HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, 2);
+    HAL_StatusTypeDef result = HAL_SPI_Receive (&self->handle, data, (uint16_t)len, 5);
     return result == HAL_OK ? 1 : 0;
 }
 
 bool common_hal_busio_spi_transfer(busio_spi_obj_t *self, 
         uint8_t *data_out, uint8_t *data_in, size_t len) {
     HAL_StatusTypeDef result = HAL_SPI_TransmitReceive (&self->handle,
-        data_out, data_in, (uint16_t)len,2);
+        data_out, data_in, (uint16_t)len,5);
     return result == HAL_OK ? 1 : 0;
 }
 
diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/gpio.c b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/gpio.c
index 3c9af0e438..f9be3b4ec2 100644
--- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/gpio.c
+++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/gpio.c
@@ -40,9 +40,9 @@ void stm32f4_peripherals_gpio_init(void) {
     never_reset_pin_number(2,15); //PC15 OSC32_OUT
     never_reset_pin_number(0,13); //PA13 SWDIO
     never_reset_pin_number(0,14); //PA14 SWCLK
-    never_reset_pin_number(0,15); //PA15 JTDI
-    never_reset_pin_number(1,3); //PB3 JTDO
-    never_reset_pin_number(1,4); //PB4 JTRST
+    // never_reset_pin_number(0,15); //PA15 JTDI
+    // never_reset_pin_number(1,3); //PB3 JTDO
+    // never_reset_pin_number(1,4); //PB4 JTRST
 
     // Port H is not included in GPIO port array
     // never_reset_pin_number(5,0); //PH0 JTDO   
diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/gpio.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/gpio.c
index d839a8f9ee..d17ab4e018 100644
--- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/gpio.c
+++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/gpio.c
@@ -215,9 +215,9 @@ void stm32f4_peripherals_gpio_init(void) {
     never_reset_pin_number(2,15); //PC15 OSC32_OUT
     never_reset_pin_number(0,13); //PA13 SWDIO
     never_reset_pin_number(0,14); //PA14 SWCLK
-    never_reset_pin_number(0,15); //PA15 JTDI
-    never_reset_pin_number(1,3); //PB3 JTDO
-    never_reset_pin_number(1,4); //PB4 JTRST
+    //never_reset_pin_number(0,15); //PA15 JTDI
+    //never_reset_pin_number(1,3); //PB3 JTDO
+    //never_reset_pin_number(1,4); //PB4 JTRST
 
     // Port H is not included in GPIO port array
     // never_reset_pin_number(5,0); //PH0 JTDO