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Merge pull request #768 from sommersoft/rtc_fix 

RTC Fix: Revert To Using Internal Oscillator
This commit is contained in:
Scott Shawcroft 2018-04-18 07:49:19 -07:00 committed by GitHub
parent 7f7cbe8efa a0eb51cc97
commit 59be777764
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
4 changed files with 13 additions and 13 deletions
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2
ports/atmel-samd/asf4_conf/samd21/hpl_gclk_config.h
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@ -259,7 +259,7 @@
// <i> This defines the clock source for generic clock generator 2 // <i> This defines the clock source for generic clock generator 2
// <id> gclk_gen_2_oscillator // <id> gclk_gen_2_oscillator
#ifndef CONF_GCLK_GEN_2_SRC #ifndef CONF_GCLK_GEN_2_SRC
#define CONF_GCLK_GEN_2_SRC GCLK_GENCTRL_SRC_XOSC32K #define CONF_GCLK_GEN_2_SRC GCLK_GENCTRL_SRC_OSC32K
#endif #endif
// </h> // </h>

10
ports/atmel-samd/asf4_conf/samd21/hpl_sysctrl_config.h
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@ -197,7 +197,7 @@
// <i> Indicates whether configuration for External 32K Osc is enabled or not // <i> Indicates whether configuration for External 32K Osc is enabled or not
// <id> enable_xosc32k // <id> enable_xosc32k
#ifndef CONF_XOSC32K_CONFIG #ifndef CONF_XOSC32K_CONFIG
#define CONF_XOSC32K_CONFIG 1 #define CONF_XOSC32K_CONFIG 0
#endif #endif
// <h> 32kHz External Crystal Oscillator (XOSC32K) Control // <h> 32kHz External Crystal Oscillator (XOSC32K) Control
@ -205,7 +205,7 @@
// <i> Indicates whether External 32K Oscillator is enabled or not // <i> Indicates whether External 32K Oscillator is enabled or not
// <id> xosc32k_arch_enable // <id> xosc32k_arch_enable
#ifndef CONF_XOSC32K_ENABLE #ifndef CONF_XOSC32K_ENABLE
#define CONF_XOSC32K_ENABLE 1 #define CONF_XOSC32K_ENABLE 0
#endif #endif
// <q> On Demand // <q> On Demand
@ -223,7 +223,7 @@
// <i> If this bit is 1: The oscillator is not stopped in standby sleep mode. // <i> If this bit is 1: The oscillator is not stopped in standby sleep mode.
// <id> xosc32k_arch_runstdby // <id> xosc32k_arch_runstdby
#ifndef CONF_XOSC32K_RUNSTDBY #ifndef CONF_XOSC32K_RUNSTDBY
#define CONF_XOSC32K_RUNSTDBY 1 #define CONF_XOSC32K_RUNSTDBY 0
#endif #endif
// <q> Enable 1K // <q> Enable 1K
@ -237,14 +237,14 @@
// <i> Enable 32 Khz Output // <i> Enable 32 Khz Output
// <id> xosc32k_arch_en32k // <id> xosc32k_arch_en32k
#ifndef CONF_XOSC32K_EN32K #ifndef CONF_XOSC32K_EN32K
#define CONF_XOSC32K_EN32K 1 #define CONF_XOSC32K_EN32K 0
#endif #endif
// <q> Enable XTAL // <q> Enable XTAL
// <i> Enable XTAL // <i> Enable XTAL
// <id> xosc32k_arch_xtalen // <id> xosc32k_arch_xtalen
#ifndef CONF_XOSC32K_XTALEN #ifndef CONF_XOSC32K_XTALEN
#define CONF_XOSC32K_XTALEN 1 #define CONF_XOSC32K_XTALEN 0
#endif #endif
// <q> Write Lock // <q> Write Lock

2
ports/atmel-samd/asf4_conf/samd51/hpl_gclk_config.h
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@ -188,7 +188,7 @@
// <i> This defines the clock source for generic clock generator 2 // <i> This defines the clock source for generic clock generator 2
// <id> gclk_gen_2_oscillator // <id> gclk_gen_2_oscillator
#ifndef CONF_GCLK_GEN_2_SOURCE #ifndef CONF_GCLK_GEN_2_SOURCE
#define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_XOSC32K #define CONF_GCLK_GEN_2_SOURCE GCLK_GENCTRL_SRC_OSCULP32K
#endif #endif
// <q> Run in Standby // <q> Run in Standby

12
ports/atmel-samd/asf4_conf/samd51/hpl_osc32kctrl_config.h
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@ -23,7 +23,7 @@
// <q> Use 1 kHz output // <q> Use 1 kHz output
// <id> rtc_1khz_selection // <id> rtc_1khz_selection
#ifndef CONF_RTCCTRL_1KHZ #ifndef CONF_RTCCTRL_1KHZ
#define CONF_RTCCTRL_1KHZ 0 #define CONF_RTCCTRL_1KHZ 1
#endif #endif
#if CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_OSCULP32K #if CONF_RTCCTRL_SRC == GCLK_GENCTRL_SRC_OSCULP32K
@ -62,7 +62,7 @@
// <0x6=>8000092us // <0x6=>8000092us
// <id> xosc32k_arch_startup // <id> xosc32k_arch_startup
#ifndef CONF_XOSC32K_STARTUP #ifndef CONF_XOSC32K_STARTUP
#define CONF_XOSC32K_STARTUP 0x4 #define CONF_XOSC32K_STARTUP 0x0
#endif #endif
// <q> On Demand Control // <q> On Demand Control
@ -76,7 +76,7 @@
// <i> Indicates whether Run in Standby is enabled or not // <i> Indicates whether Run in Standby is enabled or not
// <id> xosc32k_arch_runstdby // <id> xosc32k_arch_runstdby
#ifndef CONF_XOSC32K_RUNSTDBY #ifndef CONF_XOSC32K_RUNSTDBY
#define CONF_XOSC32K_RUNSTDBY 1 #define CONF_XOSC32K_RUNSTDBY 0
#endif #endif
// <q> 1kHz Output Enable // <q> 1kHz Output Enable
@ -90,7 +90,7 @@
// <i> Indicates whether 32kHz Output is enabled or not // <i> Indicates whether 32kHz Output is enabled or not
// <id> xosc32k_arch_en32k // <id> xosc32k_arch_en32k
#ifndef CONF_XOSC32K_EN32K #ifndef CONF_XOSC32K_EN32K
#define CONF_XOSC32K_EN32K 1 #define CONF_XOSC32K_EN32K 0
#endif #endif
// <q> Clock Switch Back // <q> Clock Switch Back
@ -118,7 +118,7 @@
// <i> Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not // <i> Indicates whether the connections between the I/O pads and the external clock or crystal oscillator is enabled or not
// <id> xosc32k_arch_xtalen // <id> xosc32k_arch_xtalen
#ifndef CONF_XOSC32K_XTALEN #ifndef CONF_XOSC32K_XTALEN
#define CONF_XOSC32K_XTALEN 1 #define CONF_XOSC32K_XTALEN 0
#endif #endif
// <o> Control Gain Mode // <o> Control Gain Mode
@ -137,7 +137,7 @@
// <i> Indicates whether configuration for OSCULP32K is enabled or not // <i> Indicates whether configuration for OSCULP32K is enabled or not
// <id> enable_osculp32k // <id> enable_osculp32k
#ifndef CONF_OSCULP32K_CONFIG #ifndef CONF_OSCULP32K_CONFIG
#define CONF_OSCULP32K_CONFIG 0 #define CONF_OSCULP32K_CONFIG 1
#endif #endif
// <h> 32kHz Ultra Low Power Internal Oscillator Control // <h> 32kHz Ultra Low Power Internal Oscillator Control