Merge pull request #5429 from process1183/dac_clock_comments
[#4701] Correct DAC clock speed comments for SAMD21 and SAMD51
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5907ffbe18
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@ -85,8 +85,8 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t *self,
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_pm_enable_bus_clock(PM_BUS_APBC, DAC);
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#endif
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// SAMD21: This clock should be <= 12 MHz, per datasheet section 47.6.3.
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// SAMD51: This clock should be <= 350kHz, per datasheet table 37-6.
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// SAMD21: This clock should be <= 350 kHz, per datasheet table 36-7.
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// SAMD51: This clock should be <= 12 MHz, per datasheet section 47.6.3.
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_gclk_enable_channel(DAC_GCLK_ID, CONF_GCLK_DAC_SRC);
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// Don't double init the DAC on the SAMD51 when both outputs are in use. We use the free state
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