diff --git a/ports/atmel-samd/boards/gemma_m0/pins.c b/ports/atmel-samd/boards/gemma_m0/pins.c index 196e438e0b..c9c7ea555b 100644 --- a/ports/atmel-samd/boards/gemma_m0/pins.c +++ b/ports/atmel-samd/boards/gemma_m0/pins.c @@ -21,6 +21,7 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_APA102_MOSI), MP_ROM_PTR(&pin_PA00) }, { MP_ROM_QSTR(MP_QSTR_APA102_SCK), MP_ROM_PTR(&pin_PA01) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, diff --git a/ports/nrf/Makefile b/ports/nrf/Makefile index f3cc0e35ba..3ad9748466 100755 --- a/ports/nrf/Makefile +++ b/ports/nrf/Makefile @@ -24,9 +24,6 @@ ifneq ($(SD), ) include drivers/bluetooth/bluetooth_common.mk endif -# qstr definitions (must come before including py.mk) -QSTR_DEFS = qstrdefsport.h $(BUILD)/pins_qstr.h - FROZEN_MPY_DIR = freeze # include py core make definitions @@ -53,6 +50,7 @@ INC += -I./nrfx/drivers/include INC += -I../../lib/mp-readline INC += -I./drivers/bluetooth INC += -I./drivers +INC += -I./peripherals INC += -I../../lib/tinyusb/src INC += -I./usb @@ -105,6 +103,7 @@ SRC_C += \ drivers/bluetooth/ble_drv.c \ drivers/bluetooth/ble_uart.c \ boards/$(BOARD)/board.c \ + boards/$(BOARD)/pins.c \ nrfx/mdk/system_$(MCU_SUB_VARIANT).c \ nrfx/hal/nrf_nvmc.c \ device/$(MCU_VARIANT)/startup_$(MCU_SUB_VARIANT).c \ @@ -119,6 +118,7 @@ SRC_C += \ lib/utils/sys_stdio_mphal.c \ lib/libc/string0.c \ lib/mp-readline/readline.c \ + peripherals/nrf/$(MCU_CHIP)/pins.c \ supervisor/shared/memory.c DRIVERS_SRC_C += $(addprefix modules/,\ @@ -150,6 +150,7 @@ SRC_COMMON_HAL += \ busio/I2C.c \ busio/SPI.c \ busio/UART.c \ + neopixel_write/__init__.c \ pulseio/__init__.c \ pulseio/PulseIn.c \ pulseio/PulseOut.c \ @@ -238,7 +239,6 @@ FROZEN_MPY_PY_FILES := $(shell find -L $(FROZEN_MPY_DIR) -type f -name '*.py') FROZEN_MPY_MPY_FILES := $(addprefix $(BUILD)/,$(FROZEN_MPY_PY_FILES:.py=.mpy)) OBJ += $(PY_O) $(SUPERVISOR_O) $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) -OBJ += $(BUILD)/pins_gen.o OBJ += $(addprefix $(BUILD)/, $(SRC_NRFX:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(SRC_COMMON_HAL_EXPANDED:.c=.o)) @@ -333,7 +333,7 @@ dfu-flash: $(BUILD)/dfu-package.zip $(NRFUTIL) --verbose dfu serial --package $^ -p $(SERIAL) -b 115200 --singlebank $(DFU_TOUCH) ## Create DFU package file -dfu-gen: $(BUILD)/dfu-package.zip +dfu-gen: $(BUILD)/dfu-package.zip $(BUILD)/dfu-package.zip: $(BUILD)/$(OUTPUT_FILENAME).hex $(NRFUTIL) dfu genpkg --sd-req 0xFFFE --dev-type 0x0052 --application $^ $(BUILD)/dfu-package.zip @@ -350,29 +350,8 @@ SRC_QSTR += $(SRC_C) $(SRC_SUPERVISOR) $(SRC_MOD) $(DRIVERS_SRC_C) $(SRC_COMMON_ # SRC_QSTR SRC_QSTR_AUTO_DEPS += -# Making OBJ use an order-only depenedency on the generated pins.h file -# has the side effect of making the pins.h file before we actually compile -# any of the objects. The normal dependency generation will deal with the -# case when pins.h is modified. But when it doesn't exist, we don't know -# which source files might need it. -$(OBJ): | $(HEADER_BUILD)/pins.h - -# Use a pattern rule here so that make will only call make-pins.py once to make -# both pins_g.c and pins.h -$(BUILD)/%_gen.c $(HEADER_BUILD)/%.h $(BUILD)/%_qstr.h: boards/$(BOARD)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD) - $(ECHO) "Create $@" - $(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) > $(GEN_PINS_SRC) - -$(BUILD)/pins_gen.o: $(BUILD)/pins_gen.c - $(call compile_c) - -MAKE_PINS = boards/make-pins.py -BOARD_PINS = boards/$(BOARD)/pins.csv AF_FILE = $(MCU_VARIANT)_af.csv PREFIX_FILE = boards/$(MCU_VARIANT)_prefix.c -GEN_PINS_SRC = $(BUILD)/pins_gen.c -GEN_PINS_HDR = $(HEADER_BUILD)/pins.h -GEN_PINS_QSTR = $(BUILD)/pins_qstr.h ifneq ($(FROZEN_DIR),) # To use frozen source modules, put your .py files in a subdirectory (eg scripts/) diff --git a/ports/nrf/board_busses.c b/ports/nrf/board_busses.c new file mode 100644 index 0000000000..91f0def6d3 --- /dev/null +++ b/ports/nrf/board_busses.c @@ -0,0 +1,114 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "shared-bindings/busio/I2C.h" +#include "shared-bindings/busio/SPI.h" +#include "shared-bindings/busio/UART.h" + +#include "shared-bindings/microcontroller/Pin.h" +#include "supervisor/shared/translate.h" +#include "mpconfigboard.h" +#include "nrf/pins.h" +#include "py/runtime.h" + +#if !defined(DEFAULT_I2C_BUS_SDA) || !defined(DEFAULT_I2C_BUS_SCL) + STATIC mp_obj_t board_i2c(void) { + mp_raise_NotImplementedError(translate("No default I2C bus")); + return NULL; + } +#else + STATIC mp_obj_t i2c_singleton = NULL; + + STATIC mp_obj_t board_i2c(void) { + + if (i2c_singleton == NULL) { + busio_i2c_obj_t *self = m_new_obj(busio_i2c_obj_t); + self->base.type = &busio_i2c_type; + + assert_pin_free(DEFAULT_I2C_BUS_SDA); + assert_pin_free(DEFAULT_I2C_BUS_SCL); + common_hal_busio_i2c_construct(self, DEFAULT_I2C_BUS_SCL, DEFAULT_I2C_BUS_SDA, 400000, 0); + i2c_singleton = (mp_obj_t)self; + } + return i2c_singleton; + + } +#endif +MP_DEFINE_CONST_FUN_OBJ_0(board_i2c_obj, board_i2c); + +#if !defined(DEFAULT_SPI_BUS_SCK) || !defined(DEFAULT_SPI_BUS_MISO) || !defined(DEFAULT_SPI_BUS_MOSI) + STATIC mp_obj_t board_spi(void) { + mp_raise_NotImplementedError(translate("No default SPI bus")); + return NULL; + } +#else + STATIC mp_obj_t spi_singleton = NULL; + + STATIC mp_obj_t board_spi(void) { + + if (spi_singleton == NULL) { + busio_spi_obj_t *self = m_new_obj(busio_spi_obj_t); + self->base.type = &busio_spi_type; + assert_pin_free(DEFAULT_SPI_BUS_SCK); + assert_pin_free(DEFAULT_SPI_BUS_MOSI); + assert_pin_free(DEFAULT_SPI_BUS_MISO); + const mcu_pin_obj_t* clock = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_SCK); + const mcu_pin_obj_t* mosi = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_MOSI); + const mcu_pin_obj_t* miso = MP_OBJ_TO_PTR(DEFAULT_SPI_BUS_MISO); + common_hal_busio_spi_construct(self, clock, mosi, miso); + spi_singleton = (mp_obj_t)self; + } + return spi_singleton; + } +#endif +MP_DEFINE_CONST_FUN_OBJ_0(board_spi_obj, board_spi); + +#if !defined(DEFAULT_UART_BUS_RX) || !defined(DEFAULT_UART_BUS_TX) + STATIC mp_obj_t board_uart(void) { + mp_raise_NotImplementedError(translate("No default UART bus")); + return NULL; + } +#else + STATIC mp_obj_t uart_singleton = NULL; + + STATIC mp_obj_t board_uart(void) { + if (uart_singleton == NULL) { + busio_uart_obj_t *self = m_new_obj(busio_uart_obj_t); + self->base.type = &busio_uart_type; + + assert_pin_free(DEFAULT_UART_BUS_RX); + assert_pin_free(DEFAULT_UART_BUS_TX); + + const mcu_pin_obj_t* rx = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_RX); + const mcu_pin_obj_t* tx = MP_OBJ_TO_PTR(DEFAULT_UART_BUS_TX); + + common_hal_busio_uart_construct(self, tx, rx, 9600, 8, PARITY_NONE, 1, 1000, 64); + uart_singleton = (mp_obj_t)self; + } + return uart_singleton; + } +#endif +MP_DEFINE_CONST_FUN_OBJ_0(board_uart_obj, board_uart); diff --git a/ports/nrf/board_busses.h b/ports/nrf/board_busses.h new file mode 100644 index 0000000000..2a4bfc3d4b --- /dev/null +++ b/ports/nrf/board_busses.h @@ -0,0 +1,39 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_BOARD_BUSSES_H +#define MICROPY_INCLUDED_NRF_BOARD_BUSSES_H + +void board_i2c(void); +extern mp_obj_fun_builtin_fixed_t board_i2c_obj; + +void board_spi(void); +extern mp_obj_fun_builtin_fixed_t board_spi_obj; + +void board_uart(void); +extern mp_obj_fun_builtin_fixed_t board_uart_obj; + +#endif // MICROPY_INCLUDED_NRF_BOARD_BUSSES_H diff --git a/ports/nrf/boards/feather_nrf52832/mpconfigboard.h b/ports/nrf/boards/feather_nrf52832/mpconfigboard.h index 84afc5e2d7..0da1abfc47 100644 --- a/ports/nrf/boards/feather_nrf52832/mpconfigboard.h +++ b/ports/nrf/boards/feather_nrf52832/mpconfigboard.h @@ -34,3 +34,13 @@ #define PORT_HEAP_SIZE (32 * 1024) #define CIRCUITPY_AUTORELOAD_DELAY_MS 500 + +#define DEFAULT_I2C_BUS_SCL (&pin_P0_26) +#define DEFAULT_I2C_BUS_SDA (&pin_P0_25) + +#define DEFAULT_SPI_BUS_SCK (&pin_P0_12) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_13) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_14) + +#define DEFAULT_UART_BUS_RX (&pin_P0_08) +#define DEFAULT_UART_BUS_TX (&pin_P0_06) diff --git a/ports/nrf/boards/feather_nrf52832/mpconfigboard.mk b/ports/nrf/boards/feather_nrf52832/mpconfigboard.mk index c370b724e7..5b1f6e939c 100644 --- a/ports/nrf/boards/feather_nrf52832/mpconfigboard.mk +++ b/ports/nrf/boards/feather_nrf52832/mpconfigboard.mk @@ -1,6 +1,8 @@ MCU_SERIES = m4 MCU_VARIANT = nrf52 +# Historical: nrf52 means nrf52832 MCU_SUB_VARIANT = nrf52 +MCU_CHIP = nrf52832 SD ?= s132 SOFTDEV_VERSION ?= 2.0.1 @@ -8,4 +10,4 @@ LD_FILE = boards/feather_nrf52832/custom_nrf52832_dfu_app_$(SOFTDEV_VERSION).ld BOOT_FILE = boards/feather_nrf52832/bootloader/feather52_bootloader_$(SOFTDEV_VERSION)_s132_single BOOT_SETTING_ADDR = 0x7F000 -NRF_DEFINES += -DNRF52832_XXAA +NRF_DEFINES += -DNRF52832_XXAA -DNRF52832 diff --git a/ports/nrf/boards/feather_nrf52832/pins.c b/ports/nrf/boards/feather_nrf52832/pins.c new file mode 100644 index 0000000000..b14b944e88 --- /dev/null +++ b/ports/nrf/boards/feather_nrf52832/pins.c @@ -0,0 +1,46 @@ +#include "shared-bindings/board/__init__.h" + +#include "board_busses.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_14) }, + + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_DFU), MP_ROM_PTR(&pin_P0_20) }, + + { MP_ROM_QSTR(MP_QSTR_NFC1), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_NFC2), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_27), MP_ROM_PTR(&pin_P0_27) }, + + { MP_ROM_QSTR(MP_QSTR_D30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_P0_30) }, + + { MP_ROM_QSTR(MP_QSTR_D31), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P0_17) }, + + { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_P0_19) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_25) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/feather_nrf52832/pins.csv b/ports/nrf/boards/feather_nrf52832/pins.csv deleted file mode 100644 index c041900640..0000000000 --- a/ports/nrf/boards/feather_nrf52832/pins.csv +++ /dev/null @@ -1,24 +0,0 @@ -A0,P0_02 -A1,P0_03 -A2,P0_04 -A3,P0_05 -TX,P0_06 -RX,P0_08 -NFC1,P0_09 -NFC2,P0_10 -D11,P0_11 -SCK,P0_12 -MOSI,P0_13 -MISO,P0_14 -D15,P0_15 -D16,P0_16 -LED1,P0_17 -LED2,P0_19 -DFU,P0_20 -SDA,P0_25 -SCL,P0_26 -D27,P0_27 -A4,P0_28 -A5,P0_29 -A6,P0_30 -A7,P0_31 diff --git a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h index ce21e73861..81818741d1 100644 --- a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h +++ b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.h @@ -29,20 +29,16 @@ #define MICROPY_HW_BOARD_NAME "Adafruit Feather nRF52840 Express" #define MICROPY_HW_MCU_NAME "nRF52840" -#define MICROPY_PY_SYS_PLATFORM "Feather52840" +#define MICROPY_PY_SYS_PLATFORM "Feather52840Express" -// #define MICROPY_HW_NEOPIXEL NRF_GPIO_PIN_MAP(0, 13) +#define MICROPY_HW_NEOPIXEL (&pin_P0_13) -// #define MICROPY_QSPI_DATA0 NRF_GPIO_PIN_MAP(1, 9) -// #define MICROPY_QSPI_DATA1 NRF_GPIO_PIN_MAP(0, 11) -// #define MICROPY_QSPI_DATA2 NRF_GPIO_PIN_MAP(0, 12) -// #define MICROPY_QSPI_DATA3 NRF_GPIO_PIN_MAP(0, 14) -// #define MICROPY_QSPI_SCK NRF_GPIO_PIN_MAP(0, 8) -// #define MICROPY_QSPI_CS NRF_GPIO_PIN_MAP(1, 8) - -// #define MICROPY_HW_UART_RX NRF_GPIO_PIN_MAP(0, 8) -// #define MICROPY_HW_UART_TX NRF_GPIO_PIN_MAP(0, 6) -// #define MICROPY_HW_UART_HWFC (0) +#define MICROPY_QSPI_DATA0 (&pin_P1_09) +#define MICROPY_QSPI_DATA1 (&pin_P0_11) +#define MICROPY_QSPI_DATA2 (&pin_P0_12) +#define MICROPY_QSPI_DATA3 (&pin_P0_14) +#define MICROPY_QSPI_SCK (&pin_P0_08) +#define MICROPY_QSPI_CS (&pin_P1_08) #define CIRCUITPY_AUTORELOAD_DELAY_MS 500 @@ -64,12 +60,12 @@ #define BOARD_HAS_CRYSTAL 1 -#define DEFAULT_I2C_BUS_SCL NRF_GPIO_PIN_MAP(1, 11) -#define DEFAULT_I2C_BUS_SDA NRF_GPIO_PIN_MAP(1, 12) +#define DEFAULT_I2C_BUS_SCL (&pin_P1_11) +#define DEFAULT_I2C_BUS_SDA (&pin_P1_12) -#define DEFAULT_SPI_BUS_SCK NRF_GPIO_PIN_MAP(0, 20) -#define DEFAULT_SPI_BUS_MOSI NRF_GPIO_PIN_MAP(0, 23) -#define DEFAULT_SPI_BUS_MISO NRF_GPIO_PIN_MAP(0, 22) +#define DEFAULT_SPI_BUS_SCK (&pin_P0_20) +#define DEFAULT_SPI_BUS_MOSI (&pin_P0_23) +#define DEFAULT_SPI_BUS_MISO (&pin_P0_22) -#define DEFAULT_UART_BUS_RX NRF_GPIO_PIN_MAP(1, 0) -#define DEFAULT_UART_BUS_TX NRF_GPIO_PIN_MAP(0, 24) +#define DEFAULT_UART_BUS_RX (&pin_P1_0) +#define DEFAULT_UART_BUS_TX (&pin_P0_24) diff --git a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.mk b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.mk index 5c4fde4838..caf580ec4d 100644 --- a/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.mk +++ b/ports/nrf/boards/feather_nrf52840_express/mpconfigboard.mk @@ -1,6 +1,7 @@ MCU_SERIES = m4 MCU_VARIANT = nrf52 MCU_SUB_VARIANT = nrf52840 +MCU_CHIP = nrf52840 SD ?= s140 SOFTDEV_VERSION ?= 6.1.0 @@ -12,4 +13,4 @@ else LD_FILE = boards/adafruit_$(MCU_SUB_VARIANT)_$(SD_LOWER)_v$(firstword $(subst ., ,$(SOFTDEV_VERSION))).ld endif -NRF_DEFINES += -DNRF52840_XXAA +NRF_DEFINES += -DNRF52840_XXAA -DNRF52840 diff --git a/ports/nrf/boards/feather_nrf52840_express/pins.c b/ports/nrf/boards/feather_nrf52840_express/pins.c new file mode 100644 index 0000000000..0f5eab31d0 --- /dev/null +++ b/ports/nrf/boards/feather_nrf52840_express/pins.c @@ -0,0 +1,41 @@ +#include "shared-bindings/board/__init__.h" + +#include "board_busses.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_AREF), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_VDIV), MP_ROM_PTR(&pin_P0_05) }, + + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P0_07) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_P0_13) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P0_22) }, + + { MP_ROM_QSTR(MP_QSTR_TXD), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_RXD), MP_ROM_PTR(&pin_P1_00) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P1_12) }, + + { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_P1_10) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/feather_nrf52840_express/pins.csv b/ports/nrf/boards/feather_nrf52840_express/pins.csv deleted file mode 100644 index 284370d060..0000000000 --- a/ports/nrf/boards/feather_nrf52840_express/pins.csv +++ /dev/null @@ -1,48 +0,0 @@ -P0_00,P0_00 -P0_01,P0_01 -P0_02,P0_02 -P0_03,P0_03 -P0_04,P0_04 -P0_05,P0_05 -P0_06,P0_06 -P0_07,P0_07 -P0_08,P0_08 -P0_09,P0_09 -P0_10,P0_10 -P0_11,P0_11 -P0_12,P0_12 -P0_13,P0_13 -P0_14,P0_14 -P0_15,P0_15 -P0_16,P0_16 -P0_17,P0_17 -P0_18,P0_18 -P0_19,P0_19 -P0_20,P0_20 -P0_21,P0_21 -P0_22,P0_22 -P0_23,P0_23 -P0_24,P0_24 -P0_25,P0_25 -P0_26,P0_26 -P0_27,P0_27 -P0_28,P0_28 -P0_29,P0_29 -P0_30,P0_30 -P0_31,P0_31 -P1_00,P1_00 -P1_01,P1_01 -P1_02,P1_02 -P1_03,P1_03 -P1_04,P1_04 -P1_05,P1_05 -P1_06,P1_06 -P1_07,P1_07 -P1_08,P1_08 -P1_09,P1_09 -P1_10,P1_10 -P1_11,P1_11 -P1_12,P1_12 -P1_13,P1_13 -P1_14,P1_14 -P1_15,P1_15 diff --git a/ports/nrf/boards/pca10040/mpconfigboard.h b/ports/nrf/boards/pca10040/mpconfigboard.h index 8fa001dfa1..40035e2cac 100644 --- a/ports/nrf/boards/pca10040/mpconfigboard.h +++ b/ports/nrf/boards/pca10040/mpconfigboard.h @@ -28,8 +28,8 @@ #define MICROPY_HW_MCU_NAME "nRF52832" #define MICROPY_PY_SYS_PLATFORM "nRF52-DK" -#define MICROPY_HW_UART_RX NRF_GPIO_PIN_MAP(0, 8) -#define MICROPY_HW_UART_TX NRF_GPIO_PIN_MAP(0, 6) +#define MICROPY_HW_UART_RX NRF_GPIO_PIN_MAP(0, 11) +#define MICROPY_HW_UART_TX NRF_GPIO_PIN_MAP(0, 12) #define MICROPY_HW_UART_HWFC (0) #define PORT_HEAP_SIZE (32 * 1024) diff --git a/ports/nrf/boards/pca10040/mpconfigboard.mk b/ports/nrf/boards/pca10040/mpconfigboard.mk index 79aa853494..ad11b4f7c7 100644 --- a/ports/nrf/boards/pca10040/mpconfigboard.mk +++ b/ports/nrf/boards/pca10040/mpconfigboard.mk @@ -1,6 +1,8 @@ MCU_SERIES = m4 MCU_VARIANT = nrf52 +# Historical: nrf52 means nrf52832 MCU_SUB_VARIANT = nrf52 +MCU_CHIP = nrf52832 SD ?= s132 SOFTDEV_VERSION ?= 5.0.0 @@ -10,4 +12,4 @@ else LD_FILE = boards/nrf52832_512k_64k_s132_$(SOFTDEV_VERSION).ld endif -NRF_DEFINES += -DNRF52832_XXAA +NRF_DEFINES += -DNRF52832_XXAA -DNRF52832 diff --git a/ports/nrf/boards/pca10040/pins.c b/ports/nrf/boards/pca10040/pins.c new file mode 100644 index 0000000000..9671358c9a --- /dev/null +++ b/ports/nrf/boards/pca10040/pins.c @@ -0,0 +1,40 @@ +#include "shared-bindings/board/__init__.h" + +#include "board_busses.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/pca10040/pins.csv b/ports/nrf/boards/pca10040/pins.csv deleted file mode 100644 index 2202224461..0000000000 --- a/ports/nrf/boards/pca10040/pins.csv +++ /dev/null @@ -1,31 +0,0 @@ -P0_01,P0_01 -P0_02,P0_02 -P0_03,P0_03 -P0_04,P0_04 -P0_05,P0_05 -P0_06,P0_06 -P0_07,P0_07 -P0_08,P0_08 -P0_09,P0_09 -P0_10,P0_10 -P0_11,P0_11 -P0_12,P0_12 -P0_13,P0_13 -P0_14,P0_14 -P0_15,P0_15 -P0_16,P0_16 -P0_17,P0_17 -P0_18,P0_18 -P0_19,P0_19 -P0_20,P0_20 -P0_21,P0_21 -P0_22,P0_22 -P0_23,P0_23 -P0_24,P0_24 -P0_25,P0_25 -P0_26,P0_26 -P0_27,P0_27 -P0_28,P0_28 -P0_29,P0_29 -P0_30,P0_30 -P0_31,P0_31 diff --git a/ports/nrf/boards/pca10056/mpconfigboard.h b/ports/nrf/boards/pca10056/mpconfigboard.h index 8195e19479..dbd4226631 100644 --- a/ports/nrf/boards/pca10056/mpconfigboard.h +++ b/ports/nrf/boards/pca10056/mpconfigboard.h @@ -28,6 +28,7 @@ #define MICROPY_HW_MCU_NAME "nRF52840" #define MICROPY_PY_SYS_PLATFORM "nRF52840-DK" +// See legend on bottom of board #define MICROPY_HW_UART_RX NRF_GPIO_PIN_MAP(0, 8) #define MICROPY_HW_UART_TX NRF_GPIO_PIN_MAP(0, 6) #define MICROPY_HW_UART_HWFC (0) @@ -37,4 +38,3 @@ // Temp (could be removed) 0: usb cdc (default), 1 : hwuart (jlink) #define CFG_HWUART_FOR_SERIAL 0 - diff --git a/ports/nrf/boards/pca10056/mpconfigboard.mk b/ports/nrf/boards/pca10056/mpconfigboard.mk index 5c4fde4838..caf580ec4d 100644 --- a/ports/nrf/boards/pca10056/mpconfigboard.mk +++ b/ports/nrf/boards/pca10056/mpconfigboard.mk @@ -1,6 +1,7 @@ MCU_SERIES = m4 MCU_VARIANT = nrf52 MCU_SUB_VARIANT = nrf52840 +MCU_CHIP = nrf52840 SD ?= s140 SOFTDEV_VERSION ?= 6.1.0 @@ -12,4 +13,4 @@ else LD_FILE = boards/adafruit_$(MCU_SUB_VARIANT)_$(SD_LOWER)_v$(firstword $(subst ., ,$(SOFTDEV_VERSION))).ld endif -NRF_DEFINES += -DNRF52840_XXAA +NRF_DEFINES += -DNRF52840_XXAA -DNRF52840 diff --git a/ports/nrf/boards/pca10056/pins.c b/ports/nrf/boards/pca10056/pins.c new file mode 100644 index 0000000000..1c208f89b5 --- /dev/null +++ b/ports/nrf/boards/pca10056/pins.c @@ -0,0 +1,129 @@ +#include "shared-bindings/board/__init__.h" + +#include "board_busses.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_P0_03) }, + + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_P0_04) }, + + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON1), MP_ROM_PTR(&pin_P0_11) }, + + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON2), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_13) }, + + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_LED2), MP_ROM_PTR(&pin_P0_14) }, + + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_LED3), MP_ROM_PTR(&pin_P0_15) }, + + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_LED4), MP_ROM_PTR(&pin_P0_16) }, + + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + + // RESET { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, + + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON3), MP_ROM_PTR(&pin_P0_24) }, + + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_BUTTON4), MP_ROM_PTR(&pin_P0_25) }, + + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_P0_26) }, + + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_P0_27) }, + + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_P0_28) }, + + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_P0_29) }, + + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_P0_30) }, + + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_P1_01) }, + + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_P1_02) }, + + { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_P1_03) }, + + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_P1_04) }, + + { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_P1_05) }, + + { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_P1_06) }, + + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_P1_07) }, + + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_P1_08) }, + + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_P1_10) }, + + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_P1_11) }, + + { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_P1_12) }, + + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_P1_13) }, + + { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_P1_14) }, + + // Note that there is no LED on D13. + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_P1_15) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_P1_15) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/boards/pca10056/pins.csv b/ports/nrf/boards/pca10056/pins.csv deleted file mode 100644 index 284370d060..0000000000 --- a/ports/nrf/boards/pca10056/pins.csv +++ /dev/null @@ -1,48 +0,0 @@ -P0_00,P0_00 -P0_01,P0_01 -P0_02,P0_02 -P0_03,P0_03 -P0_04,P0_04 -P0_05,P0_05 -P0_06,P0_06 -P0_07,P0_07 -P0_08,P0_08 -P0_09,P0_09 -P0_10,P0_10 -P0_11,P0_11 -P0_12,P0_12 -P0_13,P0_13 -P0_14,P0_14 -P0_15,P0_15 -P0_16,P0_16 -P0_17,P0_17 -P0_18,P0_18 -P0_19,P0_19 -P0_20,P0_20 -P0_21,P0_21 -P0_22,P0_22 -P0_23,P0_23 -P0_24,P0_24 -P0_25,P0_25 -P0_26,P0_26 -P0_27,P0_27 -P0_28,P0_28 -P0_29,P0_29 -P0_30,P0_30 -P0_31,P0_31 -P1_00,P1_00 -P1_01,P1_01 -P1_02,P1_02 -P1_03,P1_03 -P1_04,P1_04 -P1_05,P1_05 -P1_06,P1_06 -P1_07,P1_07 -P1_08,P1_08 -P1_09,P1_09 -P1_10,P1_10 -P1_11,P1_11 -P1_12,P1_12 -P1_13,P1_13 -P1_14,P1_14 -P1_15,P1_15 diff --git a/ports/nrf/nrf_pin.h b/ports/nrf/boards/pca10059/board.c similarity index 71% rename from ports/nrf/nrf_pin.h rename to ports/nrf/boards/pca10059/board.c index 7a0ebea78d..0b667aa9d9 100644 --- a/ports/nrf/nrf_pin.h +++ b/ports/nrf/boards/pca10059/board.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2017 Scott Shawcroft for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -24,20 +24,30 @@ * THE SOFTWARE. */ -#ifndef __MICROPY_INCLUDED_NRF5_PIN_H__ -#define __MICROPY_INCLUDED_NRF5_PIN_H__ +#include +#include +#include "boards/board.h" +#include "nrfx.h" +#include "usb.h" + +void board_init(void) { + + // Clock + NRF_CLOCK->LFCLKSRC = (uint32_t)((CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos) & CLOCK_LFCLKSRC_SRC_Msk); + NRF_CLOCK->TASKS_LFCLKSTART = 1UL; + + usb_init(); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + +} -#include "py/obj.h" -typedef struct { - mp_obj_base_t base; - qstr name; - uint32_t port : 1; - uint32_t pin : 5; // Some ARM processors use 32 bits/PORT - uint32_t adc_channel : 4; // 0 is no ADC, ADC channel from 1 to 8 -} pin_obj_t; -extern const mp_obj_type_t mcu_pin_type; -#endif // __MICROPY_INCLUDED_NRF5_PIN_H__ diff --git a/ports/nrf/boards/pca10059/bootloader/6.0.0/pca10056_bootloader_6.0.0_s140.zip b/ports/nrf/boards/pca10059/bootloader/6.0.0/pca10056_bootloader_6.0.0_s140.zip new file mode 100644 index 0000000000..691f4a1ab3 Binary files /dev/null and b/ports/nrf/boards/pca10059/bootloader/6.0.0/pca10056_bootloader_6.0.0_s140.zip differ diff --git a/ports/nrf/boards/pca10059/examples/buttons.py b/ports/nrf/boards/pca10059/examples/buttons.py new file mode 100644 index 0000000000..1a0c5aabbc --- /dev/null +++ b/ports/nrf/boards/pca10059/examples/buttons.py @@ -0,0 +1,26 @@ +import board +import digitalio +import gamepad +import time + +pad = gamepad.GamePad( + digitalio.DigitalInOut(board.P0_11), + digitalio.DigitalInOut(board.P0_12), + digitalio.DigitalInOut(board.P0_24), + digitalio.DigitalInOut(board.P0_25), +) + +prev_buttons = 0 + +while True: + buttons = pad.get_pressed() + + if buttons != prev_buttons: + for i in range(0, 4): + bit = (1 << i) + if (buttons & bit) != (prev_buttons & bit): + print('Button %d %s' % (i + 1, 'pressed' if buttons & bit else 'released')) + + prev_buttons = buttons + + time.sleep(0.1) diff --git a/ports/nrf/boards/pca10059/mpconfigboard.h b/ports/nrf/boards/pca10059/mpconfigboard.h new file mode 100644 index 0000000000..bca61fd0f9 --- /dev/null +++ b/ports/nrf/boards/pca10059/mpconfigboard.h @@ -0,0 +1,32 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Glenn Ruben Bakke + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#define MICROPY_HW_BOARD_NAME "PCA10059" +#define MICROPY_HW_MCU_NAME "nRF52840" +#define MICROPY_PY_SYS_PLATFORM "nRF52840-DK" + +#define PORT_HEAP_SIZE (128 * 1024) +#define CIRCUITPY_AUTORELOAD_DELAY_MS 500 diff --git a/ports/nrf/boards/pca10059/mpconfigboard.mk b/ports/nrf/boards/pca10059/mpconfigboard.mk new file mode 100644 index 0000000000..f399927fd2 --- /dev/null +++ b/ports/nrf/boards/pca10059/mpconfigboard.mk @@ -0,0 +1,17 @@ +MCU_SERIES = m4 +MCU_VARIANT = nrf52 +MCU_SUB_VARIANT = nrf52840 +MCU_CHIP = nrf52840 +SD ?= s140 +SOFTDEV_VERSION ?= 6.1.0 + +BOOT_SETTING_ADDR = 0xFF000 +BOOT_FILE = boards/$(BOARD)/bootloader/$(SOFTDEV_VERSION)/$(BOARD)_bootloader_$(SOFTDEV_VERSION)_s140 + +ifeq ($(SD),) + LD_FILE = boards/nrf52840_1M_256k.ld +else + LD_FILE = boards/adafruit_$(MCU_SUB_VARIANT)_$(SD_LOWER)_v$(firstword $(subst ., ,$(SOFTDEV_VERSION))).ld +endif + +NRF_DEFINES += -DNRF52840_XXAA -DNRF52840 diff --git a/ports/nrf/boards/pca10059/pins.c b/ports/nrf/boards/pca10059/pins.c new file mode 100644 index 0000000000..a1916bd046 --- /dev/null +++ b/ports/nrf/boards/pca10059/pins.c @@ -0,0 +1,42 @@ +#include "shared-bindings/board/__init__.h" + +#include "board_busses.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, + + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, + + { MP_ROM_QSTR(MP_QSTR_LED1), MP_ROM_PTR(&pin_P0_06) }, + + { MP_ROM_QSTR(MP_QSTR_LED2_R), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_LED2_G), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_LED2_B), MP_ROM_PTR(&pin_P0_12) }, + + { MP_ROM_QSTR(MP_QSTR_SW1), MP_ROM_PTR(&pin_P1_06) }, +}; + +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/nrf/common-hal/analogio/AnalogIn.c b/ports/nrf/common-hal/analogio/AnalogIn.c index 7951910846..1ebd5ea1aa 100644 --- a/ports/nrf/common-hal/analogio/AnalogIn.c +++ b/ports/nrf/common-hal/analogio/AnalogIn.c @@ -38,7 +38,7 @@ void common_hal_analogio_analogin_construct(analogio_analogin_obj_t *self, const if (pin->adc_channel == 0) mp_raise_ValueError(translate("Pin does not have ADC capabilities")); - nrf_gpio_cfg_default(NRF_GPIO_PIN_MAP(pin->port, pin->pin)); + nrf_gpio_cfg_default(pin->number); self->pin = pin; } @@ -51,7 +51,7 @@ void common_hal_analogio_analogin_deinit(analogio_analogin_obj_t *self) { if (common_hal_analogio_analogin_deinited(self)) return; - nrf_gpio_cfg_default(NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin)); + nrf_gpio_cfg_default(self->pin->number); self->pin = mp_const_none; } diff --git a/ports/nrf/common-hal/busio/I2C.c b/ports/nrf/common-hal/busio/I2C.c index 7a29da153e..9390b1fd85 100644 --- a/ports/nrf/common-hal/busio/I2C.c +++ b/ports/nrf/common-hal/busio/I2C.c @@ -54,15 +54,15 @@ static uint8_t twi_error_to_mp(const nrfx_err_t err) { } void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) { - if (scl->pin == sda->pin) + if (scl->number == sda->number) mp_raise_ValueError(translate("Invalid pins")); const nrfx_twim_t instance = NRFX_TWIM_INSTANCE(INST_NO); self->twim = instance; nrfx_twim_config_t config = NRFX_TWIM_DEFAULT_CONFIG; - config.scl = NRF_GPIO_PIN_MAP(scl->port, scl->pin); - config.sda = NRF_GPIO_PIN_MAP(sda->port, sda->pin); + config.scl = scl->number; + config.sda = sda->number; // change freq. only if it's less than the default 400K if (frequency < 100000) { diff --git a/ports/nrf/common-hal/busio/SPI.c b/ports/nrf/common-hal/busio/SPI.c index 10974c4c5b..d4cf1b7ae9 100644 --- a/ports/nrf/common-hal/busio/SPI.c +++ b/ports/nrf/common-hal/busio/SPI.c @@ -77,13 +77,13 @@ void common_hal_busio_spi_construct(busio_spi_obj_t *self, const mcu_pin_obj_t * nrfx_spim_config_t config = NRFX_SPIM_DEFAULT_CONFIG; config.frequency = NRF_SPIM_FREQ_8M; - config.sck_pin = NRF_GPIO_PIN_MAP(clock->port, clock->pin); + config.sck_pin = clock->number; if (mosi != (mcu_pin_obj_t*)&mp_const_none_obj) - config.mosi_pin = NRF_GPIO_PIN_MAP(mosi->port, mosi->pin); + config.mosi_pin = mosi->number; if (miso != (mcu_pin_obj_t*)&mp_const_none_obj) - config.miso_pin = NRF_GPIO_PIN_MAP(miso->port, miso->pin); + config.miso_pin = miso->number; nrfx_err_t err = nrfx_spim_init(&self->spim, &config, NULL, NULL); diff --git a/ports/nrf/common-hal/busio/UART.c b/ports/nrf/common-hal/busio/UART.c index 765c987b5d..f05949e152 100644 --- a/ports/nrf/common-hal/busio/UART.c +++ b/ports/nrf/common-hal/busio/UART.c @@ -36,8 +36,6 @@ #include "tick.h" -#include "pins.h" - void common_hal_busio_uart_construct(busio_uart_obj_t *self, const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, uint32_t timeout, diff --git a/ports/nrf/common-hal/digitalio/DigitalInOut.c b/ports/nrf/common-hal/digitalio/DigitalInOut.c index 4db9e5efa6..c8ec12c032 100644 --- a/ports/nrf/common-hal/digitalio/DigitalInOut.c +++ b/ports/nrf/common-hal/digitalio/DigitalInOut.c @@ -34,7 +34,7 @@ digitalinout_result_t common_hal_digitalio_digitalinout_construct( digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) { self->pin = pin; - nrf_gpio_cfg_input(NRF_GPIO_PIN_MAP(pin->port, pin->pin), NRF_GPIO_PIN_NOPULL); + nrf_gpio_cfg_input(pin->number, NRF_GPIO_PIN_NOPULL); return DIGITALINOUT_OK; } @@ -47,66 +47,53 @@ void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self if (common_hal_digitalio_digitalinout_deinited(self)) { return; } - - const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin); - nrf_gpio_cfg_default(pin); + nrf_gpio_cfg_default(self->pin->number); self->pin = mp_const_none; } void common_hal_digitalio_digitalinout_switch_to_input( digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { - const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin); - - nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_NOPULL); - + nrf_gpio_cfg_input(self->pin->number, NRF_GPIO_PIN_NOPULL); common_hal_digitalio_digitalinout_set_pull(self, pull); } void common_hal_digitalio_digitalinout_switch_to_output( digitalio_digitalinout_obj_t *self, bool value, digitalio_drive_mode_t drive_mode) { - const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin); - self->open_drain = (drive_mode == DRIVE_MODE_OPEN_DRAIN); - nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_NOPULL); + nrf_gpio_cfg_input(self->pin->number, NRF_GPIO_PIN_NOPULL); common_hal_digitalio_digitalinout_set_value(self, value); } digitalio_direction_t common_hal_digitalio_digitalinout_get_direction( digitalio_digitalinout_obj_t *self) { - const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin); - - return (nrf_gpio_pin_dir_get(pin) == NRF_GPIO_PIN_DIR_OUTPUT) ? DIRECTION_OUTPUT : DIRECTION_INPUT; + return (nrf_gpio_pin_dir_get(self->pin->number) == NRF_GPIO_PIN_DIR_OUTPUT) + ? DIRECTION_OUTPUT : DIRECTION_INPUT; } void common_hal_digitalio_digitalinout_set_value( digitalio_digitalinout_obj_t *self, bool value) { - const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin); - if (value && self->open_drain) { - nrf_gpio_pin_dir_set(pin, NRF_GPIO_PIN_DIR_INPUT); + nrf_gpio_pin_dir_set(self->pin->number, NRF_GPIO_PIN_DIR_INPUT); } else { - nrf_gpio_pin_dir_set(pin, NRF_GPIO_PIN_DIR_OUTPUT); - nrf_gpio_pin_write(pin, value); + nrf_gpio_pin_dir_set(self->pin->number, NRF_GPIO_PIN_DIR_OUTPUT); + nrf_gpio_pin_write(self->pin->number, value); } } bool common_hal_digitalio_digitalinout_get_value( digitalio_digitalinout_obj_t *self) { - const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin); - const nrf_gpio_pin_dir_t dir = nrf_gpio_pin_dir_get(pin); - - if (dir == NRF_GPIO_PIN_DIR_INPUT) { + if (nrf_gpio_pin_dir_get(self->pin->number) == NRF_GPIO_PIN_DIR_INPUT) { if (self->open_drain) return true; - return nrf_gpio_pin_read(pin); + return nrf_gpio_pin_read(self->pin->number); } - return nrf_gpio_pin_out_read(pin); + return nrf_gpio_pin_out_read(self->pin->number); } void common_hal_digitalio_digitalinout_set_drive_mode( @@ -131,7 +118,6 @@ digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode( void common_hal_digitalio_digitalinout_set_pull( digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) { - const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin); nrf_gpio_pin_pull_t hal_pull = NRF_GPIO_PIN_NOPULL; switch (pull) { @@ -146,12 +132,13 @@ void common_hal_digitalio_digitalinout_set_pull( break; } - nrf_gpio_cfg_input(pin, hal_pull); + nrf_gpio_cfg_input(self->pin->number, hal_pull); } digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( digitalio_digitalinout_obj_t *self) { - uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin); + uint32_t pin = self->pin->number; + // Changes pin to be a relative pin number in port. NRF_GPIO_Type *reg = nrf_gpio_pin_port_decode(&pin); if (nrf_gpio_pin_dir_get(pin) == NRF_GPIO_PIN_DIR_OUTPUT) { @@ -159,7 +146,7 @@ digitalio_pull_t common_hal_digitalio_digitalinout_get_pull( return PULL_NONE; } - switch (reg->PIN_CNF[self->pin->pin] & GPIO_PIN_CNF_PULL_Msk) { + switch (reg->PIN_CNF[pin] & GPIO_PIN_CNF_PULL_Msk) { case NRF_GPIO_PIN_PULLUP: return PULL_UP; diff --git a/ports/nrf/common-hal/microcontroller/Pin.c b/ports/nrf/common-hal/microcontroller/Pin.c index 1b7ac0d838..4d2dea31e1 100644 --- a/ports/nrf/common-hal/microcontroller/Pin.c +++ b/ports/nrf/common-hal/microcontroller/Pin.c @@ -24,11 +24,32 @@ * THE SOFTWARE. */ -#include "common-hal/microcontroller/Pin.h" +#include "shared-bindings/microcontroller/Pin.h" + #include "nrf_gpio.h" #include "py/mphal.h" +#include "nrf/pins.h" +#include "supervisor/shared/rgb_led_status.h" + +#ifdef MICROPY_HW_NEOPIXEL +bool neopixel_in_use; +#endif +#ifdef MICROPY_HW_APA102_MOSI +bool apa102_sck_in_use; +bool apa102_mosi_in_use; +#endif +#ifdef SPEAKER_ENABLE_PIN +bool speaker_enable_in_use; +#endif + +// Bit mask of claimed pins on each of up to two ports. nrf52832 has one port; nrf52840 has two. +STATIC bool claimed_pins[2]; + void reset_all_pins(void) { + claimed_pins[0] = 0; + claimed_pins[1] = 0; + for (uint32_t pin = 0; pin < NUMBER_OF_PINS; ++pin) { nrf_gpio_cfg_default(pin); } @@ -48,7 +69,49 @@ void reset_all_pins(void) { #endif } +// Mark pin as free and return it to a quiescent state. +void reset_pin(uint8_t pin) { + // Ignore out-of-bound pin numbers. NUMBER_OF_PINS is from nrf_gpio.h. + if (pin >= NUMBER_OF_PINS) { + return; + } + + // Clear claimed bit. + claimed_pins[nrf_pin_port(pin)] &= ~(1 << nrf_relative_pin_number(pin)); + + #ifdef MICROPY_HW_NEOPIXEL + if (pin == MICROPY_HW_NEOPIXEL->number) { + neopixel_in_use = false; + rgb_led_status_init(); + return; + } + #endif + #ifdef MICROPY_HW_APA102_MOSI + if (pin == MICROPY_HW_APA102_MOSI->number || + pin == MICROPY_HW_APA102_SCK->number) { + apa102_mosi_in_use = apa102_mosi_in_use && pin != MICROPY_HW_APA102_MOSI->number; + apa102_sck_in_use = apa102_sck_in_use && pin != MICROPY_HW_APA102_SCK->number; + if (!apa102_sck_in_use && !apa102_mosi_in_use) { + rgb_led_status_init(); + } + return; + } + #endif + + #ifdef SPEAKER_ENABLE_PIN + if (pin == SPEAKER_ENABLE_PIN->number) { + speaker_enable_in_use = false; + common_hal_digitalio_digitalinout_switch_to_output( + nrf_gpio_pin_dir_set(pin, NRF_GPIO_PIN_DIR_OUTPUT); + nrf_gpio_pin_write(pin, false); + } + #endif +} + void claim_pin(const mcu_pin_obj_t* pin) { + // Set bit in claimed_pins bitmask. + claimed_pins[nrf_pin_port(pin->number)] |= 1 << nrf_relative_pin_number(pin->number); + #ifdef MICROPY_HW_NEOPIXEL if (pin == MICROPY_HW_NEOPIXEL) { neopixel_in_use = true; @@ -91,6 +154,5 @@ bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) { } #endif - // TODO check pin enable. - return true; + return !(claimed_pins[nrf_pin_port(pin->number)] & (nrf_relative_pin_number(pin->number))); } diff --git a/ports/nrf/common-hal/microcontroller/Pin.h b/ports/nrf/common-hal/microcontroller/Pin.h index 954d6e51df..1e751c714e 100644 --- a/ports/nrf/common-hal/microcontroller/Pin.h +++ b/ports/nrf/common-hal/microcontroller/Pin.h @@ -27,9 +27,10 @@ #ifndef MICROPY_INCLUDED_NRF_COMMON_HAL_MICROCONTROLLER_PIN_H #define MICROPY_INCLUDED_NRF_COMMON_HAL_MICROCONTROLLER_PIN_H -#include "nrf_pin.h" #include "py/mphal.h" +#include "peripherals/nrf/pins.h" + #ifdef MICROPY_HW_NEOPIXEL extern bool neopixel_in_use; #endif @@ -38,11 +39,21 @@ extern bool apa102_sck_in_use; extern bool apa102_mosi_in_use; #endif -#define mcu_pin_obj_t pin_obj_t void reset_all_pins(void); // reset_pin takes the pin number instead of the pointer so that objects don't // need to store a full pointer. void reset_pin(uint8_t pin); void claim_pin(const mcu_pin_obj_t* pin); +// Lower 5 bits of a pin number are the pin number in a port. +// upper bits (just one bit for current chips) is port number. + +static inline uint8_t nrf_pin_port(uint8_t absolute_pin) { + return absolute_pin >> 5; +} + +static inline uint8_t nrf_relative_pin_number(uint8_t absolute_pin) { + return absolute_pin & 0x1f; +} + #endif // MICROPY_INCLUDED_NRF_COMMON_HAL_MICROCONTROLLER_PIN_H diff --git a/ports/nrf/common-hal/microcontroller/__init__.c b/ports/nrf/common-hal/microcontroller/__init__.c index e88c741365..46fe1e1907 100644 --- a/ports/nrf/common-hal/microcontroller/__init__.c +++ b/ports/nrf/common-hal/microcontroller/__init__.c @@ -62,3 +62,59 @@ const mcu_processor_obj_t common_hal_mcu_processor_obj = { .type = &mcu_processor_type, }, }; + + +STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = { + { MP_ROM_QSTR(MP_QSTR_P0_00), MP_ROM_PTR(&pin_P0_00) }, + { MP_ROM_QSTR(MP_QSTR_P0_01), MP_ROM_PTR(&pin_P0_01) }, + { MP_ROM_QSTR(MP_QSTR_P0_02), MP_ROM_PTR(&pin_P0_02) }, + { MP_ROM_QSTR(MP_QSTR_P0_03), MP_ROM_PTR(&pin_P0_03) }, + { MP_ROM_QSTR(MP_QSTR_P0_04), MP_ROM_PTR(&pin_P0_04) }, + { MP_ROM_QSTR(MP_QSTR_P0_05), MP_ROM_PTR(&pin_P0_05) }, + { MP_ROM_QSTR(MP_QSTR_P0_06), MP_ROM_PTR(&pin_P0_06) }, + { MP_ROM_QSTR(MP_QSTR_P0_07), MP_ROM_PTR(&pin_P0_07) }, + { MP_ROM_QSTR(MP_QSTR_P0_08), MP_ROM_PTR(&pin_P0_08) }, + { MP_ROM_QSTR(MP_QSTR_P0_09), MP_ROM_PTR(&pin_P0_09) }, + { MP_ROM_QSTR(MP_QSTR_P0_10), MP_ROM_PTR(&pin_P0_10) }, + { MP_ROM_QSTR(MP_QSTR_P0_11), MP_ROM_PTR(&pin_P0_11) }, + { MP_ROM_QSTR(MP_QSTR_P0_12), MP_ROM_PTR(&pin_P0_12) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_13), MP_ROM_PTR(&pin_P0_13) }, + { MP_ROM_QSTR(MP_QSTR_P0_14), MP_ROM_PTR(&pin_P0_14) }, + { MP_ROM_QSTR(MP_QSTR_P0_15), MP_ROM_PTR(&pin_P0_15) }, + { MP_ROM_QSTR(MP_QSTR_P0_16), MP_ROM_PTR(&pin_P0_16) }, + { MP_ROM_QSTR(MP_QSTR_P0_17), MP_ROM_PTR(&pin_P0_17) }, + { MP_ROM_QSTR(MP_QSTR_P0_18), MP_ROM_PTR(&pin_P0_18) }, + { MP_ROM_QSTR(MP_QSTR_P0_19), MP_ROM_PTR(&pin_P0_19) }, + { MP_ROM_QSTR(MP_QSTR_P0_20), MP_ROM_PTR(&pin_P0_20) }, + { MP_ROM_QSTR(MP_QSTR_P0_21), MP_ROM_PTR(&pin_P0_21) }, + { MP_ROM_QSTR(MP_QSTR_P0_22), MP_ROM_PTR(&pin_P0_22) }, + { MP_ROM_QSTR(MP_QSTR_P0_23), MP_ROM_PTR(&pin_P0_23) }, + { MP_ROM_QSTR(MP_QSTR_P0_24), MP_ROM_PTR(&pin_P0_24) }, + { MP_ROM_QSTR(MP_QSTR_P0_25), MP_ROM_PTR(&pin_P0_25) }, + { MP_ROM_QSTR(MP_QSTR_P0_26), MP_ROM_PTR(&pin_P0_26) }, + { MP_ROM_QSTR(MP_QSTR_P0_27), MP_ROM_PTR(&pin_P0_27) }, + { MP_ROM_QSTR(MP_QSTR_P0_28), MP_ROM_PTR(&pin_P0_28) }, + { MP_ROM_QSTR(MP_QSTR_P0_29), MP_ROM_PTR(&pin_P0_29) }, + { MP_ROM_QSTR(MP_QSTR_P0_30), MP_ROM_PTR(&pin_P0_30) }, + { MP_ROM_QSTR(MP_QSTR_P0_31), MP_ROM_PTR(&pin_P0_31) }, +#ifdef NRF52840 + { MP_ROM_QSTR(MP_QSTR_P1_00), MP_ROM_PTR(&pin_P1_00) }, + { MP_ROM_QSTR(MP_QSTR_P1_01), MP_ROM_PTR(&pin_P1_01) }, + { MP_ROM_QSTR(MP_QSTR_P1_02), MP_ROM_PTR(&pin_P1_02) }, + { MP_ROM_QSTR(MP_QSTR_P1_03), MP_ROM_PTR(&pin_P1_03) }, + { MP_ROM_QSTR(MP_QSTR_P1_04), MP_ROM_PTR(&pin_P1_04) }, + { MP_ROM_QSTR(MP_QSTR_P1_05), MP_ROM_PTR(&pin_P1_05) }, + { MP_ROM_QSTR(MP_QSTR_P1_06), MP_ROM_PTR(&pin_P1_06) }, + { MP_ROM_QSTR(MP_QSTR_P1_07), MP_ROM_PTR(&pin_P1_07) }, + { MP_ROM_QSTR(MP_QSTR_P1_08), MP_ROM_PTR(&pin_P1_08) }, + { MP_ROM_QSTR(MP_QSTR_P1_09), MP_ROM_PTR(&pin_P1_09) }, + { MP_ROM_QSTR(MP_QSTR_P1_10), MP_ROM_PTR(&pin_P1_10) }, + { MP_ROM_QSTR(MP_QSTR_P1_11), MP_ROM_PTR(&pin_P1_11) }, + { MP_ROM_QSTR(MP_QSTR_P1_12), MP_ROM_PTR(&pin_P1_12) }, + { MP_ROM_QSTR(MP_QSTR_P1_13), MP_ROM_PTR(&pin_P1_13) }, + { MP_ROM_QSTR(MP_QSTR_P1_14), MP_ROM_PTR(&pin_P1_14) }, + { MP_ROM_QSTR(MP_QSTR_P1_15), MP_ROM_PTR(&pin_P1_15) }, +#endif +}; +MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_globals_table); diff --git a/ports/nrf/common-hal/neopixel_write/__init__.c b/ports/nrf/common-hal/neopixel_write/__init__.c new file mode 100644 index 0000000000..a29e1a1369 --- /dev/null +++ b/ports/nrf/common-hal/neopixel_write/__init__.c @@ -0,0 +1,161 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2016 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#include "py/mphal.h" + +#include "shared-bindings/neopixel_write/__init__.h" + +#include "tick.h" + +// This magical macro makes sure the delay isn't optimized out and is the +// minimal three instructions. +#define delay_cycles(cycles) \ +{ \ + uint32_t t; \ + asm volatile ( \ + "movs %[t], %[c]\n\t" \ + "loop%=:\n\t" \ + "subs %[t], #1\n\t" \ + "bne.n loop%=" : [t] "=r"(t) : [c] "I" (cycles)); \ + } + +uint64_t next_start_tick_ms = 0; +uint32_t next_start_tick_us = 1000; + +void common_hal_neopixel_write(const digitalio_digitalinout_obj_t* digitalinout, uint8_t *pixels, uint32_t numBytes) { +// TODO: Figure out timing delays on nRF. Turn off cache using ICACHECNF register. +/* + // This is adapted directly from the Adafruit NeoPixel library SAMD21G18A code: + // https://github.com/adafruit/Adafruit_NeoPixel/blob/master/Adafruit_NeoPixel.cpp + uint8_t *ptr, *end, p, bitMask; + uint32_t pinMask; + PortGroup* port; + + // This must be called while interrupts are on in case we're waiting for a + // future ms tick. + wait_until(next_start_tick_ms, next_start_tick_us); + + // Turn off interrupts of any kind during timing-sensitive code. + mp_hal_disable_all_interrupts(); + + + // Make sure the NVM cache is consistently timed. + + NVMCTRL->CTRLB.bit.READMODE = NVMCTRL_CTRLB_READMODE_DETERMINISTIC_Val; + #endif + + uint32_t pin = digitalinout->pin->number; + port = &PORT->Group[GPIO_PORT(pin)]; // Convert GPIO # to port register + pinMask = (1UL << (pin % 32)); // From port_pin_set_output_level ASF code. + ptr = pixels; + end = ptr + numBytes; + p = *ptr++; + bitMask = 0x80; + + volatile uint32_t *set = &(port->OUTSET.reg), + *clr = &(port->OUTCLR.reg); + + for(;;) { + *set = pinMask; + // This is the time where the line is always high regardless of the bit. + // For the SK6812 its 0.3us +- 0.15us + #ifdef SAMD21 + asm("nop; nop;"); + #endif + #ifdef SAMD51 + delay_cycles(3); + #endif + if(p & bitMask) { + // This is the high delay unique to a one bit. + // For the SK6812 its 0.3us + #ifdef SAMD21 + asm("nop; nop; nop; nop; nop; nop; nop;"); + #endif + #ifdef SAMD51 + delay_cycles(11); + #endif + *clr = pinMask; + } else { + *clr = pinMask; + // This is the low delay unique to a zero bit. + // For the SK6812 its 0.3us + #ifdef SAMD21 + asm("nop; nop;"); + #endif + #ifdef SAMD51 + delay_cycles(3); + #endif + } + if((bitMask >>= 1) != 0) { + // This is the delay between bits in a byte and is the 1 code low + // level time from the datasheet. + // For the SK6812 its 0.6us +- 0.15us + #ifdef SAMD21 + asm("nop; nop; nop; nop; nop;"); + #endif + #ifdef SAMD51 + delay_cycles(20); + #endif + } else { + if(ptr >= end) break; + p = *ptr++; + bitMask = 0x80; + // This is the delay between bytes. It's similar to the other branch + // in the if statement except its tuned to account for the time the + // above operations take. + // For the SK6812 its 0.6us +- 0.15us + #ifdef SAMD51 + delay_cycles(15); + #endif + } + } + + #ifdef SAMD21 + // Speed up! (But inconsistent timing.) + NVMCTRL->CTRLB.bit.READMODE = NVMCTRL_CTRLB_READMODE_NO_MISS_PENALTY_Val; + #endif + + #ifdef SAMD51 + // Turn instruction, data, and NVM caches back on. + hri_cmcc_clear_CFG_reg(CMCC, CMCC_CFG_DCDIS | CMCC_CFG_ICDIS); + hri_nvmctrl_clear_CTRLA_CACHEDIS0_bit(NVMCTRL); + hri_nvmctrl_clear_CTRLA_CACHEDIS1_bit(NVMCTRL); + + #endif + + // ticks_ms may be out of date at this point because we stopped the + // interrupt. We'll risk it anyway. + current_tick(&next_start_tick_ms, &next_start_tick_us); + if (next_start_tick_us < 100) { + next_start_tick_ms += 1; + next_start_tick_us = 100 - next_start_tick_us; + } else { + next_start_tick_us -= 100; + } + + // Turn on interrupts after timing-sensitive code. + mp_hal_enable_all_interrupts(); +*/ +} diff --git a/ports/nrf/common-hal/pulseio/PWMOut.c b/ports/nrf/common-hal/pulseio/PWMOut.c index 0f14610924..c3c51d5669 100644 --- a/ports/nrf/common-hal/pulseio/PWMOut.c +++ b/ports/nrf/common-hal/pulseio/PWMOut.c @@ -146,7 +146,7 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, // check if mapped to PWM channel already for(int i=0; iport, pin->pin)); + int ch = pin2channel(pwm_arr[i], pin->number); if ( ch >= 0 ) { self->pwm = pwm_arr[i]; @@ -163,12 +163,12 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self, if (self->pwm) { - nrf_gpio_cfg_output(NRF_GPIO_PIN_MAP(pin->port, pin->pin)); + nrf_gpio_cfg_output(pin->number); // disable before mapping pin channel self->pwm->ENABLE = 0; - self->pwm->PSEL.OUT[self->channel] = NRF_GPIO_PIN_MAP(pin->port, pin->pin); + self->pwm->PSEL.OUT[self->channel] = pin->number; self->pwm->COUNTERTOP = (PWM_MAX_FREQ/frequency); self->freq = frequency; @@ -203,7 +203,7 @@ void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) { } } - nrf_gpio_cfg_default(NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin)); + nrf_gpio_cfg_default(self->pin->number); self->pwm = NULL; self->pin = mp_const_none; diff --git a/ports/nrf/nrf52_af.csv b/ports/nrf/nrf52_af.csv deleted file mode 100644 index 272d9cd09b..0000000000 --- a/ports/nrf/nrf52_af.csv +++ /dev/null @@ -1,48 +0,0 @@ -P0_00 -P0_01 -P0_02,AIN0 -P0_03,AIN1 -P0_04,AIN2 -P0_05,AIN3 -P0_06 -P0_07 -P0_08 -P0_09 -P0_10 -P0_11 -P0_12 -P0_13 -P0_14 -P0_15 -P0_16 -P0_17 -P0_18 -P0_19 -P0_20 -P0_21 -P0_22 -P0_23 -P0_24 -P0_25 -P0_26 -P0_27 -P0_28,AIN4 -P0_29,AIN5 -P0_30,AIN6 -P0_31,AIN7 -P1_00 -P1_01 -P1_02 -P1_03 -P1_04 -P1_05 -P1_06 -P1_07 -P1_08 -P1_09 -P1_10 -P1_11 -P1_12 -P1_13 -P1_14 -P1_15 diff --git a/ports/nrf/peripherals/nrf/nrf52832/pins.c b/ports/nrf/peripherals/nrf/nrf52832/pins.c new file mode 100644 index 0000000000..fdfa766ec8 --- /dev/null +++ b/ports/nrf/peripherals/nrf/nrf52832/pins.c @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// DO NOT include this file directly. Use shared-bindings/microcontroller/Pin.h instead to ensure +// that all necessary includes are already included. + +#include "py/obj.h" +#include "py/mphal.h" +#include "nrf/pins.h" + +const mcu_pin_obj_t pin_P0_00 = PIN(P0_00, 0, 0, 0); +const mcu_pin_obj_t pin_P0_01 = PIN(P0_01, 0, 1, 0); +const mcu_pin_obj_t pin_P0_02 = PIN(P0_02, 0, 2, SAADC_CH_PSELP_PSELP_AnalogInput0); +const mcu_pin_obj_t pin_P0_03 = PIN(P0_03, 0, 3, SAADC_CH_PSELP_PSELP_AnalogInput1); +const mcu_pin_obj_t pin_P0_04 = PIN(P0_04, 0, 4, SAADC_CH_PSELP_PSELP_AnalogInput2); +const mcu_pin_obj_t pin_P0_05 = PIN(P0_05, 0, 5, SAADC_CH_PSELP_PSELP_AnalogInput3); +const mcu_pin_obj_t pin_P0_06 = PIN(P0_06, 0, 6, 0); +const mcu_pin_obj_t pin_P0_07 = PIN(P0_07, 0, 7, 0); +const mcu_pin_obj_t pin_P0_08 = PIN(P0_08, 0, 8, 0); +const mcu_pin_obj_t pin_P0_09 = PIN(P0_09, 0, 9, 0); +const mcu_pin_obj_t pin_P0_10 = PIN(P0_10, 0, 10, 0); +const mcu_pin_obj_t pin_P0_11 = PIN(P0_11, 0, 11, 0); +const mcu_pin_obj_t pin_P0_12 = PIN(P0_12, 0, 12, 0); +const mcu_pin_obj_t pin_P0_13 = PIN(P0_13, 0, 13, 0); +const mcu_pin_obj_t pin_P0_14 = PIN(P0_14, 0, 14, 0); +const mcu_pin_obj_t pin_P0_15 = PIN(P0_15, 0, 15, 0); +const mcu_pin_obj_t pin_P0_16 = PIN(P0_16, 0, 16, 0); +const mcu_pin_obj_t pin_P0_17 = PIN(P0_17, 0, 17, 0); +const mcu_pin_obj_t pin_P0_18 = PIN(P0_18, 0, 18, 0); +const mcu_pin_obj_t pin_P0_19 = PIN(P0_19, 0, 19, 0); +const mcu_pin_obj_t pin_P0_20 = PIN(P0_20, 0, 20, 0); +const mcu_pin_obj_t pin_P0_21 = PIN(P0_21, 0, 21, 0); +const mcu_pin_obj_t pin_P0_22 = PIN(P0_22, 0, 22, 0); +const mcu_pin_obj_t pin_P0_23 = PIN(P0_23, 0, 23, 0); +const mcu_pin_obj_t pin_P0_24 = PIN(P0_24, 0, 24, 0); +const mcu_pin_obj_t pin_P0_25 = PIN(P0_25, 0, 25, 0); +const mcu_pin_obj_t pin_P0_26 = PIN(P0_26, 0, 26, 0); +const mcu_pin_obj_t pin_P0_27 = PIN(P0_27, 0, 27, 0); +const mcu_pin_obj_t pin_P0_28 = PIN(P0_28, 0, 28, SAADC_CH_PSELP_PSELP_AnalogInput4); +const mcu_pin_obj_t pin_P0_29 = PIN(P0_29, 0, 29, SAADC_CH_PSELP_PSELP_AnalogInput5); +const mcu_pin_obj_t pin_P0_30 = PIN(P0_30, 0, 30, SAADC_CH_PSELP_PSELP_AnalogInput6); +const mcu_pin_obj_t pin_P0_31 = PIN(P0_31, 0, 31, SAADC_CH_PSELP_PSELP_AnalogInput7); diff --git a/ports/nrf/peripherals/nrf/nrf52832/pins.h b/ports/nrf/peripherals/nrf/nrf52832/pins.h new file mode 100644 index 0000000000..0bc039df00 --- /dev/null +++ b/ports/nrf/peripherals/nrf/nrf52832/pins.h @@ -0,0 +1,65 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 by Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52832_PINS_H +#define MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52832_PINS_H + +void reset_pin(uint8_t pin); + +extern const mcu_pin_obj_t pin_P0_00; +extern const mcu_pin_obj_t pin_P0_01; +extern const mcu_pin_obj_t pin_P0_02; +extern const mcu_pin_obj_t pin_P0_03; +extern const mcu_pin_obj_t pin_P0_04; +extern const mcu_pin_obj_t pin_P0_05; +extern const mcu_pin_obj_t pin_P0_06; +extern const mcu_pin_obj_t pin_P0_07; +extern const mcu_pin_obj_t pin_P0_08; +extern const mcu_pin_obj_t pin_P0_09; +extern const mcu_pin_obj_t pin_P0_10; +extern const mcu_pin_obj_t pin_P0_11; +extern const mcu_pin_obj_t pin_P0_12; +extern const mcu_pin_obj_t pin_P0_13; +extern const mcu_pin_obj_t pin_P0_14; +extern const mcu_pin_obj_t pin_P0_15; +extern const mcu_pin_obj_t pin_P0_16; +extern const mcu_pin_obj_t pin_P0_17; +extern const mcu_pin_obj_t pin_P0_18; +extern const mcu_pin_obj_t pin_P0_19; +extern const mcu_pin_obj_t pin_P0_20; +extern const mcu_pin_obj_t pin_P0_21; +extern const mcu_pin_obj_t pin_P0_22; +extern const mcu_pin_obj_t pin_P0_23; +extern const mcu_pin_obj_t pin_P0_24; +extern const mcu_pin_obj_t pin_P0_25; +extern const mcu_pin_obj_t pin_P0_26; +extern const mcu_pin_obj_t pin_P0_27; +extern const mcu_pin_obj_t pin_P0_28; +extern const mcu_pin_obj_t pin_P0_29; +extern const mcu_pin_obj_t pin_P0_30; +extern const mcu_pin_obj_t pin_P0_31; + +#endif // MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52832_PINS_H diff --git a/ports/nrf/peripherals/nrf/nrf52840/pins.c b/ports/nrf/peripherals/nrf/nrf52840/pins.c new file mode 100644 index 0000000000..b7dc8e65e0 --- /dev/null +++ b/ports/nrf/peripherals/nrf/nrf52840/pins.c @@ -0,0 +1,78 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/obj.h" +#include "py/mphal.h" +#include "nrf/pins.h" + +const mcu_pin_obj_t pin_P0_00 = PIN(P0_00, 0, 0, 0); +const mcu_pin_obj_t pin_P0_01 = PIN(P0_01, 0, 1, 0); +const mcu_pin_obj_t pin_P0_02 = PIN(P0_02, 0, 2, SAADC_CH_PSELP_PSELP_AnalogInput0); +const mcu_pin_obj_t pin_P0_03 = PIN(P0_03, 0, 3, SAADC_CH_PSELP_PSELP_AnalogInput1); +const mcu_pin_obj_t pin_P0_04 = PIN(P0_04, 0, 4, SAADC_CH_PSELP_PSELP_AnalogInput2); +const mcu_pin_obj_t pin_P0_05 = PIN(P0_05, 0, 5, SAADC_CH_PSELP_PSELP_AnalogInput3); +const mcu_pin_obj_t pin_P0_06 = PIN(P0_06, 0, 6, 0); +const mcu_pin_obj_t pin_P0_07 = PIN(P0_07, 0, 7, 0); +const mcu_pin_obj_t pin_P0_08 = PIN(P0_08, 0, 8, 0); +const mcu_pin_obj_t pin_P0_09 = PIN(P0_09, 0, 9, 0); +const mcu_pin_obj_t pin_P0_10 = PIN(P0_10, 0, 10, 0); +const mcu_pin_obj_t pin_P0_11 = PIN(P0_11, 0, 11, 0); +const mcu_pin_obj_t pin_P0_12 = PIN(P0_12, 0, 12, 0); +const mcu_pin_obj_t pin_P0_13 = PIN(P0_13, 0, 13, 0); +const mcu_pin_obj_t pin_P0_14 = PIN(P0_14, 0, 14, 0); +const mcu_pin_obj_t pin_P0_15 = PIN(P0_15, 0, 15, 0); +const mcu_pin_obj_t pin_P0_16 = PIN(P0_16, 0, 16, 0); +const mcu_pin_obj_t pin_P0_17 = PIN(P0_17, 0, 17, 0); +const mcu_pin_obj_t pin_P0_18 = PIN(P0_18, 0, 18, 0); +const mcu_pin_obj_t pin_P0_19 = PIN(P0_19, 0, 19, 0); +const mcu_pin_obj_t pin_P0_20 = PIN(P0_20, 0, 20, 0); +const mcu_pin_obj_t pin_P0_21 = PIN(P0_21, 0, 21, 0); +const mcu_pin_obj_t pin_P0_22 = PIN(P0_22, 0, 22, 0); +const mcu_pin_obj_t pin_P0_23 = PIN(P0_23, 0, 23, 0); +const mcu_pin_obj_t pin_P0_24 = PIN(P0_24, 0, 24, 0); +const mcu_pin_obj_t pin_P0_25 = PIN(P0_25, 0, 25, 0); +const mcu_pin_obj_t pin_P0_26 = PIN(P0_26, 0, 26, 0); +const mcu_pin_obj_t pin_P0_27 = PIN(P0_27, 0, 27, 0); +const mcu_pin_obj_t pin_P0_28 = PIN(P0_28, 0, 28, SAADC_CH_PSELP_PSELP_AnalogInput4); +const mcu_pin_obj_t pin_P0_29 = PIN(P0_29, 0, 29, SAADC_CH_PSELP_PSELP_AnalogInput5); +const mcu_pin_obj_t pin_P0_30 = PIN(P0_30, 0, 30, SAADC_CH_PSELP_PSELP_AnalogInput6); +const mcu_pin_obj_t pin_P0_31 = PIN(P0_31, 0, 31, SAADC_CH_PSELP_PSELP_AnalogInput7); +const mcu_pin_obj_t pin_P1_00 = PIN(P1_00, 1, 0, 0); +const mcu_pin_obj_t pin_P1_01 = PIN(P1_01, 1, 1, 0); +const mcu_pin_obj_t pin_P1_02 = PIN(P1_02, 1, 2, 0); +const mcu_pin_obj_t pin_P1_03 = PIN(P1_03, 1, 3, 0); +const mcu_pin_obj_t pin_P1_04 = PIN(P1_04, 1, 4, 0); +const mcu_pin_obj_t pin_P1_05 = PIN(P1_05, 1, 5, 0); +const mcu_pin_obj_t pin_P1_06 = PIN(P1_06, 1, 6, 0); +const mcu_pin_obj_t pin_P1_07 = PIN(P1_07, 1, 7, 0); +const mcu_pin_obj_t pin_P1_08 = PIN(P1_08, 1, 8, 0); +const mcu_pin_obj_t pin_P1_09 = PIN(P1_09, 1, 9, 0); +const mcu_pin_obj_t pin_P1_10 = PIN(P1_10, 1, 10, 0); +const mcu_pin_obj_t pin_P1_11 = PIN(P1_11, 1, 11, 0); +const mcu_pin_obj_t pin_P1_12 = PIN(P1_12, 1, 12, 0); +const mcu_pin_obj_t pin_P1_13 = PIN(P1_13, 1, 13, 0); +const mcu_pin_obj_t pin_P1_14 = PIN(P1_14, 1, 14, 0); +const mcu_pin_obj_t pin_P1_15 = PIN(P1_15, 1, 15, 0); diff --git a/ports/nrf/peripherals/nrf/nrf52840/pins.h b/ports/nrf/peripherals/nrf/nrf52840/pins.h new file mode 100644 index 0000000000..80f1d14af3 --- /dev/null +++ b/ports/nrf/peripherals/nrf/nrf52840/pins.h @@ -0,0 +1,81 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 by Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#ifndef MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52840_PINS_H +#define MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52840_PINS_H + +void reset_pin(uint8_t pin); + +extern const mcu_pin_obj_t pin_P0_00; +extern const mcu_pin_obj_t pin_P0_01; +extern const mcu_pin_obj_t pin_P0_02; +extern const mcu_pin_obj_t pin_P0_03; +extern const mcu_pin_obj_t pin_P0_04; +extern const mcu_pin_obj_t pin_P0_05; +extern const mcu_pin_obj_t pin_P0_06; +extern const mcu_pin_obj_t pin_P0_07; +extern const mcu_pin_obj_t pin_P0_08; +extern const mcu_pin_obj_t pin_P0_09; +extern const mcu_pin_obj_t pin_P0_10; +extern const mcu_pin_obj_t pin_P0_11; +extern const mcu_pin_obj_t pin_P0_12; +extern const mcu_pin_obj_t pin_P0_13; +extern const mcu_pin_obj_t pin_P0_14; +extern const mcu_pin_obj_t pin_P0_15; +extern const mcu_pin_obj_t pin_P0_16; +extern const mcu_pin_obj_t pin_P0_17; +extern const mcu_pin_obj_t pin_P0_18; +extern const mcu_pin_obj_t pin_P0_19; +extern const mcu_pin_obj_t pin_P0_20; +extern const mcu_pin_obj_t pin_P0_21; +extern const mcu_pin_obj_t pin_P0_22; +extern const mcu_pin_obj_t pin_P0_23; +extern const mcu_pin_obj_t pin_P0_24; +extern const mcu_pin_obj_t pin_P0_25; +extern const mcu_pin_obj_t pin_P0_26; +extern const mcu_pin_obj_t pin_P0_27; +extern const mcu_pin_obj_t pin_P0_28; +extern const mcu_pin_obj_t pin_P0_29; +extern const mcu_pin_obj_t pin_P0_30; +extern const mcu_pin_obj_t pin_P0_31; +extern const mcu_pin_obj_t pin_P1_00; +extern const mcu_pin_obj_t pin_P1_01; +extern const mcu_pin_obj_t pin_P1_02; +extern const mcu_pin_obj_t pin_P1_03; +extern const mcu_pin_obj_t pin_P1_04; +extern const mcu_pin_obj_t pin_P1_05; +extern const mcu_pin_obj_t pin_P1_06; +extern const mcu_pin_obj_t pin_P1_07; +extern const mcu_pin_obj_t pin_P1_08; +extern const mcu_pin_obj_t pin_P1_09; +extern const mcu_pin_obj_t pin_P1_10; +extern const mcu_pin_obj_t pin_P1_11; +extern const mcu_pin_obj_t pin_P1_12; +extern const mcu_pin_obj_t pin_P1_13; +extern const mcu_pin_obj_t pin_P1_14; +extern const mcu_pin_obj_t pin_P1_15; + +#endif // MICROPY_INCLUDED_NRF_PERIPHERALS_NRF52840_PINS_H diff --git a/ports/nrf/peripherals/nrf/pins.h b/ports/nrf/peripherals/nrf/pins.h new file mode 100644 index 0000000000..ca58f5fad0 --- /dev/null +++ b/ports/nrf/peripherals/nrf/pins.h @@ -0,0 +1,69 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// DO NOT include this file directly. Use shared-bindings/microcontroller/Pin.h instead to ensure +// that all necessary includes are already included. + +#ifndef __MICROPY_INCLUDED_NRF_PERIPHERALS_PINS_H__ +#define __MICROPY_INCLUDED_NRF_PERIPHERALS_PINS_H__ + +#include +#include + +#include "nrf_gpio.h" + +typedef struct { + mp_obj_base_t base; + qstr name; + // These could be squeezed to fewer bits if more fields are needed. + uint8_t number; // port << 5 | pin number in port (0-31): 6 bits needed + uint8_t adc_channel; // 0 is no ADC, ADC channel from 1 to 8: + // 4 bits needed here; 5 bits used in periph registers +} mcu_pin_obj_t; + +extern const mp_obj_type_t mcu_pin_type; + +// Used in device-specific pins.c +#define PIN(p_name, p_port, p_pin, p_adc_channel) \ +{ \ + { &mcu_pin_type }, \ + .name = MP_QSTR_ ## p_name, \ + .number = NRF_GPIO_PIN_MAP(p_port, p_pin), \ + .adc_channel = (p_adc_channel), \ +} + +// Choose based on chip, but not specifically revision (e.g., not NRF52832_XXAA) +#ifdef NRF52832 +#include "nrf52832/pins.h" +#endif + +#ifdef NRF52840 +#include "nrf52840/pins.h" +#endif + +//**************extern const mp_obj_type_t mcu_pin_type; + +#endif // __MICROPY_INCLUDED_NRF_PERIPHERALS_PINS_H__ diff --git a/ports/nrf/supervisor/serial.c b/ports/nrf/supervisor/serial.c index a822dc9936..da7fe07fd3 100644 --- a/ports/nrf/supervisor/serial.c +++ b/ports/nrf/supervisor/serial.c @@ -30,7 +30,6 @@ #include "ble_uart.h" #else #include "nrf_gpio.h" -#include "nrf_pin.h" #endif #if !defined( NRF52840_XXAA) || ( defined(CFG_HWUART_FOR_SERIAL) && CFG_HWUART_FOR_SERIAL == 1 )