From aec0ef3cbfafb79c32592c1ee39832c787f4f202 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Wed, 24 Mar 2021 17:10:54 -0700 Subject: [PATCH 1/3] Switch devices.h to nvm.toml data --- .../boards/8086_commander/mpconfigboard.mk | 2 +- .../capablerobot_usbhub/mpconfigboard.mk | 2 +- .../circuitbrains_basic_m0/mpconfigboard.mk | 2 +- .../circuitbrains_deluxe_m4/mpconfigboard.mk | 2 +- .../boards/cp32-m4/mpconfigboard.mk | 2 +- .../boards/datalore_ip_m4/mpconfigboard.mk | 2 +- .../grandcentral_m4_express/mpconfigboard.mk | 2 +- .../hallowing_m0_express/mpconfigboard.mk | 2 +- .../boards/mini_sam_m4/mpconfigboard.mk | 2 +- .../boards/pyportal/mpconfigboard.mk | 2 +- .../boards/pyportal_titano/mpconfigboard.mk | 2 +- .../boards/robohatmm1_m4/mpconfigboard.mk | 2 +- .../seeeduino_wio_terminal/mpconfigboard.mk | 2 +- .../boards/snekboard/mpconfigboard.mk | 2 +- .../stackrduino_m0_pro/mpconfigboard.mk | 2 +- .../trellis_m4_express/mpconfigboard.mk | 2 +- .../boards/uartlogger2/mpconfigboard.mk | 2 +- .../boards/winterbloom_sol/mpconfigboard.mk | 2 +- .../nrf/boards/hiibot_bluefi/mpconfigboard.mk | 2 +- .../stm/boards/meowbit_v121/mpconfigboard.mk | 2 +- ports/stm/boards/pyb_nano_v2/mpconfigboard.mk | 2 +- .../mpconfigboard.mk | 2 +- supervisor/shared/external_flash/devices.h | 716 ------------------ .../shared/external_flash/devices.h.jinja | 96 +++ supervisor/spi_flash_api.h | 2 +- supervisor/supervisor.mk | 21 +- tools/gen_nvm_devices.py | 23 + 27 files changed, 157 insertions(+), 745 deletions(-) delete mode 100644 supervisor/shared/external_flash/devices.h create mode 100644 supervisor/shared/external_flash/devices.h.jinja create mode 100644 tools/gen_nvm_devices.py diff --git a/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk b/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk index dc56219fe1..c7918ad05c 100644 --- a/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk +++ b/ports/atmel-samd/boards/8086_commander/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q128JV_SQ" +EXTERNAL_FLASH_DEVICES = "W25Q128JVxQ" LONGINT_IMPL = NONE CIRCUITPY_FULL_BUILD = 0 diff --git a/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk b/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk index 9417c23025..42d302b087 100644 --- a/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk +++ b/ports/atmel-samd/boards/capablerobot_usbhub/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD51G19A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "GD25Q16C, W25Q16JV_IQ" +EXTERNAL_FLASH_DEVICES = "GD25Q16C, W25Q16JVxQ" LONGINT_IMPL = MPZ # No I2S on SAMD51G diff --git a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk index e01e5ca4d5..870edb06ee 100755 --- a/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitbrains_basic_m0/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD21E18A CHIP_FAMILY = samd21 SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q32JV_IQ" +EXTERNAL_FLASH_DEVICES = "W25Q32JVxQ" LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 diff --git a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk index 40b5815ede..a96326c3b1 100755 --- a/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk +++ b/ports/atmel-samd/boards/circuitbrains_deluxe_m4/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD51J19A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, S25FL064L" +EXTERNAL_FLASH_DEVICES = "W25Q64JVxQ, S25FL064L" LONGINT_IMPL = MPZ CIRCUITPY_PS2IO = 1 diff --git a/ports/atmel-samd/boards/cp32-m4/mpconfigboard.mk b/ports/atmel-samd/boards/cp32-m4/mpconfigboard.mk index 9f54bd1182..dfdde0dbb0 100644 --- a/ports/atmel-samd/boards/cp32-m4/mpconfigboard.mk +++ b/ports/atmel-samd/boards/cp32-m4/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD51J20A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q128JV_PM" +EXTERNAL_FLASH_DEVICES = "W25Q128JVxM" # No I2S on SAMD51G. CIRCUITPY_AUDIOBUSIO = 0 diff --git a/ports/atmel-samd/boards/datalore_ip_m4/mpconfigboard.mk b/ports/atmel-samd/boards/datalore_ip_m4/mpconfigboard.mk index 13e0f75c7c..b07f86c160 100644 --- a/ports/atmel-samd/boards/datalore_ip_m4/mpconfigboard.mk +++ b/ports/atmel-samd/boards/datalore_ip_m4/mpconfigboard.mk @@ -7,5 +7,5 @@ CHIP_VARIANT = SAMD51J19A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "GD25Q16C, W25Q16JV_IQ, W25Q16JV_IM" +EXTERNAL_FLASH_DEVICES = "GD25Q16C, W25Q16JVxQ, W25Q16JVxM" LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk index cd43dd4d67..88c6e9bf16 100644 --- a/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/grandcentral_m4_express/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD51P20A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" +EXTERNAL_FLASH_DEVICES = "W25Q64JVxQ, GD25Q64C" LONGINT_IMPL = MPZ CIRCUITPY_SDIOIO = 1 diff --git a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk index 4661a7acd0..8c51315429 100644 --- a/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/hallowing_m0_express/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" +EXTERNAL_FLASH_DEVICES = "W25Q64JVxQ, GD25Q64C" LONGINT_IMPL = NONE # To keep the build small diff --git a/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.mk b/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.mk index 8f4c3f8904..c3e21a4c36 100644 --- a/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.mk +++ b/ports/atmel-samd/boards/mini_sam_m4/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD51G19A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q16JV_IM, W25Q16JV_IQ" +EXTERNAL_FLASH_DEVICES = "W25Q16JVxM, W25Q16JVxQ" LONGINT_IMPL = MPZ # No I2S on SAMD51G diff --git a/ports/atmel-samd/boards/pyportal/mpconfigboard.mk b/ports/atmel-samd/boards/pyportal/mpconfigboard.mk index e8c27ecbf1..0a70db50c9 100644 --- a/ports/atmel-samd/boards/pyportal/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pyportal/mpconfigboard.mk @@ -7,5 +7,5 @@ CHIP_VARIANT = SAMD51J20A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" +EXTERNAL_FLASH_DEVICES = "W25Q64JVxQ, GD25Q64C" LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.mk b/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.mk index c9ffd09549..2202fca2f7 100644 --- a/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.mk +++ b/ports/atmel-samd/boards/pyportal_titano/mpconfigboard.mk @@ -7,5 +7,5 @@ CHIP_VARIANT = SAMD51J20A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" +EXTERNAL_FLASH_DEVICES = "W25Q64JVxQ, GD25Q64C" LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/robohatmm1_m4/mpconfigboard.mk b/ports/atmel-samd/boards/robohatmm1_m4/mpconfigboard.mk index e964d65d5e..0ae092c693 100644 --- a/ports/atmel-samd/boards/robohatmm1_m4/mpconfigboard.mk +++ b/ports/atmel-samd/boards/robohatmm1_m4/mpconfigboard.mk @@ -9,7 +9,7 @@ CHIP_FAMILY = samd51 #QSPI_FLASH_FILESYSTEM = 0 SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ" +EXTERNAL_FLASH_DEVICES = "W25Q64JVxQ" LONGINT_IMPL = MPZ # No I2S on SAMD51G diff --git a/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.mk b/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.mk index 7163568374..9788f5ff40 100644 --- a/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.mk +++ b/ports/atmel-samd/boards/seeeduino_wio_terminal/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD51P19A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q32JV_IQ" +EXTERNAL_FLASH_DEVICES = "W25Q32JVxQ" LONGINT_IMPL = MPZ CIRCUITPY_VECTORIO = 1 diff --git a/ports/atmel-samd/boards/snekboard/mpconfigboard.mk b/ports/atmel-samd/boards/snekboard/mpconfigboard.mk index 90bc6076f7..3467ef7578 100644 --- a/ports/atmel-samd/boards/snekboard/mpconfigboard.mk +++ b/ports/atmel-samd/boards/snekboard/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q16JV_IQ" +EXTERNAL_FLASH_DEVICES = "W25Q16JVxQ" LONGINT_IMPL = MPZ CIRCUITPY_BITBANGIO = 0 diff --git a/ports/atmel-samd/boards/stackrduino_m0_pro/mpconfigboard.mk b/ports/atmel-samd/boards/stackrduino_m0_pro/mpconfigboard.mk index ee3f21b05a..fb46e99dae 100644 --- a/ports/atmel-samd/boards/stackrduino_m0_pro/mpconfigboard.mk +++ b/ports/atmel-samd/boards/stackrduino_m0_pro/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD21G18A CHIP_FAMILY = samd21 SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ" +EXTERNAL_FLASH_DEVICES = "W25Q64JVxQ" LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/trellis_m4_express/mpconfigboard.mk b/ports/atmel-samd/boards/trellis_m4_express/mpconfigboard.mk index 59a40d3dcc..81df26b0c6 100644 --- a/ports/atmel-samd/boards/trellis_m4_express/mpconfigboard.mk +++ b/ports/atmel-samd/boards/trellis_m4_express/mpconfigboard.mk @@ -7,7 +7,7 @@ CHIP_VARIANT = SAMD51G19A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q64JV_IQ, GD25Q64C" +EXTERNAL_FLASH_DEVICES = "W25Q64JVxQ, GD25Q64C" LONGINT_IMPL = MPZ # No I2S on SAMD51G diff --git a/ports/atmel-samd/boards/uartlogger2/mpconfigboard.mk b/ports/atmel-samd/boards/uartlogger2/mpconfigboard.mk index 373cbba99c..87619b5783 100644 --- a/ports/atmel-samd/boards/uartlogger2/mpconfigboard.mk +++ b/ports/atmel-samd/boards/uartlogger2/mpconfigboard.mk @@ -7,5 +7,5 @@ CHIP_VARIANT = SAMD51J19A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q32JV_IQ" +EXTERNAL_FLASH_DEVICES = "W25Q32JVxQ" LONGINT_IMPL = MPZ diff --git a/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk index ce9c2585f9..81956a0b80 100644 --- a/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk +++ b/ports/atmel-samd/boards/winterbloom_sol/mpconfigboard.mk @@ -11,7 +11,7 @@ CHIP_VARIANT = SAMD51J20A CHIP_FAMILY = samd51 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "GD25Q64C, W25Q32JV_IQ" +EXTERNAL_FLASH_DEVICES = "GD25Q64C, W25Q32JVxQ" LONGINT_IMPL = MPZ # Disable modules that are unusable on this special-purpose board. diff --git a/ports/nrf/boards/hiibot_bluefi/mpconfigboard.mk b/ports/nrf/boards/hiibot_bluefi/mpconfigboard.mk index c85b978944..71e2a9da23 100644 --- a/ports/nrf/boards/hiibot_bluefi/mpconfigboard.mk +++ b/ports/nrf/boards/hiibot_bluefi/mpconfigboard.mk @@ -6,4 +6,4 @@ USB_MANUFACTURER = "HiiBot" MCU_CHIP = nrf52840 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q16JV_IQ" +EXTERNAL_FLASH_DEVICES = "W25Q16JVxQ" diff --git a/ports/stm/boards/meowbit_v121/mpconfigboard.mk b/ports/stm/boards/meowbit_v121/mpconfigboard.mk index 45a04a3a77..dc44095a31 100644 --- a/ports/stm/boards/meowbit_v121/mpconfigboard.mk +++ b/ports/stm/boards/meowbit_v121/mpconfigboard.mk @@ -4,7 +4,7 @@ USB_PRODUCT = "Meowbit" USB_MANUFACTURER = "Kittenbot" SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ +EXTERNAL_FLASH_DEVICES = W25Q16JVxQ # INTERNAL_FLASH_FILESYSTEM = 1 BOOTLOADER_OFFSET = 0x8010000 diff --git a/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk index cff8eea705..31cc9b4d27 100644 --- a/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk +++ b/ports/stm/boards/pyb_nano_v2/mpconfigboard.mk @@ -4,7 +4,7 @@ USB_PRODUCT = "PYB LR Nano V2" USB_MANUFACTURER = "MicroPython Chinese Community" SPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = W25Q64JV_IQ +EXTERNAL_FLASH_DEVICES = W25Q64JVxQ MCU_SERIES = F4 MCU_VARIANT = STM32F411xE diff --git a/ports/stm/boards/stm32f411ce_blackpill_with_flash/mpconfigboard.mk b/ports/stm/boards/stm32f411ce_blackpill_with_flash/mpconfigboard.mk index f6fd423271..ed124ce27e 100644 --- a/ports/stm/boards/stm32f411ce_blackpill_with_flash/mpconfigboard.mk +++ b/ports/stm/boards/stm32f411ce_blackpill_with_flash/mpconfigboard.mk @@ -5,7 +5,7 @@ USB_MANUFACTURER = "Unknown" SPI_FLASH_FILESYSTEM = 1 #See supervisor/shared/external_flash/devices.h for options -EXTERNAL_FLASH_DEVICES = GD25Q16C,W25Q64FV,W25Q64JV_IQ +EXTERNAL_FLASH_DEVICES = GD25Q16C,W25Q64FV,W25Q64JVxQ LONGINT_IMPL = MPZ INTERNAL_FLASH_FILESYSTEM = 0 diff --git a/supervisor/shared/external_flash/devices.h b/supervisor/shared/external_flash/devices.h deleted file mode 100644 index ae98065caf..0000000000 --- a/supervisor/shared/external_flash/devices.h +++ /dev/null @@ -1,716 +0,0 @@ -/* - * This file is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - */ -#ifndef MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H -#define MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H - -#include -#include - -typedef struct { - uint32_t total_size; - uint16_t start_up_time_us; - - // Three response bytes to 0x9f JEDEC ID command. - uint8_t manufacturer_id; - uint8_t memory_type; - uint8_t capacity; - - // Max clock speed for all operations and the fastest read mode. - uint8_t max_clock_speed_mhz; - - // Bitmask for Quad Enable bit if present. 0x00 otherwise. This is for the highest byte in the - // status register. - uint8_t quad_enable_bit_mask; - - bool has_sector_protection : 1; - - // Supports the 0x0b fast read command with 8 dummy cycles. - bool supports_fast_read : 1; - - // Supports the fast read, quad output command 0x6b with 8 dummy cycles. - bool supports_qspi : 1; - - // Supports the quad input page program command 0x32. This is known as 1-1-4 because it only - // uses all four lines for data. - bool supports_qspi_writes : 1; - - // Requires a separate command 0x31 to write to the second byte of the status register. - // Otherwise two byte are written via 0x01. - bool write_status_register_split : 1; - - // True when the status register is a single byte. This implies the Quad Enable bit is in the - // first byte and the Read Status Register 2 command (0x35) is unsupported. - bool single_status_byte : 1; - - // Does not support using a ready bit within the status register - bool no_ready_bit : 1; - - // Does not support the erase command (0x20) - bool no_erase_cmd : 1; - - // Device does not have a reset command - bool no_reset_cmd : 1; -} external_flash_device; - -// Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. It's on the SAMD21 -// Xplained board. -// Datasheet: https://www.adestotech.com/wp-content/uploads/doc8715.pdf -#define AT25DF081A { \ - .total_size = (1 << 20), /* 1 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x1f, \ - .memory_type = 0x45, \ - .capacity = 0x01, \ - .max_clock_speed_mhz = 85, \ - .quad_enable_bit_mask = 0x00, \ - .has_sector_protection = true, \ - .supports_fast_read = true, \ - .supports_qspi = false, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Adesto Tech AT25DF641-SSHD-T 8MiB SPI flash -// for the Oak Dev Tech Icy Tree M0 (SAMD21) feather board. -// Source: https://www.digikey.com/product-detail/en/adesto-technologies/AT25SF641-SDHD-T/1265-1180-1-ND/ -// Datasheet: https://www.adestotech.com/wp-content/uploads/doc8693.pdf -#define AT25DF641A { \ - .total_size = (1 << 23), /* 8 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x1f, \ - .memory_type = 0x48, \ - .capacity = 0x00, \ - .max_clock_speed_mhz = 85, \ - .quad_enable_bit_mask = 0x00, \ - .has_sector_protection = true, \ - .supports_fast_read = true, \ - .supports_qspi = false, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Adesto Tech AT25SF161-SSHD-T 2MiB SPI flash -// for the StringCar M0 (SAMD21) Express board. -// Source: https://www.digikey.com/product-detail/en/adesto-technologies/AT25SF161-SDHD-T/1265-1230-1-ND/ -// Datasheet: https://www.adestotech.com/wpo-content/uploads/jDS-AT25SF161_046.pdf -#define AT25SF161 { \ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x1f, \ - .memory_type = 0x86, \ - .capacity = 0x01, \ - .max_clock_speed_mhz = 85, \ - .quad_enable_bit_mask = 0x00, \ - .has_sector_protection = true, \ - .supports_fast_read = true, \ - .supports_qspi = false, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - - -// Settings for the Adesto Tech AT25SF041 1MiB SPI flash. It's on the SparkFun -// SAMD51 Thing Plus board -// Datasheet: https://www.adestotech.com/wp-content/uploads/DS-AT25SF041_044.pdf -#define AT25SF041A { \ - .total_size = (1 << 19), /* 512 KiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x1f, \ - .memory_type = 0x84, \ - .capacity = 0x01, \ - .max_clock_speed_mhz = 85, \ - .quad_enable_bit_mask = 0x00, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = false, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Gigadevice GD25Q16C 2MiB SPI flash. -// Datasheet: http://www.gigadevice.com/datasheet/gd25q16c/ -#define GD25Q16C { \ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xc8, \ - .memory_type = 0x40, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Gigadevice GD25Q32C 4MiB SPI flash. -// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q32/gd25q32.pdf -#define GD25Q32C { \ - .total_size = (1 << 22), /* 4 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xc8, \ - .memory_type = 0x40, \ - .capacity = 0x16, \ - .max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = true, \ - .single_status_byte = false, \ -} - -// Settings for the Gigadevice GD25Q64C 8MiB SPI flash. -// Datasheet: http://www.elm-tech.com/en/products/spi-flash-memory/gd25q64/gd25q64.pdf -#define GD25Q64C { \ - .total_size = (1 << 23), /* 8 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xc8, \ - .memory_type = 0x40, \ - .capacity = 0x17, \ - .max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = true, \ - .single_status_byte = false, \ -} - -// Settings for the Gigadevice GD25S512MD 64MiB SPI flash. -// Datasheet: http://www.gigadevice.com/datasheet/gd25s512md/ -#define GD25S512MD { \ - .total_size = (1 << 26), /* 64 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xc8, \ - .memory_type = 0x40, \ - .capacity = 0x19, \ - .max_clock_speed_mhz = 104, /* if we need 120 then we can turn on high performance mode */ \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = true, \ - .single_status_byte = false, \ -} - -// Settings for the Cypress (was Spansion) S25FL064L 8MiB SPI flash. -// Datasheet: http://www.cypress.com/file/316661/download -#define S25FL064L { \ - .total_size = (1 << 23), /* 8 MiB */ \ - .start_up_time_us = 300, \ - .manufacturer_id = 0x01, \ - .memory_type = 0x60, \ - .capacity = 0x17, \ - .max_clock_speed_mhz = 108, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Cypress (was Spansion) S25FL116K 2MiB SPI flash. -// Datasheet: http://www.cypress.com/file/196886/download -#define S25FL116K { \ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x01, \ - .memory_type = 0x40, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 108, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Cypress (was Spansion) S25FL216K 2MiB SPI flash. -// Datasheet: http://www.cypress.com/file/197346/download -#define S25FL216K { \ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x01, \ - .memory_type = 0x40, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 65, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = false, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Winbond W25Q16FW 2MiB SPI flash. -// Datasheet: https://www.winbond.com/resource-files/w25q16fw%20revj%2005182017%20sfdp.pdf -#define W25Q16FW { \ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x60, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Winbond W25Q16JV-IQ 2MiB SPI flash. Note that JV-IM has a different .memory_type (0x70) -// Datasheet: https://www.winbond.com/resource-files/w25q16jv%20spi%20revf%2005092017.pdf -#define W25Q16JV_IQ { \ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x40, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Winbond W25Q16JV-IM 2MiB SPI flash. Note that JV-IQ has a different .memory_type (0x40) -// Datasheet: https://www.winbond.com/resource-files/w25q16jv%20spi%20revf%2005092017.pdf -#define W25Q16JV_IM { \ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x70, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ -} - -// Settings for the Winbond W25Q32BV 4MiB SPI flash. -// Datasheet: https://www.winbond.com/resource-files/w25q32bv_revi_100413_wo_automotive.pdf -#define W25Q32BV { \ - .total_size = (1 << 22), /* 4 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x60, \ - .capacity = 0x16, \ - .max_clock_speed_mhz = 104, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} -// Settings for the Winbond W25Q32JV-IM 4MiB SPI flash. -// Datasheet: https://www.winbond.com/resource-files/w25q32jv%20revg%2003272018%20plus.pdf -#define W25Q32JV_IM { \ - .total_size = (1 << 22), /* 4 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x70, \ - .capacity = 0x16, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ -} - -// Settings for the Winbond W25Q32JV-IQ 4MiB SPI flash. -// Datasheet: https://www.mouser.com/datasheet/2/949/w25q32jv_revg_03272018_plus-1489806.pdf -#define W25Q32JV_IQ { \ - .total_size = (1 << 22), /* 4 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x40, \ - .capacity = 0x16, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ -} - -// Settings for the Winbond W25Q64FV 8MiB SPI flash. -// Datasheet: https://www.winbond.com/resource-files/w25q64fv%20revs%2007182017.pdf -#define W25Q64FV { \ - .total_size = (1 << 23), /* 8 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x40, \ - .capacity = 0x17, \ - .max_clock_speed_mhz = 104, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Winbond W25Q64JV-IM 8MiB SPI flash. Note that JV-IQ has a different .memory_type (0x40) -// Datasheet: http://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf -#define W25Q64JV_IM { \ - .total_size = (1 << 23), /* 8 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x70, \ - .capacity = 0x17, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Winbond W25Q64JV-IQ 8MiB SPI flash. Note that JV-IM has a different .memory_type (0x70) -// Datasheet: http://www.winbond.com/resource-files/w25q64jv%20revj%2003272018%20plus.pdf -#define W25Q64JV_IQ { \ - .total_size = (1 << 23), /* 8 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x40, \ - .capacity = 0x17, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Winbond W25Q80DL 1MiB SPI flash. -// Datasheet: https://www.winbond.com/resource-files/w25q80dv%20dl_revh_10022015.pdf -#define W25Q80DL { \ - .total_size = (1 << 20), /* 1 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x60, \ - .capacity = 0x14, \ - .max_clock_speed_mhz = 104, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Winbond W25Q80DV 1MiB SPI flash.. Note that W25Q80DL has a different memory type (0x60) -// Datasheet: https://www.winbond.com/resource-files/w25q80dv%20dl_revh_10022015.pdf -#define W25Q80DV { \ - .total_size = (1 << 20), /* 1 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x40, \ - .capacity = 0x14, \ - .max_clock_speed_mhz = 104, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Winbond W25Q128JV-SQ 16MiB SPI flash. Note that JV-IM has a different .memory_type (0x70) -// Datasheet: https://www.winbond.com/resource-files/w25q128jv%20revf%2003272018%20plus.pdf -#define W25Q128JV_SQ { \ - .total_size = (1 << 24), /* 16 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x40, \ - .capacity = 0x18, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the Everspin MR20H40 / MR25H40 magnetic non-volatile RAM -// Datasheet: https://www.everspin.com/supportdocs/MR25H40CDFR -#define MR2xH40 { \ - .total_size = (1 << 22), /* 4 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0xef, /*no JDEC*/ \ - .memory_type = 0x40, /*no JDEC*/ \ - .capacity = 0x14, /*no JDEC*/ \ - .max_clock_speed_mhz = 10, \ - .quad_enable_bit_mask = 0x00, \ - .has_sector_protection = false, \ - .supports_fast_read = false, \ - .supports_qspi = false, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = true, \ - .no_ready_bit = true, \ - .no_erase_cmd = true, \ - .no_reset_cmd = true, \ -} - -// Settings for the Macronix MX25L1606 2MiB SPI flash. -// Datasheet: -#define MX25L1606 { \ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xc2, \ - .memory_type = 0x20, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 8, \ - .quad_enable_bit_mask = 0x40, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = true, \ -} - -// Settings for the Macronix MX25L3233F 4MiB SPI flash. -// Datasheet: http://www.macronix.com/Lists/Datasheet/Attachments/7426/MX25L3233F,%203V,%2032Mb,%20v1.6.pdf -#define MX25L3233F { \ - .total_size = (1 << 22), /* 4 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xc2, \ - .memory_type = 0x20, \ - .capacity = 0x16, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x40, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = true, \ -} - -// Settings for the Macronix MX25R6435F 8MiB SPI flash. -// Datasheet: http://www.macronix.com/Lists/Datasheet/Attachments/7428/MX25R6435F,%20Wide%20Range,%2064Mb,%20v1.4.pdf -// By default its in lower power mode which can only do 8mhz. In high power mode it can do 80mhz. -#define MX25R6435F { \ - .total_size = (1 << 23), /* 8 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xc2, \ - .memory_type = 0x28, \ - .capacity = 0x17, \ - .max_clock_speed_mhz = 8, \ - .quad_enable_bit_mask = 0x40, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = true, \ -} - -// Settings for the Macronix MX25R1635F 2MiB SPI flash. -// Datasheet: https://www.macronix.com/Lists/Datasheet/Attachments/7595/MX25R1635F,%20Wide%20Range,%2016Mb,%20v1.6.pdf -// In low power mode, quad operations can only run at 8 MHz. In high power mode it can do 80 MHz. -#define MX25R1635F { \ - .total_size = (1 << 21), /* 2 MiB */ \ - .start_up_time_us = 800, \ - .manufacturer_id = 0xc2, \ - .memory_type = 0x28, \ - .capacity = 0x15, \ - .max_clock_speed_mhz = 8, /* 33 MHz for 1-bit operations */ \ - .quad_enable_bit_mask = 0x40, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = true, \ -} - -// Settings for the Macronix MX25L51245G 64MiB SPI flash. -// Datasheet: https://www.macronix.com/Lists/Datasheet/Attachments/7437/MX25L51245G,%203V,%20512Mb,%20v1.6.pdf -#define MX25L51245G { \ - .total_size = (1 << 26), /* 64 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xc2, \ - .memory_type = 0x20, \ - .capacity = 0x1a, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x40, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = true, \ -} - -// Settings for the Macronix MX25L51245G 64MiB SPI flash. -// Datasheet: https://www.macronix.com/Lists/Datasheet/Attachments/7437/MX25L51245G,%203V,%20512Mb,%20v1.6.pdf -#define MX25L25645G { \ - .total_size = (1 << 25), /* 32 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0x9f, \ - .memory_type = 0xab, \ - .capacity = 0x90, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0xaf, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = true, \ -} - -// Settings for the Macronix MX25L12833F 16MiB SPI flash -// Datasheet: https://www.macronix.com/Lists/Datasheet/Attachments/7447/MX25L12833F,%203V,%20128Mb,%20v1.0.pdf - -#define MX25L12833F { \ - .total_size = (1UL << 24), /* 16 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xc2, \ - .memory_type = 0x20, \ - .capacity = 0x18, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x40, \ - .has_sector_protection = true, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = true, \ -} - -// Settings for the Winbond W25Q128JV-PM 16MiB SPI flash. Note that JV-IM has a different .memory_type (0x70) -// Datasheet: https://www.winbond.com/resource-files/w25q128jv%20revf%2003272018%20plus.pdf -#define W25Q128JV_PM { \ - .total_size = (1 << 24), /* 16 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x70, \ - .capacity = 0x18, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ -} - -// Settings for the Winbond W25Q32FV 4MiB SPI flash. -// Datasheet:http://www.winbond.com/resource-files/w25q32fv%20revj%2006032016.pdf?__locale=en -#define W25Q32FV { \ - .total_size = (1 << 22), /* 4 MiB */ \ - .start_up_time_us = 5000, \ - .manufacturer_id = 0xef, \ - .memory_type = 0x40, \ - .capacity = 0x16, \ - .max_clock_speed_mhz = 104, \ - .quad_enable_bit_mask = 0x00, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = false, \ - .supports_qspi_writes = false, \ - .write_status_register_split = false, \ - .single_status_byte = false, \ -} - -// Settings for the ISSI IS25LP128F 16MiB SPI flash. -// Datasheet: http://www.issi.com/WW/pdf/25LP-WP128F.pdf -#define IS25LP128F { \ - .total_size = (1 << 24), /* 16 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x9d, \ - .memory_type = 0x60, \ - .capacity = 0x18, \ - .max_clock_speed_mhz = 133, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = true, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = true, \ -} - -// Settings for the Micron N25Q256A 256Mb (32MiB) QSPI flash. -// Datasheet: https://www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-nor/n25q/n25q_256mb_3v.pdf -#define N25Q256A { \ - /* .total_size = (1 << 25), 32 MiB does not work at this time, as assumptions about 3-byte addresses abound */ \ - .total_size = (1 << 24), /* 16 MiB */ \ - .start_up_time_us = 10000, \ - .manufacturer_id = 0x20, \ - .memory_type = 0xBA, \ - .capacity = 0x19, \ - .max_clock_speed_mhz = 108, \ - .quad_enable_bit_mask = 0x02, \ - .has_sector_protection = false, \ - .supports_fast_read = true, \ - .supports_qspi = true, \ - .supports_qspi_writes = true, \ - .write_status_register_split = false, \ - .single_status_byte = true, \ -} -#endif // MICROPY_INCLUDED_ATMEL_SAMD_EXTERNAL_FLASH_DEVICES_H diff --git a/supervisor/shared/external_flash/devices.h.jinja b/supervisor/shared/external_flash/devices.h.jinja new file mode 100644 index 0000000000..f6bfac613e --- /dev/null +++ b/supervisor/shared/external_flash/devices.h.jinja @@ -0,0 +1,96 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_DEVICES_H +#define MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_DEVICES_H + +#include +#include + +typedef struct { + uint32_t total_size; + uint16_t start_up_time_us; + + // Three response bytes to 0x9f JEDEC ID command. + uint8_t manufacturer_id; + uint8_t memory_type; + uint8_t capacity; + + // Max clock speed for all operations and the fastest read mode. + uint8_t max_clock_speed_mhz; + + // Bitmask for Quad Enable bit if present. 0x00 otherwise. This is for the highest byte in the + // status register. + uint8_t quad_enable_bit_mask; + + bool has_sector_protection : 1; + + // Supports the 0x0b fast read command with 8 dummy cycles. + bool supports_fast_read : 1; + + // Supports the fast read, quad output command 0x6b with 8 dummy cycles. + bool supports_qspi : 1; + + // Supports the quad input page program command 0x32. This is known as 1-1-4 because it only + // uses all four lines for data. + bool supports_qspi_writes : 1; + + // Requires a separate command 0x31 to write to the second byte of the status register. + // Otherwise two byte are written via 0x01. + bool write_status_register_split : 1; + + // True when the status register is a single byte. This implies the Quad Enable bit is in the + // first byte and the Read Status Register 2 command (0x35) is unsupported. + bool single_status_byte : 1; + + // Does not support using a ready bit within the status register + bool no_ready_bit : 1; + + // Does not support the erase command (0x20) + bool no_erase_cmd : 1; + + // Device does not have a reset command + bool no_reset_cmd : 1; +} external_flash_device; + +{% for device in nvms %} +#define {{ device.sku }} { \ + .total_size = {{ device.total_size }}, \ + .start_up_time_us = {{ device.start_up_time_us }}, \ + .manufacturer_id = {{ device.manufacturer_id }}, \ + .memory_type = {{ device.memory_type }}, \ + .capacity = {{ device.capacity }}, \ + .max_clock_speed_mhz = {{ device.max_clock_speed_mhz }}, \ + .quad_enable_bit_mask = {{ device.quad_enable_bit_mask }}, \ + .has_sector_protection = {{ device.has_sector_protection | lower() }}, \ + .supports_fast_read = {{ device.supports_fast_read | lower() }}, \ + .supports_qspi = {{ device["6b_quad_read"] | lower() }}, \ + .supports_qspi_writes = {{ device["32_qspi_write"] | lower() }}, \ + .write_status_register_split = {{ device.write_status_register_split | lower() }}, \ + .single_status_byte = {{ (device.quad_enable_status_byte == 1) | lower() }}, \ +} +{% endfor %} + +#endif // MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_DEVICES_H diff --git a/supervisor/spi_flash_api.h b/supervisor/spi_flash_api.h index ed80b8207b..9d30c7f2bd 100644 --- a/supervisor/spi_flash_api.h +++ b/supervisor/spi_flash_api.h @@ -29,7 +29,7 @@ #include #include -#include "supervisor/shared/external_flash/devices.h" +#include "genhdr/devices.h" #include "shared-bindings/busio/SPI.h" diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk index 946b4b0bfc..f295df632b 100644 --- a/supervisor/supervisor.mk +++ b/supervisor/supervisor.mk @@ -42,12 +42,21 @@ else CFLAGS += -DEXTERNAL_FLASH_DEVICES=$(EXTERNAL_FLASH_DEVICES) \ SRC_SUPERVISOR += supervisor/shared/external_flash/external_flash.c - ifeq ($(SPI_FLASH_FILESYSTEM),1) - SRC_SUPERVISOR += supervisor/shared/external_flash/spi_flash.c - endif - ifeq ($(QSPI_FLASH_FILESYSTEM),1) - SRC_SUPERVISOR += supervisor/qspi_flash.c supervisor/shared/external_flash/qspi_flash.c - endif + ifeq ($(SPI_FLASH_FILESYSTEM),1) + SRC_SUPERVISOR += supervisor/shared/external_flash/spi_flash.c + endif + ifeq ($(QSPI_FLASH_FILESYSTEM),1) + SRC_SUPERVISOR += supervisor/qspi_flash.c supervisor/shared/external_flash/qspi_flash.c + endif + +$(HEADER_BUILD)/devices.h : ../../supervisor/shared/external_flash/devices.h.jinja ../../tools/gen_nvm_devices.py | $(HEADER_BUILD) + $(STEPECHO) "GEN $@" + $(Q)install -d $(BUILD)/genhdr + $(Q)$(PYTHON3) ../../tools/gen_nvm_devices.py $< $@ + +$(BUILD)/supervisor/shared/external_flash/spi_flash.o: $(HEADER_BUILD)/devices.h +$(BUILD)/supervisor/shared/external_flash/external_flash.o: $(HEADER_BUILD)/devices.h + endif ifeq ($(USB),FALSE) diff --git a/tools/gen_nvm_devices.py b/tools/gen_nvm_devices.py new file mode 100644 index 0000000000..3cda8671fd --- /dev/null +++ b/tools/gen_nvm_devices.py @@ -0,0 +1,23 @@ +import sys +import cascadetoml +import pathlib +import typer +from jinja2 import Template + + +def main(input_template: pathlib.Path, output_path: pathlib.Path): + flashes = cascadetoml.filter_toml(pathlib.Path("../../data/nvm.toml"), []) + + template = Template(input_template.read_text()) + + settings = {"nvms": []} + for flash in flashes["nvm"]: + if "sku" not in flash or flash["sku"] == flash["manufacturer"]: + continue + settings["nvms"].append(dict(flash)) + + output_path.write_text(template.render(settings)) + + +if __name__ == "__main__": + typer.run(main) From da4dceea154f05b09e273e03d74e0e2b2a6f5dd5 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Thu, 25 Mar 2021 08:43:13 -0700 Subject: [PATCH 2/3] Fix 16MB Winbond names --- ports/nrf/boards/TG-Watch/mpconfigboard.mk | 2 +- ports/nrf/boards/ohs2020_badge/mpconfigboard.mk | 2 +- ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/ports/nrf/boards/TG-Watch/mpconfigboard.mk b/ports/nrf/boards/TG-Watch/mpconfigboard.mk index 8407d84877..8a191c1534 100644 --- a/ports/nrf/boards/TG-Watch/mpconfigboard.mk +++ b/ports/nrf/boards/TG-Watch/mpconfigboard.mk @@ -6,7 +6,7 @@ USB_MANUFACTURER = "TG-Techie" MCU_CHIP = nrf52840 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "GD25Q16C, W25Q128JV_SQ" +EXTERNAL_FLASH_DEVICES = "GD25Q16C, W25Q128JVxQ" FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_BusDevice FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_Register diff --git a/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk b/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk index 2e6e885f55..045939e652 100644 --- a/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk +++ b/ports/nrf/boards/ohs2020_badge/mpconfigboard.mk @@ -6,4 +6,4 @@ USB_MANUFACTURER = "OSHWA" MCU_CHIP = nrf52840 QSPI_FLASH_FILESYSTEM = 1 -EXTERNAL_FLASH_DEVICES = "W25Q128JV_SQ" +EXTERNAL_FLASH_DEVICES = "W25Q128JVxQ" diff --git a/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk index 4c4bcd0896..21ca20825a 100644 --- a/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk +++ b/ports/nrf/boards/sparkfun_nrf52840_micromod/mpconfigboard.mk @@ -7,4 +7,4 @@ MCU_CHIP = nrf52840 QSPI_FLASH_FILESYSTEM = 1 EXTERNAL_FLASH_DEVICE_COUNT = 1 -EXTERNAL_FLASH_DEVICES = "W25Q128JV_PM" +EXTERNAL_FLASH_DEVICES = "W25Q128JVxM" From 01c153cd7e8bace50892050a13b15201a674df37 Mon Sep 17 00:00:00 2001 From: Scott Shawcroft Date: Thu, 25 Mar 2021 10:03:05 -0700 Subject: [PATCH 3/3] Fix devices include by splitting type from defines --- supervisor/shared/external_flash/device.h | 78 +++++++++++++++++++ .../shared/external_flash/devices.h.jinja | 49 ------------ .../shared/external_flash/external_flash.c | 1 + supervisor/spi_flash_api.h | 2 +- supervisor/supervisor.mk | 1 - 5 files changed, 80 insertions(+), 51 deletions(-) create mode 100644 supervisor/shared/external_flash/device.h diff --git a/supervisor/shared/external_flash/device.h b/supervisor/shared/external_flash/device.h new file mode 100644 index 0000000000..bbf6bfd91b --- /dev/null +++ b/supervisor/shared/external_flash/device.h @@ -0,0 +1,78 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018 Scott Shawcroft for Adafruit Industries LLC + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_DEVICE_H +#define MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_DEVICE_H + +#include +#include + +typedef struct { + uint32_t total_size; + uint16_t start_up_time_us; + + // Three response bytes to 0x9f JEDEC ID command. + uint8_t manufacturer_id; + uint8_t memory_type; + uint8_t capacity; + + // Max clock speed for all operations and the fastest read mode. + uint8_t max_clock_speed_mhz; + + // Bitmask for Quad Enable bit if present. 0x00 otherwise. This is for the highest byte in the + // status register. + uint8_t quad_enable_bit_mask; + + bool has_sector_protection : 1; + + // Supports the 0x0b fast read command with 8 dummy cycles. + bool supports_fast_read : 1; + + // Supports the fast read, quad output command 0x6b with 8 dummy cycles. + bool supports_qspi : 1; + + // Supports the quad input page program command 0x32. This is known as 1-1-4 because it only + // uses all four lines for data. + bool supports_qspi_writes : 1; + + // Requires a separate command 0x31 to write to the second byte of the status register. + // Otherwise two byte are written via 0x01. + bool write_status_register_split : 1; + + // True when the status register is a single byte. This implies the Quad Enable bit is in the + // first byte and the Read Status Register 2 command (0x35) is unsupported. + bool single_status_byte : 1; + + // Does not support using a ready bit within the status register + bool no_ready_bit : 1; + + // Does not support the erase command (0x20) + bool no_erase_cmd : 1; + + // Device does not have a reset command + bool no_reset_cmd : 1; +} external_flash_device; + +#endif // MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_DEVICE_H diff --git a/supervisor/shared/external_flash/devices.h.jinja b/supervisor/shared/external_flash/devices.h.jinja index f6bfac613e..b200b75dca 100644 --- a/supervisor/shared/external_flash/devices.h.jinja +++ b/supervisor/shared/external_flash/devices.h.jinja @@ -26,55 +26,6 @@ #ifndef MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_DEVICES_H #define MICROPY_INCLUDED_SUPERVISOR_SHARED_EXTERNAL_FLASH_DEVICES_H -#include -#include - -typedef struct { - uint32_t total_size; - uint16_t start_up_time_us; - - // Three response bytes to 0x9f JEDEC ID command. - uint8_t manufacturer_id; - uint8_t memory_type; - uint8_t capacity; - - // Max clock speed for all operations and the fastest read mode. - uint8_t max_clock_speed_mhz; - - // Bitmask for Quad Enable bit if present. 0x00 otherwise. This is for the highest byte in the - // status register. - uint8_t quad_enable_bit_mask; - - bool has_sector_protection : 1; - - // Supports the 0x0b fast read command with 8 dummy cycles. - bool supports_fast_read : 1; - - // Supports the fast read, quad output command 0x6b with 8 dummy cycles. - bool supports_qspi : 1; - - // Supports the quad input page program command 0x32. This is known as 1-1-4 because it only - // uses all four lines for data. - bool supports_qspi_writes : 1; - - // Requires a separate command 0x31 to write to the second byte of the status register. - // Otherwise two byte are written via 0x01. - bool write_status_register_split : 1; - - // True when the status register is a single byte. This implies the Quad Enable bit is in the - // first byte and the Read Status Register 2 command (0x35) is unsupported. - bool single_status_byte : 1; - - // Does not support using a ready bit within the status register - bool no_ready_bit : 1; - - // Does not support the erase command (0x20) - bool no_erase_cmd : 1; - - // Device does not have a reset command - bool no_reset_cmd : 1; -} external_flash_device; - {% for device in nvms %} #define {{ device.sku }} { \ .total_size = {{ device.total_size }}, \ diff --git a/supervisor/shared/external_flash/external_flash.c b/supervisor/shared/external_flash/external_flash.c index f8054a9fe0..722393ce65 100644 --- a/supervisor/shared/external_flash/external_flash.c +++ b/supervisor/shared/external_flash/external_flash.c @@ -27,6 +27,7 @@ #include #include +#include "genhdr/devices.h" #include "supervisor/flash.h" #include "supervisor/spi_flash_api.h" #include "supervisor/shared/external_flash/common_commands.h" diff --git a/supervisor/spi_flash_api.h b/supervisor/spi_flash_api.h index 9d30c7f2bd..1af83736df 100644 --- a/supervisor/spi_flash_api.h +++ b/supervisor/spi_flash_api.h @@ -29,7 +29,7 @@ #include #include -#include "genhdr/devices.h" +#include "shared/external_flash/device.h" #include "shared-bindings/busio/SPI.h" diff --git a/supervisor/supervisor.mk b/supervisor/supervisor.mk index f295df632b..1744c4f47f 100644 --- a/supervisor/supervisor.mk +++ b/supervisor/supervisor.mk @@ -54,7 +54,6 @@ $(HEADER_BUILD)/devices.h : ../../supervisor/shared/external_flash/devices.h.jin $(Q)install -d $(BUILD)/genhdr $(Q)$(PYTHON3) ../../tools/gen_nvm_devices.py $< $@ -$(BUILD)/supervisor/shared/external_flash/spi_flash.o: $(HEADER_BUILD)/devices.h $(BUILD)/supervisor/shared/external_flash/external_flash.o: $(HEADER_BUILD)/devices.h endif