Merge remote-tracking branch 'adafruit/master' into tweak_pixelbuf
This commit is contained in:
Scott Shawcroft
commit
55eb1730b8
52
.github/workflows/build.yml
vendored
52
.github/workflows/build.yml
vendored
@ -22,7 +22,8 @@ jobs:
|
|||||||
python-version: 3.5
|
python-version: 3.5
|
||||||
- name: Install deps
|
- name: Install deps
|
||||||
run: |
|
run: |
|
||||||
sudo apt-get install -y gettext librsvg2-bin
|
sudo apt-get install -y eatmydata
|
||||||
|
sudo eatmydata apt-get install -y gettext librsvg2-bin mingw-w64
|
||||||
pip install requests sh click setuptools cpp-coveralls Sphinx sphinx-rtd-theme recommonmark sphinxcontrib-svg2pdfconverter polib pyyaml
|
pip install requests sh click setuptools cpp-coveralls Sphinx sphinx-rtd-theme recommonmark sphinxcontrib-svg2pdfconverter polib pyyaml
|
||||||
- name: Versions
|
- name: Versions
|
||||||
run: |
|
run: |
|
||||||
@ -66,6 +67,54 @@ jobs:
|
|||||||
run: python3 -u ci_new_boards_check.py
|
run: python3 -u ci_new_boards_check.py
|
||||||
working-directory: tools
|
working-directory: tools
|
||||||
|
|
||||||
|
- name: Build mpy-cross.static-raspbian
|
||||||
|
run: make -C mpy-cross -j2 -f Makefile.static-raspbian
|
||||||
|
- uses: actions/upload-artifact@v1.0.0
|
||||||
|
with:
|
||||||
|
name: mpy-cross.static-raspbian
|
||||||
|
path: mpy-cross/mpy-cross.static-raspbian
|
||||||
|
|
||||||
|
- name: Build mpy-cross.static
|
||||||
|
run: make -C mpy-cross -j2 -f Makefile.static
|
||||||
|
- uses: actions/upload-artifact@v1.0.0
|
||||||
|
with:
|
||||||
|
name: mpy-cross.static-amd64-linux
|
||||||
|
path: mpy-cross/mpy-cross.static
|
||||||
|
|
||||||
|
- name: Build mpy-cross.static-mingw
|
||||||
|
run: make -C mpy-cross -j2 -f Makefile.static-mingw
|
||||||
|
- uses: actions/upload-artifact@v1.0.0
|
||||||
|
with:
|
||||||
|
name: mpy-cross.static-x64-windows
|
||||||
|
path: mpy-cross/mpy-cross.static.exe
|
||||||
|
|
||||||
|
mpy-cross-mac:
|
||||||
|
runs-on: macos-latest
|
||||||
|
steps:
|
||||||
|
- name: Dump GitHub context
|
||||||
|
env:
|
||||||
|
GITHUB_CONTEXT: ${{ toJson(github) }}
|
||||||
|
run: echo "$GITHUB_CONTEXT"
|
||||||
|
- name: Install deps
|
||||||
|
run: |
|
||||||
|
brew link --force gettext
|
||||||
|
- name: Versions
|
||||||
|
run: |
|
||||||
|
gcc --version
|
||||||
|
python3 --version
|
||||||
|
msgfmt --version
|
||||||
|
- uses: actions/checkout@v1
|
||||||
|
with:
|
||||||
|
submodules: true
|
||||||
|
- name: CircuitPython version
|
||||||
|
run: git describe --dirty --always --tags
|
||||||
|
- name: Build mpy-cross
|
||||||
|
run: make -C mpy-cross -j2
|
||||||
|
- uses: actions/upload-artifact@v1.0.0
|
||||||
|
with:
|
||||||
|
name: mpy-cross-macos-catalina
|
||||||
|
path: mpy-cross/mpy-cross
|
||||||
|
|
||||||
build-arm:
|
build-arm:
|
||||||
runs-on: ubuntu-16.04
|
runs-on: ubuntu-16.04
|
||||||
needs: test
|
needs: test
|
||||||
@ -121,6 +170,7 @@ jobs:
|
|||||||
- "kicksat-sprite"
|
- "kicksat-sprite"
|
||||||
- "makerdiary_nrf52840_mdk"
|
- "makerdiary_nrf52840_mdk"
|
||||||
- "makerdiary_nrf52840_mdk_usb_dongle"
|
- "makerdiary_nrf52840_mdk_usb_dongle"
|
||||||
|
- "meowbit_v121"
|
||||||
- "meowmeow"
|
- "meowmeow"
|
||||||
- "metro_m0_express"
|
- "metro_m0_express"
|
||||||
- "metro_m4_airlift_lite"
|
- "metro_m4_airlift_lite"
|
||||||
|
|||||||
@ -1 +1 @@
|
|||||||
Subproject commit 8d5cc384058b1cb296aaeab86fb8405042d547ed
|
Subproject commit 19a66d79f0650a15e502464b42e16692365eab36
|
||||||
5
main.c
5
main.c
@ -57,6 +57,8 @@
|
|||||||
#include "supervisor/shared/stack.h"
|
#include "supervisor/shared/stack.h"
|
||||||
#include "supervisor/serial.h"
|
#include "supervisor/serial.h"
|
||||||
|
|
||||||
|
#include "boards/board.h"
|
||||||
|
|
||||||
#if CIRCUITPY_DISPLAYIO
|
#if CIRCUITPY_DISPLAYIO
|
||||||
#include "shared-module/displayio/__init__.h"
|
#include "shared-module/displayio/__init__.h"
|
||||||
#endif
|
#endif
|
||||||
@ -425,6 +427,9 @@ int __attribute__((used)) main(void) {
|
|||||||
// no SPI flash filesystem, and we might erase the existing one.
|
// no SPI flash filesystem, and we might erase the existing one.
|
||||||
filesystem_init(safe_mode == NO_SAFE_MODE, false);
|
filesystem_init(safe_mode == NO_SAFE_MODE, false);
|
||||||
|
|
||||||
|
// displays init after filesystem, since they could share the flash SPI
|
||||||
|
board_init();
|
||||||
|
|
||||||
// Reset everything and prep MicroPython to run boot.py.
|
// Reset everything and prep MicroPython to run boot.py.
|
||||||
reset_port();
|
reset_port();
|
||||||
reset_board();
|
reset_board();
|
||||||
|
|||||||
7
mpy-cross/.gitignore
vendored
7
mpy-cross/.gitignore
vendored
@ -1 +1,6 @@
|
|||||||
mpy-cross
|
/build-*
|
||||||
|
/mpy-cross
|
||||||
|
/mpy-cross.static
|
||||||
|
/mpy-cross.static.exe
|
||||||
|
/mpy-cross.static-raspbian
|
||||||
|
/pitools
|
||||||
|
|||||||
@ -11,84 +11,4 @@ override undefine BUILD
|
|||||||
override undefine PROG
|
override undefine PROG
|
||||||
endif
|
endif
|
||||||
|
|
||||||
include ../py/mkenv.mk
|
include mpy-cross.mk
|
||||||
|
|
||||||
# define main target
|
|
||||||
|
|
||||||
ifeq ($(OS),Windows_NT)
|
|
||||||
# Detect a MINGW32 build, and change the name of the final executable.
|
|
||||||
PROG = mpy-cross.exe
|
|
||||||
else
|
|
||||||
PROG = mpy-cross
|
|
||||||
endif
|
|
||||||
|
|
||||||
# qstr definitions (must come before including py.mk)
|
|
||||||
QSTR_DEFS = qstrdefsport.h
|
|
||||||
|
|
||||||
# OS name, for simple autoconfig
|
|
||||||
UNAME_S := $(shell uname -s)
|
|
||||||
|
|
||||||
# include py core make definitions
|
|
||||||
include $(TOP)/py/py.mk
|
|
||||||
|
|
||||||
INC += -I.
|
|
||||||
INC += -I$(TOP)
|
|
||||||
INC += -I$(BUILD)
|
|
||||||
|
|
||||||
# compiler settings
|
|
||||||
CWARN = -Wall -Werror
|
|
||||||
CWARN += -Wpointer-arith -Wuninitialized
|
|
||||||
CFLAGS = $(INC) $(CWARN) -std=gnu99 $(CFLAGS_MOD) $(COPT) $(CFLAGS_EXTRA)
|
|
||||||
CFLAGS += -fdata-sections -ffunction-sections -fno-asynchronous-unwind-tables
|
|
||||||
|
|
||||||
# Build a static executable.
|
|
||||||
# Useful for Windows builds, etc., that must run on multiple operating system versions.
|
|
||||||
ifdef STATIC_BUILD
|
|
||||||
CFLAGS += -static -static-libgcc -static-libstdc++
|
|
||||||
endif
|
|
||||||
|
|
||||||
|
|
||||||
# Debugging/Optimization
|
|
||||||
ifdef DEBUG
|
|
||||||
CFLAGS += -g
|
|
||||||
COPT = -O0
|
|
||||||
else
|
|
||||||
COPT = -Os #-DNDEBUG
|
|
||||||
endif
|
|
||||||
|
|
||||||
# On OSX, 'gcc' is a symlink to clang unless a real gcc is installed.
|
|
||||||
# The unix port of MicroPython on OSX must be compiled with clang,
|
|
||||||
# while cross-compile ports require gcc, so we test here for OSX and
|
|
||||||
# if necessary override the value of 'CC' set in py/mkenv.mk
|
|
||||||
ifeq ($(UNAME_S),Darwin)
|
|
||||||
CC = clang
|
|
||||||
# Use clang syntax for map file
|
|
||||||
LDFLAGS_ARCH = -Wl,-map,$@.map -Wl,-dead_strip
|
|
||||||
else
|
|
||||||
# Use gcc syntax for map file
|
|
||||||
LDFLAGS_ARCH = -Wl,-Map=$@.map,--cref -Wl,--gc-sections
|
|
||||||
endif
|
|
||||||
LDFLAGS = $(LDFLAGS_MOD) $(LDFLAGS_ARCH) -lm $(LDFLAGS_EXTRA)
|
|
||||||
|
|
||||||
ifdef STATIC_BUILD
|
|
||||||
LDFLAGS += -static -static-libgcc -static-libstdc++
|
|
||||||
endif
|
|
||||||
|
|
||||||
# source files
|
|
||||||
SRC_C = \
|
|
||||||
main.c \
|
|
||||||
gccollect.c \
|
|
||||||
supervisor/stub/safe_mode.c \
|
|
||||||
supervisor/stub/stack.c \
|
|
||||||
supervisor/shared/translate.c
|
|
||||||
|
|
||||||
# Add fmode when compiling with mingw gcc
|
|
||||||
COMPILER_TARGET := $(shell $(CC) -dumpmachine)
|
|
||||||
ifneq (,$(findstring mingw,$(COMPILER_TARGET)))
|
|
||||||
SRC_C += ports/windows/fmode.c
|
|
||||||
endif
|
|
||||||
|
|
||||||
OBJ = $(PY_O)
|
|
||||||
OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
|
|
||||||
|
|
||||||
include $(TOP)/py/mkrules.mk
|
|
||||||
|
|||||||
5
mpy-cross/Makefile.static
Normal file
5
mpy-cross/Makefile.static
Normal file
@ -0,0 +1,5 @@
|
|||||||
|
PROG=mpy-cross.static
|
||||||
|
BUILD=build-static
|
||||||
|
STATIC_BUILD=1
|
||||||
|
|
||||||
|
include mpy-cross.mk
|
||||||
6
mpy-cross/Makefile.static-mingw
Normal file
6
mpy-cross/Makefile.static-mingw
Normal file
@ -0,0 +1,6 @@
|
|||||||
|
PROG=mpy-cross.static.exe
|
||||||
|
CROSS_COMPILE = x86_64-w64-mingw32-
|
||||||
|
BUILD=build-static-mingw
|
||||||
|
STATIC_BUILD=1
|
||||||
|
|
||||||
|
include mpy-cross.mk
|
||||||
8
mpy-cross/Makefile.static-raspbian
Normal file
8
mpy-cross/Makefile.static-raspbian
Normal file
@ -0,0 +1,8 @@
|
|||||||
|
PROG=mpy-cross.static-raspbian
|
||||||
|
BUILD=build-static-raspbian
|
||||||
|
STATIC_BUILD=1
|
||||||
|
|
||||||
|
CROSS_COMPILE = pitools/arm-bcm2708/gcc-linaro-arm-linux-gnueabihf-raspbian-x64/bin/arm-linux-gnueabihf-
|
||||||
|
include mpy-cross.mk
|
||||||
|
|
||||||
|
$(shell [ -d pitools ] || git clone --progress --verbose https://github.com/raspberrypi/tools.git --depth=1 pitools)
|
||||||
49
mpy-cross/fmode.c
Normal file
49
mpy-cross/fmode.c
Normal file
@ -0,0 +1,49 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the MicroPython project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2013-2016 Damien P. George
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "fmode.h"
|
||||||
|
#include "py/mpconfig.h"
|
||||||
|
#include <fcntl.h>
|
||||||
|
#include <stdlib.h>
|
||||||
|
|
||||||
|
// Workaround for setting file translation mode: we must distinguish toolsets
|
||||||
|
// since mingw has no _set_fmode, and altering msvc's _fmode directly has no effect
|
||||||
|
STATIC int set_fmode_impl(int mode) {
|
||||||
|
#ifndef _MSC_VER
|
||||||
|
_fmode = mode;
|
||||||
|
return 0;
|
||||||
|
#else
|
||||||
|
return _set_fmode(mode);
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
void set_fmode_binary(void) {
|
||||||
|
set_fmode_impl(O_BINARY);
|
||||||
|
}
|
||||||
|
|
||||||
|
void set_fmode_text(void) {
|
||||||
|
set_fmode_impl(O_TEXT);
|
||||||
|
}
|
||||||
37
mpy-cross/fmode.h
Normal file
37
mpy-cross/fmode.h
Normal file
@ -0,0 +1,37 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the MicroPython project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2013-2016 Damien P. George
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
#ifndef MICROPY_INCLUDED_WINDOWS_FMODE_H
|
||||||
|
#define MICROPY_INCLUDED_WINDOWS_FMODE_H
|
||||||
|
|
||||||
|
// Treat files opened by open() as binary. No line ending translation is done.
|
||||||
|
void set_fmode_binary(void);
|
||||||
|
|
||||||
|
// Treat files opened by open() as text.
|
||||||
|
// When reading from the file \r\n will be converted to \n.
|
||||||
|
// When writing to the file \n will be converted into \r\n.
|
||||||
|
void set_fmode_text(void);
|
||||||
|
|
||||||
|
#endif // MICROPY_INCLUDED_WINDOWS_FMODE_H
|
||||||
@ -35,7 +35,7 @@
|
|||||||
#include "py/gc.h"
|
#include "py/gc.h"
|
||||||
#include "py/stackctrl.h"
|
#include "py/stackctrl.h"
|
||||||
#ifdef _WIN32
|
#ifdef _WIN32
|
||||||
#include "ports/windows/fmode.h"
|
#include "fmode.h"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// Command line options, with their defaults
|
// Command line options, with their defaults
|
||||||
@ -284,3 +284,7 @@ void nlr_jump_fail(void *val) {
|
|||||||
printf("FATAL: uncaught NLR %p\n", val);
|
printf("FATAL: uncaught NLR %p\n", val);
|
||||||
exit(1);
|
exit(1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void serial_write(const char* text) {
|
||||||
|
printf("%s", text);
|
||||||
|
}
|
||||||
|
|||||||
81
mpy-cross/mpy-cross.mk
Normal file
81
mpy-cross/mpy-cross.mk
Normal file
@ -0,0 +1,81 @@
|
|||||||
|
include ../py/mkenv.mk
|
||||||
|
|
||||||
|
# define main target
|
||||||
|
|
||||||
|
ifeq ($(OS),Windows_NT)
|
||||||
|
# Detect a MINGW32 build, and change the name of the final executable.
|
||||||
|
PROG ?= mpy-cross.exe
|
||||||
|
else
|
||||||
|
PROG ?= mpy-cross
|
||||||
|
endif
|
||||||
|
|
||||||
|
# qstr definitions (must come before including py.mk)
|
||||||
|
QSTR_DEFS = qstrdefsport.h
|
||||||
|
|
||||||
|
# OS name, for simple autoconfig
|
||||||
|
UNAME_S := $(shell uname -s)
|
||||||
|
|
||||||
|
# include py core make definitions
|
||||||
|
include $(TOP)/py/py.mk
|
||||||
|
|
||||||
|
INC += -I.
|
||||||
|
INC += -I$(TOP)
|
||||||
|
INC += -I$(BUILD)
|
||||||
|
|
||||||
|
# compiler settings
|
||||||
|
CWARN = -Wall -Werror
|
||||||
|
CWARN += -Wpointer-arith -Wuninitialized
|
||||||
|
CFLAGS = $(INC) $(CWARN) -std=gnu99 $(CFLAGS_MOD) $(COPT) $(CFLAGS_EXTRA)
|
||||||
|
CFLAGS += -fdata-sections -ffunction-sections -fno-asynchronous-unwind-tables
|
||||||
|
|
||||||
|
# Build a static executable.
|
||||||
|
# Useful for Windows builds, etc., that must run on multiple operating system versions.
|
||||||
|
ifdef STATIC_BUILD
|
||||||
|
CFLAGS += -static -static-libgcc -static-libstdc++
|
||||||
|
endif
|
||||||
|
|
||||||
|
|
||||||
|
# Debugging/Optimization
|
||||||
|
ifdef DEBUG
|
||||||
|
CFLAGS += -g
|
||||||
|
COPT = -O0
|
||||||
|
else
|
||||||
|
COPT = -Os #-DNDEBUG
|
||||||
|
endif
|
||||||
|
|
||||||
|
# On OSX, 'gcc' is a symlink to clang unless a real gcc is installed.
|
||||||
|
# The unix port of MicroPython on OSX must be compiled with clang,
|
||||||
|
# while cross-compile ports require gcc, so we test here for OSX and
|
||||||
|
# if necessary override the value of 'CC' set in py/mkenv.mk
|
||||||
|
ifeq ($(UNAME_S),Darwin)
|
||||||
|
CC = clang
|
||||||
|
# Use clang syntax for map file
|
||||||
|
LDFLAGS_ARCH = -Wl,-map,$@.map -Wl,-dead_strip
|
||||||
|
else
|
||||||
|
# Use gcc syntax for map file
|
||||||
|
LDFLAGS_ARCH = -Wl,-Map=$@.map,--cref -Wl,--gc-sections
|
||||||
|
endif
|
||||||
|
LDFLAGS = $(LDFLAGS_MOD) $(LDFLAGS_ARCH) -lm $(LDFLAGS_EXTRA)
|
||||||
|
|
||||||
|
ifdef STATIC_BUILD
|
||||||
|
LDFLAGS += -static -static-libgcc -static-libstdc++
|
||||||
|
endif
|
||||||
|
|
||||||
|
# source files
|
||||||
|
SRC_C = \
|
||||||
|
main.c \
|
||||||
|
gccollect.c \
|
||||||
|
supervisor/stub/safe_mode.c \
|
||||||
|
supervisor/stub/stack.c \
|
||||||
|
supervisor/shared/translate.c
|
||||||
|
|
||||||
|
# Add fmode when compiling with mingw gcc
|
||||||
|
COMPILER_TARGET := $(shell $(CC) -dumpmachine)
|
||||||
|
ifneq (,$(findstring mingw,$(COMPILER_TARGET)))
|
||||||
|
SRC_C += fmode.c
|
||||||
|
endif
|
||||||
|
|
||||||
|
OBJ = $(PY_O)
|
||||||
|
OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
|
||||||
|
|
||||||
|
include $(TOP)/py/mkrules.mk
|
||||||
@ -232,9 +232,6 @@ safe_mode_t port_init(void) {
|
|||||||
// Reset everything into a known state before board_init.
|
// Reset everything into a known state before board_init.
|
||||||
reset_port();
|
reset_port();
|
||||||
|
|
||||||
// Init the board last so everything else is ready
|
|
||||||
board_init();
|
|
||||||
|
|
||||||
#ifdef SAMD21
|
#ifdef SAMD21
|
||||||
if (PM->RCAUSE.bit.BOD33 == 1 || PM->RCAUSE.bit.BOD12 == 1) {
|
if (PM->RCAUSE.bit.BOD33 == 1 || PM->RCAUSE.bit.BOD12 == 1) {
|
||||||
return BROWNOUT;
|
return BROWNOUT;
|
||||||
|
|||||||
@ -256,9 +256,6 @@ safe_mode_t port_init(void) {
|
|||||||
// Reset everything into a known state before board_init.
|
// Reset everything into a known state before board_init.
|
||||||
reset_port();
|
reset_port();
|
||||||
|
|
||||||
// Init the board last so everything else is ready
|
|
||||||
board_init();
|
|
||||||
|
|
||||||
if (board_requests_safe_mode()) {
|
if (board_requests_safe_mode()) {
|
||||||
return USER_SAFE_MODE;
|
return USER_SAFE_MODE;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -183,6 +183,32 @@ SRC_C += \
|
|||||||
lib/tinyusb/src/portable/nordic/nrf5x/dcd_nrf5x.c
|
lib/tinyusb/src/portable/nordic/nrf5x/dcd_nrf5x.c
|
||||||
endif
|
endif
|
||||||
|
|
||||||
|
ifeq ($(CIRCUITPY_NETWORK),1)
|
||||||
|
CFLAGS += -DMICROPY_PY_NETWORK=1
|
||||||
|
|
||||||
|
SRC_MOD += lib/netutils/netutils.c
|
||||||
|
|
||||||
|
ifneq ($(MICROPY_PY_WIZNET5K),0)
|
||||||
|
WIZNET5K_DIR=drivers/wiznet5k
|
||||||
|
INC += -I$(TOP)/$(WIZNET5K_DIR)
|
||||||
|
CFLAGS_MOD += -DMICROPY_PY_WIZNET5K=$(MICROPY_PY_WIZNET5K) -D_WIZCHIP_=$(MICROPY_PY_WIZNET5K)
|
||||||
|
SRC_MOD += $(addprefix $(WIZNET5K_DIR)/,\
|
||||||
|
ethernet/w$(MICROPY_PY_WIZNET5K)/w$(MICROPY_PY_WIZNET5K).c \
|
||||||
|
ethernet/wizchip_conf.c \
|
||||||
|
ethernet/socket.c \
|
||||||
|
internet/dns/dns.c \
|
||||||
|
internet/dhcp/dhcp.c \
|
||||||
|
)
|
||||||
|
|
||||||
|
endif # MICROPY_PY_WIZNET5K
|
||||||
|
endif # CIRCUITPY_NETWORK
|
||||||
|
|
||||||
|
ifeq ($(CIRCUITPY_NETWORK),1)
|
||||||
|
ifneq ($(MICROPY_PY_WIZNET5K),0)
|
||||||
|
SRC_SHARED_MODULE += wiznet/__init__.c wiznet/wiznet5k.c
|
||||||
|
endif
|
||||||
|
endif
|
||||||
|
|
||||||
SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \
|
SRC_COMMON_HAL_EXPANDED = $(addprefix shared-bindings/, $(SRC_COMMON_HAL)) \
|
||||||
$(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \
|
$(addprefix shared-bindings/, $(SRC_BINDINGS_ENUMS)) \
|
||||||
$(addprefix common-hal/, $(SRC_COMMON_HAL))
|
$(addprefix common-hal/, $(SRC_COMMON_HAL))
|
||||||
|
|||||||
@ -145,6 +145,9 @@ void SD_EVT_IRQHandler(void) {
|
|||||||
ble_drv_evt_handler_entry_t *it = MP_STATE_VM(ble_drv_evt_handler_entries);
|
ble_drv_evt_handler_entry_t *it = MP_STATE_VM(ble_drv_evt_handler_entries);
|
||||||
bool done = false;
|
bool done = false;
|
||||||
while (it != NULL) {
|
while (it != NULL) {
|
||||||
|
#if CIRCUITPY_VERBOSE_BLE
|
||||||
|
// mp_printf(&mp_plat_print, " calling handler: 0x%08lx, param: 0x%08lx\n", it->func-1, it->param);
|
||||||
|
#endif
|
||||||
done = it->func(event, it->param) || done;
|
done = it->func(event, it->param) || done;
|
||||||
it = it->next;
|
it = it->next;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -8,3 +8,7 @@ MCU_CHIP = nrf52840
|
|||||||
QSPI_FLASH_FILESYSTEM = 1
|
QSPI_FLASH_FILESYSTEM = 1
|
||||||
EXTERNAL_FLASH_DEVICE_COUNT = 1
|
EXTERNAL_FLASH_DEVICE_COUNT = 1
|
||||||
EXTERNAL_FLASH_DEVICES = "MX25L3233F"
|
EXTERNAL_FLASH_DEVICES = "MX25L3233F"
|
||||||
|
|
||||||
|
# Support for the Ethernet FeatherWing
|
||||||
|
CIRCUITPY_NETWORK = 1
|
||||||
|
MICROPY_PY_WIZNET5K = 5500
|
||||||
@ -8,3 +8,7 @@ MCU_CHIP = nrf52840
|
|||||||
QSPI_FLASH_FILESYSTEM = 1
|
QSPI_FLASH_FILESYSTEM = 1
|
||||||
EXTERNAL_FLASH_DEVICE_COUNT = 1
|
EXTERNAL_FLASH_DEVICE_COUNT = 1
|
||||||
EXTERNAL_FLASH_DEVICES = "MX25L3233F"
|
EXTERNAL_FLASH_DEVICES = "MX25L3233F"
|
||||||
|
|
||||||
|
# Support for the Ethernet FeatherWing
|
||||||
|
CIRCUITPY_NETWORK = 1
|
||||||
|
MICROPY_PY_WIZNET5K = 5500
|
||||||
@ -8,3 +8,7 @@ MCU_CHIP = nrf52840
|
|||||||
QSPI_FLASH_FILESYSTEM = 1
|
QSPI_FLASH_FILESYSTEM = 1
|
||||||
EXTERNAL_FLASH_DEVICE_COUNT = 1
|
EXTERNAL_FLASH_DEVICE_COUNT = 1
|
||||||
EXTERNAL_FLASH_DEVICES = "MX25L3233F"
|
EXTERNAL_FLASH_DEVICES = "MX25L3233F"
|
||||||
|
|
||||||
|
# Support for the Ethernet FeatherWing
|
||||||
|
CIRCUITPY_NETWORK = 1
|
||||||
|
MICROPY_PY_WIZNET5K = 5500
|
||||||
@ -437,6 +437,7 @@ mp_obj_t common_hal_bleio_adapter_start_scan(bleio_adapter_obj_t *self, uint8_t*
|
|||||||
.active = active
|
.active = active
|
||||||
};
|
};
|
||||||
uint32_t err_code;
|
uint32_t err_code;
|
||||||
|
vm_used_ble = true;
|
||||||
err_code = sd_ble_gap_scan_start(&scan_params, sd_data);
|
err_code = sd_ble_gap_scan_start(&scan_params, sd_data);
|
||||||
|
|
||||||
if (err_code != NRF_SUCCESS) {
|
if (err_code != NRF_SUCCESS) {
|
||||||
@ -511,6 +512,7 @@ mp_obj_t common_hal_bleio_adapter_connect(bleio_adapter_obj_t *self, bleio_addre
|
|||||||
ble_drv_add_event_handler(connect_on_ble_evt, &event_info);
|
ble_drv_add_event_handler(connect_on_ble_evt, &event_info);
|
||||||
event_info.done = false;
|
event_info.done = false;
|
||||||
|
|
||||||
|
vm_used_ble = true;
|
||||||
uint32_t err_code = sd_ble_gap_connect(&addr, &scan_params, &conn_params, BLE_CONN_CFG_TAG_CUSTOM);
|
uint32_t err_code = sd_ble_gap_connect(&addr, &scan_params, &conn_params, BLE_CONN_CFG_TAG_CUSTOM);
|
||||||
|
|
||||||
if (err_code != NRF_SUCCESS) {
|
if (err_code != NRF_SUCCESS) {
|
||||||
@ -615,6 +617,7 @@ uint32_t _common_hal_bleio_adapter_start_advertising(bleio_adapter_obj_t *self,
|
|||||||
return err_code;
|
return err_code;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
vm_used_ble = true;
|
||||||
err_code = sd_ble_gap_adv_start(adv_handle, BLE_CONN_CFG_TAG_CUSTOM);
|
err_code = sd_ble_gap_adv_start(adv_handle, BLE_CONN_CFG_TAG_CUSTOM);
|
||||||
if (err_code != NRF_SUCCESS) {
|
if (err_code != NRF_SUCCESS) {
|
||||||
return err_code;
|
return err_code;
|
||||||
@ -709,6 +712,11 @@ void bleio_adapter_reset(bleio_adapter_obj_t* adapter) {
|
|||||||
adapter->connection_objs = NULL;
|
adapter->connection_objs = NULL;
|
||||||
for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) {
|
for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) {
|
||||||
bleio_connection_internal_t *connection = &bleio_connections[i];
|
bleio_connection_internal_t *connection = &bleio_connections[i];
|
||||||
|
// Disconnect all connections with Python state cleanly. Keep any supervisor-only connections.
|
||||||
|
if (connection->connection_obj != mp_const_none &&
|
||||||
|
connection->conn_handle != BLE_CONN_HANDLE_INVALID) {
|
||||||
|
common_hal_bleio_connection_disconnect(connection);
|
||||||
|
}
|
||||||
connection->connection_obj = mp_const_none;
|
connection->connection_obj = mp_const_none;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@ -91,13 +91,14 @@ void check_sec_status(uint8_t sec_status) {
|
|||||||
void bleio_reset() {
|
void bleio_reset() {
|
||||||
bleio_adapter_reset(&common_hal_bleio_adapter_obj);
|
bleio_adapter_reset(&common_hal_bleio_adapter_obj);
|
||||||
if (!vm_used_ble) {
|
if (!vm_used_ble) {
|
||||||
|
// No user-code BLE operations were done, so we can maintain the supervisor state.
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
if (common_hal_bleio_adapter_get_enabled(&common_hal_bleio_adapter_obj)) {
|
if (common_hal_bleio_adapter_get_enabled(&common_hal_bleio_adapter_obj)) {
|
||||||
common_hal_bleio_adapter_set_enabled(&common_hal_bleio_adapter_obj, false);
|
common_hal_bleio_adapter_set_enabled(&common_hal_bleio_adapter_obj, false);
|
||||||
}
|
}
|
||||||
supervisor_start_bluetooth();
|
|
||||||
bonding_reset();
|
bonding_reset();
|
||||||
|
supervisor_start_bluetooth();
|
||||||
}
|
}
|
||||||
|
|
||||||
// The singleton _bleio.Adapter object, bound to _bleio.adapter
|
// The singleton _bleio.Adapter object, bound to _bleio.adapter
|
||||||
@ -195,14 +196,17 @@ size_t common_hal_bleio_gattc_read(uint16_t handle, uint16_t conn_handle, uint8_
|
|||||||
while (nrf_error == NRF_ERROR_BUSY) {
|
while (nrf_error == NRF_ERROR_BUSY) {
|
||||||
nrf_error = sd_ble_gattc_read(conn_handle, handle, 0);
|
nrf_error = sd_ble_gattc_read(conn_handle, handle, 0);
|
||||||
}
|
}
|
||||||
check_nrf_error(nrf_error);
|
if (nrf_error != NRF_SUCCESS) {
|
||||||
|
ble_drv_remove_event_handler(_on_gattc_read_rsp_evt, &read_info);
|
||||||
|
check_nrf_error(nrf_error);
|
||||||
|
}
|
||||||
|
|
||||||
while (!read_info.done) {
|
while (!read_info.done) {
|
||||||
RUN_BACKGROUND_TASKS;
|
RUN_BACKGROUND_TASKS;
|
||||||
}
|
}
|
||||||
check_gatt_status(read_info.status);
|
|
||||||
|
|
||||||
ble_drv_remove_event_handler(_on_gattc_read_rsp_evt, &read_info);
|
ble_drv_remove_event_handler(_on_gattc_read_rsp_evt, &read_info);
|
||||||
|
check_gatt_status(read_info.status);
|
||||||
return read_info.final_len;
|
return read_info.final_len;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -267,14 +267,15 @@ void bonding_background(void) {
|
|||||||
for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) {
|
for (size_t i = 0; i < BLEIO_TOTAL_CONNECTION_COUNT; i++) {
|
||||||
bleio_connection_internal_t *connection = &bleio_connections[i];
|
bleio_connection_internal_t *connection = &bleio_connections[i];
|
||||||
|
|
||||||
uint64_t current_ticks_ms = supervisor_ticks_ms64();
|
|
||||||
// Wait at least one second before saving CCCD, to consolidate
|
// Wait at least one second before saving CCCD, to consolidate
|
||||||
// writes that involve multiple CCCDs. For instance, for HID,
|
// writes that involve multiple CCCDs. For instance, for HID,
|
||||||
// three CCCD's are set in short succession by the HID client.
|
// three CCCD's are set in short succession by the HID client.
|
||||||
if (connection->do_bond_cccds &&
|
if (connection->do_bond_cccds) {
|
||||||
current_ticks_ms - connection->do_bond_cccds_request_time >= 1000) {
|
uint64_t current_ticks_ms = supervisor_ticks_ms64();
|
||||||
write_sys_attr_block(connection);
|
if (current_ticks_ms - connection->do_bond_cccds_request_time >= 1000) {
|
||||||
connection->do_bond_cccds = false;
|
write_sys_attr_block(connection);
|
||||||
|
connection->do_bond_cccds = false;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
if (connection->do_bond_keys) {
|
if (connection->do_bond_keys) {
|
||||||
|
|||||||
@ -37,8 +37,10 @@
|
|||||||
#include "shared-bindings/microcontroller/Processor.h"
|
#include "shared-bindings/microcontroller/Processor.h"
|
||||||
|
|
||||||
#include "supervisor/filesystem.h"
|
#include "supervisor/filesystem.h"
|
||||||
|
#include "supervisor/port.h"
|
||||||
#include "supervisor/shared/safe_mode.h"
|
#include "supervisor/shared/safe_mode.h"
|
||||||
#include "nrfx_glue.h"
|
#include "nrfx_glue.h"
|
||||||
|
#include "nrf_nvic.h"
|
||||||
|
|
||||||
// This routine should work even when interrupts are disabled. Used by OneWire
|
// This routine should work even when interrupts are disabled. Used by OneWire
|
||||||
// for precise timing.
|
// for precise timing.
|
||||||
@ -46,10 +48,38 @@ void common_hal_mcu_delay_us(uint32_t delay) {
|
|||||||
NRFX_DELAY_US(delay);
|
NRFX_DELAY_US(delay);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static volatile uint32_t nesting_count = 0;
|
||||||
|
static uint8_t is_nested_critical_region;
|
||||||
|
static uint8_t sd_is_enabled = false;
|
||||||
void common_hal_mcu_disable_interrupts() {
|
void common_hal_mcu_disable_interrupts() {
|
||||||
|
sd_softdevice_is_enabled(&sd_is_enabled);
|
||||||
|
if (sd_is_enabled) {
|
||||||
|
sd_nvic_critical_region_enter(&is_nested_critical_region);
|
||||||
|
} else {
|
||||||
|
__disable_irq();
|
||||||
|
__DMB();
|
||||||
|
nesting_count++;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void common_hal_mcu_enable_interrupts() {
|
void common_hal_mcu_enable_interrupts() {
|
||||||
|
// Don't check here if SD is enabled, because we'll crash if interrupts
|
||||||
|
// were turned off and sd_softdevice_is_enabled is called.
|
||||||
|
if (sd_is_enabled) {
|
||||||
|
sd_nvic_critical_region_exit(is_nested_critical_region);
|
||||||
|
} else {
|
||||||
|
if (nesting_count == 0) {
|
||||||
|
// This is very very bad because it means there was mismatched disable/enables so we
|
||||||
|
// crash.
|
||||||
|
reset_into_safe_mode(HARD_CRASH);
|
||||||
|
}
|
||||||
|
nesting_count--;
|
||||||
|
if (nesting_count > 0) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
__DMB();
|
||||||
|
__enable_irq();
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) {
|
void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) {
|
||||||
|
|||||||
@ -92,9 +92,6 @@ safe_mode_t port_init(void) {
|
|||||||
rtc_init();
|
rtc_init();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
// Will do usb_init() if chip supports USB.
|
|
||||||
board_init();
|
|
||||||
|
|
||||||
return NO_SAFE_MODE;
|
return NO_SAFE_MODE;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -22,7 +22,7 @@
|
|||||||
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
# THE SOFTWARE.
|
# THE SOFTWARE.
|
||||||
DEBUG = 1
|
# DEBUG = 1
|
||||||
|
|
||||||
# Select the board to build for.
|
# Select the board to build for.
|
||||||
ifeq ($(BOARD),)
|
ifeq ($(BOARD),)
|
||||||
@ -85,10 +85,15 @@ ifeq ($(DEBUG), 1)
|
|||||||
CFLAGS += -fno-inline -fno-ipa-sra
|
CFLAGS += -fno-inline -fno-ipa-sra
|
||||||
else
|
else
|
||||||
CFLAGS += -Os -DNDEBUG
|
CFLAGS += -Os -DNDEBUG
|
||||||
|
CFLAGS += -ggdb
|
||||||
# TODO: Test with -flto
|
# TODO: Test with -flto
|
||||||
### CFLAGS += -flto
|
### CFLAGS += -flto
|
||||||
endif
|
endif
|
||||||
|
|
||||||
|
ifndef BOOTLOADER_OFFSET
|
||||||
|
BOOTLOADER_OFFSET := 0x8000000
|
||||||
|
endif
|
||||||
|
|
||||||
C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU)
|
C_DEFS = -DMCU_PACKAGE=$(MCU_PACKAGE) -DUSE_HAL_DRIVER -DUSE_FULL_LL_DRIVER -D$(CMSIS_MCU)
|
||||||
|
|
||||||
CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
|
CFLAGS += $(INC) -Werror -Wall -std=gnu11 -nostdlib $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
|
||||||
@ -256,7 +261,7 @@ $(BUILD)/firmware.hex: $(BUILD)/firmware.elf
|
|||||||
|
|
||||||
$(BUILD)/firmware.uf2: $(BUILD)/firmware.hex
|
$(BUILD)/firmware.uf2: $(BUILD)/firmware.hex
|
||||||
$(ECHO) "Create $@"
|
$(ECHO) "Create $@"
|
||||||
$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0xADA52840 -c -o "$(BUILD)/firmware.uf2" $^
|
$(PYTHON3) $(TOP)/tools/uf2/utils/uf2conv.py -f 0x57755a57 -b $(BOOTLOADER_OFFSET) -c -o "$(BUILD)/firmware.uf2" $^
|
||||||
|
|
||||||
include $(TOP)/py/mkrules.mk
|
include $(TOP)/py/mkrules.mk
|
||||||
|
|
||||||
|
|||||||
132
ports/stm32f4/boards/STM32F401.ld
Normal file
132
ports/stm32f4/boards/STM32F401.ld
Normal file
@ -0,0 +1,132 @@
|
|||||||
|
/*
|
||||||
|
GNU linker script for STM32F401 with bootloader (from Meowbit Micropython)
|
||||||
|
Doesn't work:
|
||||||
|
|
||||||
|
Traceback (most recent call last):
|
||||||
|
File "../../tools/build_memory_info.py", line 64, in <module>
|
||||||
|
regions[region] = int(eval(space))
|
||||||
|
File "<string>", line 1, in <module>
|
||||||
|
NameError: name 'FLASH_ISR' is not defined
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Specify the memory areas */
|
||||||
|
/* FLASH_FS (rx) : ORIGIN = 0x08020000, LENGTH = 128K */
|
||||||
|
/* sectors 5 128K */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */
|
||||||
|
FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K /* sector 4, sec 0~3 reserved for booloader */
|
||||||
|
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sectors 5, 6,7 are 128K */
|
||||||
|
RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
|
||||||
|
}
|
||||||
|
|
||||||
|
/* produce a link error if there is not this amount of RAM for these sections */
|
||||||
|
_minimum_stack_size = 2K;
|
||||||
|
_minimum_heap_size = 16K;
|
||||||
|
|
||||||
|
/* Define the stack. The stack is full descending so begins just above last byte
|
||||||
|
of RAM. Note that EABI requires the stack to be 8-byte aligned for a call. */
|
||||||
|
_estack = ORIGIN(RAM) + LENGTH(RAM) - _estack_reserve;
|
||||||
|
_sstack = _estack - 16K; /* tunable */
|
||||||
|
|
||||||
|
/* RAM extents for the garbage collector */
|
||||||
|
_ram_start = ORIGIN(RAM);
|
||||||
|
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
|
_heap_start = _ebss; /* heap starts just after statically allocated memory */
|
||||||
|
_heap_end = _sstack;
|
||||||
|
|
||||||
|
ENTRY(Reset_Handler)
|
||||||
|
|
||||||
|
/* define output sections */
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
/* The startup code goes first into FLASH */
|
||||||
|
.isr_vector :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
KEEP(*(.isr_vector)) /* Startup code */
|
||||||
|
|
||||||
|
/* This first flash block is 16K annd the isr vectors only take up
|
||||||
|
about 400 bytes. So we pull in a couple of object files to pad it
|
||||||
|
out. */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
|
||||||
|
/* NOTE: If you update the list of files contained in .isr_vector,
|
||||||
|
then be sure to also update smhal/Makefile where it forcibly
|
||||||
|
builds each of these files with -Os */
|
||||||
|
|
||||||
|
*/ff.o(.text*)
|
||||||
|
*/vfs_fat_*.o(.text*)
|
||||||
|
*/py/formatfloat.o(.text*)
|
||||||
|
*/py/parsenum.o(.text*)
|
||||||
|
*/py/mpprint.o(.text*)
|
||||||
|
|
||||||
|
*/py/compile.o(.text*)
|
||||||
|
*/py/objset.o(.text*)
|
||||||
|
*/py/mpz.o(.text*)
|
||||||
|
*/py/vm.o(.text*)
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >FLASH_ISR
|
||||||
|
|
||||||
|
/* The program code and other data goes into FLASH */
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.text*) /* .text* sections (code) */
|
||||||
|
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||||
|
/* *(.glue_7) */ /* glue arm to thumb code */
|
||||||
|
/* *(.glue_7t) */ /* glue thumb to arm code */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_etext = .; /* define a global symbol at end of code */
|
||||||
|
} >FLASH_TEXT
|
||||||
|
|
||||||
|
/* used by the startup to initialize data */
|
||||||
|
_sidata = LOADADDR(.data);
|
||||||
|
|
||||||
|
/* This is the initialized data section
|
||||||
|
The program executes knowing that the data is in the RAM
|
||||||
|
but the loader puts the initial values in the FLASH (inidata).
|
||||||
|
It is one task of the startup to copy the initial values from FLASH to RAM. */
|
||||||
|
.data :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
|
||||||
|
*(.data*) /* .data* sections */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
|
||||||
|
} >RAM AT> FLASH_TEXT
|
||||||
|
|
||||||
|
/* Uninitialized data section */
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sbss = .; /* define a global symbol at bss start; used by startup code */
|
||||||
|
*(.bss*)
|
||||||
|
*(COMMON)
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
/* this is to define the start of the heap, and make sure we have a minimum size */
|
||||||
|
.heap :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
. = . + _minimum_heap_size;
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
/* this just checks there is enough RAM for the stack */
|
||||||
|
.stack :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
. = . + _minimum_stack_size;
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||||
|
}
|
||||||
106
ports/stm32f4/boards/STM32F401_boot.ld
Normal file
106
ports/stm32f4/boards/STM32F401_boot.ld
Normal file
@ -0,0 +1,106 @@
|
|||||||
|
/*
|
||||||
|
GNU linker script for STM32F401 with bootloader (such as the Meowbit)
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Specify the memory areas */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
FLASH (rx) : ORIGIN = 0x08010000, LENGTH = 512K - 64K /* entire flash */
|
||||||
|
FLASH_ISR (rx) : ORIGIN = 0x08010000, LENGTH = 64K
|
||||||
|
FLASH_TEXT (rx) : ORIGIN = 0x08020000, LENGTH = 384K /* sector 4 is 64K, sectors 5,6,7 are 128K */
|
||||||
|
RAM (xrw) : ORIGIN = 0x20000194, LENGTH = 96K - 0x194
|
||||||
|
}
|
||||||
|
|
||||||
|
/* produce a link error if there is not this amount of RAM for these sections */
|
||||||
|
_minimum_stack_size = 2K;
|
||||||
|
_minimum_heap_size = 16K;
|
||||||
|
|
||||||
|
/* Define tho top end of the stack. The stack is full descending so begins just
|
||||||
|
above last byte of RAM. Note that EABI requires the stack to be 8-byte
|
||||||
|
aligned for a call. */
|
||||||
|
_estack = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
|
|
||||||
|
/* RAM extents for the garbage collector */
|
||||||
|
_ram_start = ORIGIN(RAM);
|
||||||
|
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
|
|
||||||
|
ENTRY(Reset_Handler)
|
||||||
|
|
||||||
|
/* define output sections */
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
/* The startup code goes first into FLASH */
|
||||||
|
.isr_vector :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
KEEP(*(.isr_vector)) /* Startup code */
|
||||||
|
|
||||||
|
/* This first flash block is 16K annd the isr vectors only take up
|
||||||
|
about 400 bytes. Micropython pads this with files, but this didn't
|
||||||
|
work with the size of Circuitpython's ff object. */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >FLASH_ISR
|
||||||
|
|
||||||
|
/* The program code and other data goes into FLASH */
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.text*) /* .text* sections (code) */
|
||||||
|
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||||
|
/* *(.glue_7) */ /* glue arm to thumb code */
|
||||||
|
/* *(.glue_7t) */ /* glue thumb to arm code */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_etext = .; /* define a global symbol at end of code */
|
||||||
|
} >FLASH_TEXT
|
||||||
|
|
||||||
|
/* used by the startup to initialize data */
|
||||||
|
_sidata = LOADADDR(.data);
|
||||||
|
|
||||||
|
/* This is the initialized data section
|
||||||
|
The program executes knowing that the data is in the RAM
|
||||||
|
but the loader puts the initial values in the FLASH (inidata).
|
||||||
|
It is one task of the startup to copy the initial values from FLASH to RAM. */
|
||||||
|
.data :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
|
||||||
|
*(.data*) /* .data* sections */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
|
||||||
|
} >RAM AT> FLASH_TEXT
|
||||||
|
|
||||||
|
/* Uninitialized data section */
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sbss = .; /* define a global symbol at bss start; used by startup code */
|
||||||
|
*(.bss*)
|
||||||
|
*(COMMON)
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
/* this is to define the start of the heap, and make sure we have a minimum size */
|
||||||
|
.heap :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
. = . + _minimum_heap_size;
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
/* this just checks there is enough RAM for the stack */
|
||||||
|
.stack :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
. = . + _minimum_stack_size;
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
107
ports/stm32f4/boards/STM32F401_fs.ld
Normal file
107
ports/stm32f4/boards/STM32F401_fs.ld
Normal file
@ -0,0 +1,107 @@
|
|||||||
|
/*
|
||||||
|
GNU linker script for STM32F401 with bootloader (such as the Meowbit)
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Specify the memory areas */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K /* entire flash */
|
||||||
|
FLASH_ISR (rx) : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
|
||||||
|
FLASH_FS (rx) : ORIGIN = 0x08004000, LENGTH = 48K /* sectors 1,2,3 are 16K */
|
||||||
|
FLASH_TEXT (rx) : ORIGIN = 0x08010000, LENGTH = 448K /* sector 4 is 64K, sectors 5,6,7 are 128K */
|
||||||
|
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K
|
||||||
|
}
|
||||||
|
|
||||||
|
/* produce a link error if there is not this amount of RAM for these sections */
|
||||||
|
_minimum_stack_size = 2K;
|
||||||
|
_minimum_heap_size = 16K;
|
||||||
|
|
||||||
|
/* Define tho top end of the stack. The stack is full descending so begins just
|
||||||
|
above last byte of RAM. Note that EABI requires the stack to be 8-byte
|
||||||
|
aligned for a call. */
|
||||||
|
_estack = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
|
|
||||||
|
/* RAM extents for the garbage collector */
|
||||||
|
_ram_start = ORIGIN(RAM);
|
||||||
|
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
|
||||||
|
|
||||||
|
ENTRY(Reset_Handler)
|
||||||
|
|
||||||
|
/* define output sections */
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
/* The startup code goes first into FLASH */
|
||||||
|
.isr_vector :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
KEEP(*(.isr_vector)) /* Startup code */
|
||||||
|
|
||||||
|
/* This first flash block is 16K annd the isr vectors only take up
|
||||||
|
about 400 bytes. Micropython pads this with files, but this didn't
|
||||||
|
work with the size of Circuitpython's ff object. */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >FLASH_ISR
|
||||||
|
|
||||||
|
/* The program code and other data goes into FLASH */
|
||||||
|
.text :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
*(.text*) /* .text* sections (code) */
|
||||||
|
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
|
||||||
|
/* *(.glue_7) */ /* glue arm to thumb code */
|
||||||
|
/* *(.glue_7t) */ /* glue thumb to arm code */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_etext = .; /* define a global symbol at end of code */
|
||||||
|
} >FLASH_TEXT
|
||||||
|
|
||||||
|
/* used by the startup to initialize data */
|
||||||
|
_sidata = LOADADDR(.data);
|
||||||
|
|
||||||
|
/* This is the initialized data section
|
||||||
|
The program executes knowing that the data is in the RAM
|
||||||
|
but the loader puts the initial values in the FLASH (inidata).
|
||||||
|
It is one task of the startup to copy the initial values from FLASH to RAM. */
|
||||||
|
.data :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sdata = .; /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
|
||||||
|
*(.data*) /* .data* sections */
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_edata = .; /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
|
||||||
|
} >RAM AT> FLASH_TEXT
|
||||||
|
|
||||||
|
/* Uninitialized data section */
|
||||||
|
.bss :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
_sbss = .; /* define a global symbol at bss start; used by startup code */
|
||||||
|
*(.bss*)
|
||||||
|
*(COMMON)
|
||||||
|
|
||||||
|
. = ALIGN(4);
|
||||||
|
_ebss = .; /* define a global symbol at bss end; used by startup code and GC */
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
/* this is to define the start of the heap, and make sure we have a minimum size */
|
||||||
|
.heap :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
. = . + _minimum_heap_size;
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
/* this just checks there is enough RAM for the stack */
|
||||||
|
.stack :
|
||||||
|
{
|
||||||
|
. = ALIGN(4);
|
||||||
|
. = . + _minimum_stack_size;
|
||||||
|
. = ALIGN(4);
|
||||||
|
} >RAM
|
||||||
|
|
||||||
|
.ARM.attributes 0 : { *(.ARM.attributes) }
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
121
ports/stm32f4/boards/meowbit_v121/board.c
Normal file
121
ports/stm32f4/boards/meowbit_v121/board.c
Normal file
@ -0,0 +1,121 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the MicroPython project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "boards/board.h"
|
||||||
|
#include "mpconfigboard.h"
|
||||||
|
|
||||||
|
#include "shared-bindings/board/__init__.h"
|
||||||
|
#include "shared-bindings/displayio/FourWire.h"
|
||||||
|
#include "shared-module/displayio/__init__.h"
|
||||||
|
#include "shared-module/displayio/mipi_constants.h"
|
||||||
|
#include "shared-bindings/busio/SPI.h"
|
||||||
|
|
||||||
|
#include "supervisor/spi_flash_api.h"
|
||||||
|
|
||||||
|
#include "tick.h"
|
||||||
|
|
||||||
|
displayio_fourwire_obj_t board_display_obj;
|
||||||
|
|
||||||
|
#define DELAY 0x80
|
||||||
|
|
||||||
|
uint8_t display_init_sequence[] = {
|
||||||
|
0x01, 0 | DELAY, 150, // SWRESET
|
||||||
|
0x11, 0 | DELAY, 255, // SLPOUT
|
||||||
|
0xb1, 3, 0x01, 0x2C, 0x2D, // _FRMCTR1
|
||||||
|
0xb2, 3, 0x01, 0x2C, 0x2D, //
|
||||||
|
0xb3, 6, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D,
|
||||||
|
0xb4, 1, 0x07, // _INVCTR line inversion
|
||||||
|
0xc0, 3, 0xa2, 0x02, 0x84, // _PWCTR1 GVDD = 4.7V, 1.0uA
|
||||||
|
0xc1, 1, 0xc5, // _PWCTR2 VGH=14.7V, VGL=-7.35V
|
||||||
|
0xc2, 2, 0x0a, 0x00, // _PWCTR3 Opamp current small, Boost frequency
|
||||||
|
0xc3, 2, 0x8a, 0x2a,
|
||||||
|
0xc4, 2, 0x8a, 0xee,
|
||||||
|
0xc5, 1, 0x0e, // _VMCTR1 VCOMH = 4V, VOML = -1.1V
|
||||||
|
0x20, 0, // _INVOFF //MISMATCh 0x2a vs 0x20
|
||||||
|
0x36, 1, 0x18, // _MADCTL bottom to top refresh
|
||||||
|
// 1 clk cycle nonoverlap, 2 cycle gate rise, 3 sycle osc equalie,
|
||||||
|
// fix on VTL
|
||||||
|
0x3a, 1, 0x05, // COLMOD - 16bit color
|
||||||
|
0xe0, 0x10, 0x02, 0x1c, 0x07, 0x12,
|
||||||
|
0x37, 0x32, 0x29, 0x2d,
|
||||||
|
0x29, 0x25, 0x2B, 0x39,
|
||||||
|
0x00, 0x01, 0x03, 0x10, // _GMCTRP1 Gamma
|
||||||
|
0xe1, 0x10, 0x03, 0x1d, 0x07, 0x06,
|
||||||
|
0x2E, 0x2C, 0x29, 0x2D,
|
||||||
|
0x2E, 0x2E, 0x37, 0x3F,
|
||||||
|
0x00, 0x00, 0x02, 0x10, // _GMCTRN1
|
||||||
|
0x13, 0 | DELAY, 10, // _NORON
|
||||||
|
0x29, 0 | DELAY, 100, // _DISPON
|
||||||
|
};
|
||||||
|
|
||||||
|
void board_init(void) {
|
||||||
|
displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;
|
||||||
|
bus->base.type = &displayio_fourwire_type;
|
||||||
|
busio_spi_obj_t *internal_spi = &supervisor_flash_spi_bus;
|
||||||
|
common_hal_displayio_fourwire_construct(bus,
|
||||||
|
internal_spi,
|
||||||
|
&pin_PA08, // Command or data
|
||||||
|
&pin_PB12, // Chip select
|
||||||
|
&pin_PB10, // Reset
|
||||||
|
24000000);
|
||||||
|
|
||||||
|
displayio_display_obj_t* display = &displays[0].display;
|
||||||
|
display->base.type = &displayio_display_type;
|
||||||
|
common_hal_displayio_display_construct(display,
|
||||||
|
bus,
|
||||||
|
160, // Width
|
||||||
|
128, // Height
|
||||||
|
0, // column start
|
||||||
|
0, // row start
|
||||||
|
90, // rotation
|
||||||
|
16, // Color depth
|
||||||
|
false, // Grayscale
|
||||||
|
false, // Pixels in a byte share a row. Only used for depth < 8
|
||||||
|
1, // bytes per cell. Only valid for depths < 8
|
||||||
|
false, // reverse_pixels_in_byte. Only valid for depths < 8
|
||||||
|
MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command
|
||||||
|
MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command
|
||||||
|
MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command
|
||||||
|
0x37, // set vertical scroll command
|
||||||
|
display_init_sequence,
|
||||||
|
sizeof(display_init_sequence),
|
||||||
|
&pin_PB03,
|
||||||
|
NO_BRIGHTNESS_COMMAND,
|
||||||
|
1.0f, // brightness (ignored)
|
||||||
|
true, // auto_brightness
|
||||||
|
false, // single_byte_bounds
|
||||||
|
false, // data_as_commands
|
||||||
|
true, // auto_refresh
|
||||||
|
60); // native_frames_per_second
|
||||||
|
}
|
||||||
|
|
||||||
|
bool board_requests_safe_mode(void) {
|
||||||
|
return false;
|
||||||
|
}
|
||||||
|
|
||||||
|
void reset_board(void) {
|
||||||
|
|
||||||
|
}
|
||||||
47
ports/stm32f4/boards/meowbit_v121/mpconfigboard.h
Normal file
47
ports/stm32f4/boards/meowbit_v121/mpconfigboard.h
Normal file
@ -0,0 +1,47 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the MicroPython project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
//Micropython setup
|
||||||
|
|
||||||
|
#define MICROPY_HW_BOARD_NAME "MEOWBIT"
|
||||||
|
#define MICROPY_HW_MCU_NAME "STM32F401xE"
|
||||||
|
|
||||||
|
#define FLASH_SIZE (0x80000)
|
||||||
|
#define FLASH_PAGE_SIZE (0x4000)
|
||||||
|
|
||||||
|
#define AUTORESET_DELAY_MS 500
|
||||||
|
#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)
|
||||||
|
|
||||||
|
#define BOARD_OSC_DIV 12
|
||||||
|
#define BOARD_NO_VBUS_SENSE
|
||||||
|
#define BOARD_VTOR_DEFER //Leave VTOR relocation to bootloader
|
||||||
|
#define BOARD_USE_INTERNAL_SPI
|
||||||
|
|
||||||
|
// On-board flash
|
||||||
|
#define SPI_FLASH_MOSI_PIN (&pin_PB15)
|
||||||
|
#define SPI_FLASH_MISO_PIN (&pin_PB14)
|
||||||
|
#define SPI_FLASH_SCK_PIN (&pin_PB13)
|
||||||
|
#define SPI_FLASH_CS_PIN (&pin_PB01)
|
||||||
23
ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk
Normal file
23
ports/stm32f4/boards/meowbit_v121/mpconfigboard.mk
Normal file
@ -0,0 +1,23 @@
|
|||||||
|
USB_VID = 0x239A
|
||||||
|
USB_PID = 0x805A
|
||||||
|
USB_PRODUCT = "Meowbit"
|
||||||
|
USB_MANUFACTURER = "Kittenbot"
|
||||||
|
USB_DEVICES = "CDC,MSC"
|
||||||
|
|
||||||
|
SPI_FLASH_FILESYSTEM = 1
|
||||||
|
EXTERNAL_FLASH_DEVICE_COUNT = 1
|
||||||
|
EXTERNAL_FLASH_DEVICES = W25Q16JV_IQ
|
||||||
|
LONGINT_IMPL = MPZ
|
||||||
|
|
||||||
|
BOOTLOADER_OFFSET = 0x8010000
|
||||||
|
|
||||||
|
# INTERNAL_FLASH_FILESYSTEM = 1
|
||||||
|
# LONGINT_IMPL = NONE
|
||||||
|
|
||||||
|
MCU_SERIES = m4
|
||||||
|
MCU_VARIANT = stm32f4
|
||||||
|
MCU_SUB_VARIANT = stm32f401xe
|
||||||
|
MCU_PACKAGE = 64
|
||||||
|
CMSIS_MCU = STM32F401xE
|
||||||
|
LD_FILE = boards/STM32F401_boot.ld
|
||||||
|
# LD_FILE = boards/STM32F401_fs.ld #use for internal flash
|
||||||
68
ports/stm32f4/boards/meowbit_v121/pins.c
Normal file
68
ports/stm32f4/boards/meowbit_v121/pins.c
Normal file
@ -0,0 +1,68 @@
|
|||||||
|
#include "shared-bindings/board/__init__.h"
|
||||||
|
#include "supervisor/spi_flash_api.h"
|
||||||
|
|
||||||
|
#include "shared-module/displayio/__init__.h"
|
||||||
|
|
||||||
|
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PB04) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PB05) },
|
||||||
|
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_DISP_SCK), MP_ROM_PTR(&pin_PB13) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_DISP_MISO), MP_ROM_PTR(&pin_PB14) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_DISP_MOSI), MP_ROM_PTR(&pin_PB15) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_DISP_CS), MP_ROM_PTR(&pin_PB12) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_DISP_DC), MP_ROM_PTR(&pin_PA08) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_DISP_RST), MP_ROM_PTR(&pin_PB10) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_DISP_BL), MP_ROM_PTR(&pin_PB03) },
|
||||||
|
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_BUZZ), MP_ROM_PTR(&pin_PB08) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_BTNA), MP_ROM_PTR(&pin_PB09) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_BTNB), MP_ROM_PTR(&pin_PC03) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_RIGHT), MP_ROM_PTR(&pin_PB02) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_DOWN), MP_ROM_PTR(&pin_PA05) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_LEFT), MP_ROM_PTR(&pin_PA07) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_TEMP), MP_ROM_PTR(&pin_PC05) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_UP), MP_ROM_PTR(&pin_PA06) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_LIGHT), MP_ROM_PTR(&pin_PC02) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_MENU), MP_ROM_PTR(&pin_PC15) },
|
||||||
|
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_JACK_TX), MP_ROM_PTR(&pin_PA09) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_JACK_PWREN), MP_ROM_PTR(&pin_PA07) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_JACK_SND), MP_ROM_PTR(&pin_PB08) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_ACC_INT), MP_ROM_PTR(&pin_PC14) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_ACC_SCL), MP_ROM_PTR(&pin_PB06) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_ACC_SDA), MP_ROM_PTR(&pin_PB07) },
|
||||||
|
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) },
|
||||||
|
// { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PC06) }, //these are wrong on Meowbit diagram.
|
||||||
|
// { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PA03) }, //they cannot be used together (UART2 vs 6)
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_NSS), MP_ROM_PTR(&pin_PA15) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PC12) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PC11) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PC10) },
|
||||||
|
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P20), MP_ROM_PTR(&pin_PB07) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P19), MP_ROM_PTR(&pin_PB06) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P16), MP_ROM_PTR(&pin_PA15) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P15), MP_ROM_PTR(&pin_PC12) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P14), MP_ROM_PTR(&pin_PC11) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P13), MP_ROM_PTR(&pin_PC10) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P2), MP_ROM_PTR(&pin_PA02) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P12), MP_ROM_PTR(&pin_PA03) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P11), MP_ROM_PTR(&pin_PB03) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P10), MP_ROM_PTR(&pin_PC00) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P9), MP_ROM_PTR(&pin_PC06) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P8), MP_ROM_PTR(&pin_PA04) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P1), MP_ROM_PTR(&pin_PA01) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P7), MP_ROM_PTR(&pin_PA10) }, //in use by USB
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P6), MP_ROM_PTR(&pin_PC07) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P5), MP_ROM_PTR(&pin_PB05) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P4), MP_ROM_PTR(&pin_PC01) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P0), MP_ROM_PTR(&pin_PA00) },
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_P3), MP_ROM_PTR(&pin_PB00) },
|
||||||
|
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display)},
|
||||||
|
{ MP_ROM_QSTR(MP_QSTR_INTERNAL_SPI), MP_ROM_PTR(&supervisor_flash_spi_bus) },
|
||||||
|
};
|
||||||
|
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
|
||||||
440
ports/stm32f4/boards/meowbit_v121/stm32f4xx_hal_conf.h
Normal file
440
ports/stm32f4/boards/meowbit_v121/stm32f4xx_hal_conf.h
Normal file
@ -0,0 +1,440 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f4xx_hal_conf_template.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief HAL configuration template file.
|
||||||
|
* This file should be copied to the application folder and renamed
|
||||||
|
* to stm32f4xx_hal_conf.h.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.</center></h2>
|
||||||
|
*
|
||||||
|
* This software component is licensed by ST under BSD 3-Clause license,
|
||||||
|
* the "License"; You may not use this file except in compliance with the
|
||||||
|
* License. You may obtain a copy of the License at:
|
||||||
|
* opensource.org/licenses/BSD-3-Clause
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F4xx_HAL_CONF_H
|
||||||
|
#define __STM32F4xx_HAL_CONF_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/* ########################## Module Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief This is the list of modules to be used in the HAL driver
|
||||||
|
*/
|
||||||
|
#define HAL_MODULE_ENABLED
|
||||||
|
|
||||||
|
#define HAL_ADC_MODULE_ENABLED
|
||||||
|
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CAN_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CRC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||||
|
#define HAL_DAC_MODULE_ENABLED
|
||||||
|
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||||
|
/* #define HAL_ETH_MODULE_ENABLED */
|
||||||
|
/* #define HAL_NAND_MODULE_ENABLED */
|
||||||
|
/* #define HAL_NOR_MODULE_ENABLED */
|
||||||
|
/* #define HAL_PCCARD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_HASH_MODULE_ENABLED */
|
||||||
|
#define HAL_I2C_MODULE_ENABLED
|
||||||
|
#define HAL_I2S_MODULE_ENABLED
|
||||||
|
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||||
|
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_RNG_MODULE_ENABLED */
|
||||||
|
/* #define HAL_RTC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SAI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_MMC_MODULE_ENABLED */
|
||||||
|
#define HAL_SPI_MODULE_ENABLED
|
||||||
|
#define HAL_TIM_MODULE_ENABLED
|
||||||
|
#define HAL_UART_MODULE_ENABLED
|
||||||
|
#define HAL_USART_MODULE_ENABLED
|
||||||
|
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_WWDG_MODULE_ENABLED */
|
||||||
|
#define HAL_PCD_MODULE_ENABLED
|
||||||
|
/* #define HAL_HCD_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DSI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||||
|
/* #define HAL_CEC_MODULE_ENABLED */
|
||||||
|
/* #define HAL_FMPI2C_MODULE_ENABLED */
|
||||||
|
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||||
|
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
/* #define HAL_EXTI_MODULE_ENABLED */
|
||||||
|
#define HAL_GPIO_MODULE_ENABLED
|
||||||
|
#define HAL_EXTI_MODULE_ENABLED
|
||||||
|
#define HAL_DMA_MODULE_ENABLED
|
||||||
|
#define HAL_RCC_MODULE_ENABLED
|
||||||
|
#define HAL_FLASH_MODULE_ENABLED
|
||||||
|
#define HAL_PWR_MODULE_ENABLED
|
||||||
|
#define HAL_CORTEX_MODULE_ENABLED
|
||||||
|
|
||||||
|
/* ########################## HSE/HSI Values adaptation ##################### */
|
||||||
|
/**
|
||||||
|
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSE is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSE_VALUE)
|
||||||
|
#define HSE_VALUE ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */
|
||||||
|
#endif /* HSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||||
|
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
|
||||||
|
#endif /* HSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal High Speed oscillator (HSI) value.
|
||||||
|
* This value is used by the RCC HAL module to compute the system frequency
|
||||||
|
* (when HSI is used as system clock source, directly or through the PLL).
|
||||||
|
*/
|
||||||
|
#if !defined (HSI_VALUE)
|
||||||
|
#define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
|
||||||
|
#endif /* HSI_VALUE */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Internal Low Speed oscillator (LSI) value.
|
||||||
|
*/
|
||||||
|
#if !defined (LSI_VALUE)
|
||||||
|
#define LSI_VALUE ((uint32_t)40000)
|
||||||
|
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||||
|
The real value may vary depending on the variations
|
||||||
|
in voltage and temperature. */
|
||||||
|
/**
|
||||||
|
* @brief External Low Speed oscillator (LSE) value.
|
||||||
|
*/
|
||||||
|
#if !defined (LSE_VALUE)
|
||||||
|
#define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */
|
||||||
|
#endif /* LSE_VALUE */
|
||||||
|
|
||||||
|
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||||
|
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
|
||||||
|
#endif /* LSE_STARTUP_TIMEOUT */
|
||||||
|
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief External clock source for I2S peripheral
|
||||||
|
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||||
|
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||||
|
*/
|
||||||
|
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||||
|
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
|
||||||
|
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||||
|
|
||||||
|
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||||
|
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||||
|
|
||||||
|
/* ########################### System Configuration ######################### */
|
||||||
|
/**
|
||||||
|
* @brief This is the HAL system configuration section
|
||||||
|
*/
|
||||||
|
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
|
||||||
|
#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
|
||||||
|
#define USE_RTOS 0U
|
||||||
|
#define PREFETCH_ENABLE 1U
|
||||||
|
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||||
|
#define DATA_CACHE_ENABLE 1U
|
||||||
|
|
||||||
|
/* ########################## Assert Selection ############################## */
|
||||||
|
/**
|
||||||
|
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||||
|
* HAL drivers code
|
||||||
|
*/
|
||||||
|
/* #define USE_FULL_ASSERT 1U */
|
||||||
|
|
||||||
|
/* ################## Ethernet peripheral configuration ##################### */
|
||||||
|
|
||||||
|
/* Section 1 : Ethernet peripheral configuration */
|
||||||
|
|
||||||
|
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
|
||||||
|
#define MAC_ADDR0 2U
|
||||||
|
#define MAC_ADDR1 0U
|
||||||
|
#define MAC_ADDR2 0U
|
||||||
|
#define MAC_ADDR3 0U
|
||||||
|
#define MAC_ADDR4 0U
|
||||||
|
#define MAC_ADDR5 0U
|
||||||
|
|
||||||
|
/* Definition of the Ethernet driver buffers size and count */
|
||||||
|
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
||||||
|
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||||
|
#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||||
|
#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||||
|
|
||||||
|
/* Section 2: PHY configuration section */
|
||||||
|
|
||||||
|
/* DP83848_PHY_ADDRESS Address*/
|
||||||
|
#define DP83848_PHY_ADDRESS 0x01U
|
||||||
|
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||||
|
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
|
||||||
|
/* PHY Configuration delay */
|
||||||
|
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
|
||||||
|
|
||||||
|
#define PHY_READ_TO ((uint32_t)0x0000FFFFU)
|
||||||
|
#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)
|
||||||
|
|
||||||
|
/* Section 3: Common PHY Registers */
|
||||||
|
|
||||||
|
#define PHY_BCR ((uint16_t)0x0000U) /*!< Transceiver Basic Control Register */
|
||||||
|
#define PHY_BSR ((uint16_t)0x0001U) /*!< Transceiver Basic Status Register */
|
||||||
|
|
||||||
|
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
|
||||||
|
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
|
||||||
|
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
|
||||||
|
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
|
||||||
|
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
|
||||||
|
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
|
||||||
|
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
|
||||||
|
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
|
||||||
|
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
|
||||||
|
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
|
||||||
|
|
||||||
|
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
|
||||||
|
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
|
||||||
|
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
|
||||||
|
|
||||||
|
/* Section 4: Extended PHY Registers */
|
||||||
|
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
|
||||||
|
|
||||||
|
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
|
||||||
|
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
|
||||||
|
|
||||||
|
/* ################## SPI peripheral configuration ########################## */
|
||||||
|
|
||||||
|
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||||
|
* Activated: CRC code is present inside driver
|
||||||
|
* Deactivated: CRC code cleaned from driver
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define USE_SPI_CRC 0U
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
/**
|
||||||
|
* @brief Include module's header file
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef HAL_RCC_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_rcc.h"
|
||||||
|
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_exti.h"
|
||||||
|
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_gpio.h"
|
||||||
|
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DMA_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_dma.h"
|
||||||
|
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_cortex.h"
|
||||||
|
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_ADC_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_adc.h"
|
||||||
|
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CAN_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_can.h"
|
||||||
|
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRC_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_crc.h"
|
||||||
|
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_cryp.h"
|
||||||
|
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_dma2d.h"
|
||||||
|
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DAC_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_dac.h"
|
||||||
|
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_dcmi.h"
|
||||||
|
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_ETH_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_eth.h"
|
||||||
|
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_flash.h"
|
||||||
|
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_sram.h"
|
||||||
|
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_NOR_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_nor.h"
|
||||||
|
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_NAND_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_nand.h"
|
||||||
|
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_pccard.h"
|
||||||
|
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_sdram.h"
|
||||||
|
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_HASH_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_hash.h"
|
||||||
|
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2C_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_i2c.h"
|
||||||
|
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_I2S_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_i2s.h"
|
||||||
|
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_iwdg.h"
|
||||||
|
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_ltdc.h"
|
||||||
|
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PWR_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_pwr.h"
|
||||||
|
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RNG_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_rng.h"
|
||||||
|
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_RTC_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_rtc.h"
|
||||||
|
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SAI_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_sai.h"
|
||||||
|
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SD_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_sd.h"
|
||||||
|
#endif /* HAL_SD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_MMC_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_mmc.h"
|
||||||
|
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SPI_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_spi.h"
|
||||||
|
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_TIM_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_tim.h"
|
||||||
|
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_UART_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_uart.h"
|
||||||
|
#endif /* HAL_UART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_USART_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_usart.h"
|
||||||
|
#endif /* HAL_USART_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_irda.h"
|
||||||
|
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_smartcard.h"
|
||||||
|
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_wwdg.h"
|
||||||
|
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_PCD_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_pcd.h"
|
||||||
|
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_HCD_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_hcd.h"
|
||||||
|
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DSI_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_dsi.h"
|
||||||
|
#endif /* HAL_DSI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_qspi.h"
|
||||||
|
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_CEC_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_cec.h"
|
||||||
|
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_FMPI2C_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_fmpi2c.h"
|
||||||
|
#endif /* HAL_FMPI2C_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_spdifrx.h"
|
||||||
|
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_dfsdm.h"
|
||||||
|
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||||
|
#include "stm32f4xx_hal_lptim.h"
|
||||||
|
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
#ifdef USE_FULL_ASSERT
|
||||||
|
/**
|
||||||
|
* @brief The assert_param macro is used for function's parameters check.
|
||||||
|
* @param expr: If expr is false, it calls assert_failed function
|
||||||
|
* which reports the name of the source file and the source
|
||||||
|
* line number of the call that failed.
|
||||||
|
* If expr is true, it returns no value.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||||
|
/* Exported functions ------------------------------------------------------- */
|
||||||
|
void assert_failed(uint8_t* file, uint32_t line);
|
||||||
|
#else
|
||||||
|
#define assert_param(expr) ((void)0U)
|
||||||
|
#endif /* USE_FULL_ASSERT */
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F4xx_HAL_CONF_H */
|
||||||
|
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
44
ports/stm32f4/boards/openocd_stm32f4.cfg
Normal file
44
ports/stm32f4/boards/openocd_stm32f4.cfg
Normal file
@ -0,0 +1,44 @@
|
|||||||
|
# This script configures OpenOCD for use with an ST-Link V2 programmer/debugger
|
||||||
|
# and an STM32F4 target microcontroller.
|
||||||
|
#
|
||||||
|
# To flash your firmware:
|
||||||
|
#
|
||||||
|
# $ openocd -f openocd_stm32f4.cfg \
|
||||||
|
# -c "stm_flash build-BOARD/firmware0.bin 0x08000000 build-BOARD/firmware1.bin 0x08020000"
|
||||||
|
#
|
||||||
|
# For a gdb server on port 3333:
|
||||||
|
#
|
||||||
|
# $ openocd -f openocd_stm32f4.cfg
|
||||||
|
|
||||||
|
|
||||||
|
source [find interface/stlink-v2.cfg]
|
||||||
|
transport select hla_swd
|
||||||
|
source [find target/stm32f4x.cfg]
|
||||||
|
reset_config srst_only
|
||||||
|
init
|
||||||
|
|
||||||
|
proc stm_flash { BIN0 ADDR0 {BIN1 ""} {ADDR1 ""} } {
|
||||||
|
reset halt
|
||||||
|
sleep 100
|
||||||
|
wait_halt 2
|
||||||
|
flash write_image erase $BIN0 $ADDR0
|
||||||
|
sleep 100
|
||||||
|
verify_image $BIN0 $ADDR0
|
||||||
|
sleep 100
|
||||||
|
if {$BIN1 ne ""} {
|
||||||
|
flash write_image erase $BIN1 $ADDR1
|
||||||
|
sleep 100
|
||||||
|
verify_image $BIN1 $ADDR1
|
||||||
|
sleep 100
|
||||||
|
}
|
||||||
|
reset run
|
||||||
|
shutdown
|
||||||
|
}
|
||||||
|
|
||||||
|
proc stm_erase {} {
|
||||||
|
reset halt
|
||||||
|
sleep 100
|
||||||
|
stm32f4x mass_erase 0
|
||||||
|
sleep 100
|
||||||
|
shutdown
|
||||||
|
}
|
||||||
448
ports/stm32f4/boards/startup_stm32f401xe.s
Normal file
448
ports/stm32f4/boards/startup_stm32f401xe.s
Normal file
@ -0,0 +1,448 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file startup_stm32f401xe.s
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief STM32F401xExx Devices vector table for GCC based toolchains.
|
||||||
|
* This module performs:
|
||||||
|
* - Set the initial SP
|
||||||
|
* - Set the initial PC == Reset_Handler,
|
||||||
|
* - Set the vector table entries with the exceptions ISR address
|
||||||
|
* - Branches to main in the C library (which eventually
|
||||||
|
* calls main()).
|
||||||
|
* After Reset the Cortex-M4 processor is in Thread mode,
|
||||||
|
* priority is Privileged, and the Stack is set to Main.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* <h2><center>© COPYRIGHT 2017 STMicroelectronics</center></h2>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
* are permitted provided that the following conditions are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
* this list of conditions and the following disclaimer in the documentation
|
||||||
|
* and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of STMicroelectronics nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||||
|
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||||
|
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||||
|
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
||||||
|
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||||
|
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
.syntax unified
|
||||||
|
.cpu cortex-m4
|
||||||
|
.fpu softvfp
|
||||||
|
.thumb
|
||||||
|
|
||||||
|
.global g_pfnVectors
|
||||||
|
.global Default_Handler
|
||||||
|
|
||||||
|
/* start address for the initialization values of the .data section.
|
||||||
|
defined in linker script */
|
||||||
|
.word _sidata
|
||||||
|
/* start address for the .data section. defined in linker script */
|
||||||
|
.word _sdata
|
||||||
|
/* end address for the .data section. defined in linker script */
|
||||||
|
.word _edata
|
||||||
|
/* start address for the .bss section. defined in linker script */
|
||||||
|
.word _sbss
|
||||||
|
/* end address for the .bss section. defined in linker script */
|
||||||
|
.word _ebss
|
||||||
|
/* stack used for SystemInit_ExtMemCtl; always internal RAM used */
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This is the code that gets called when the processor first
|
||||||
|
* starts execution following a reset event. Only the absolutely
|
||||||
|
* necessary set is performed, after which the application
|
||||||
|
* supplied main() routine is called.
|
||||||
|
* @param None
|
||||||
|
* @retval : None
|
||||||
|
*/
|
||||||
|
|
||||||
|
.section .text.Reset_Handler
|
||||||
|
.weak Reset_Handler
|
||||||
|
.type Reset_Handler, %function
|
||||||
|
Reset_Handler:
|
||||||
|
ldr sp, =_estack /* set stack pointer */
|
||||||
|
|
||||||
|
/* Copy the data segment initializers from flash to SRAM */
|
||||||
|
movs r1, #0
|
||||||
|
b LoopCopyDataInit
|
||||||
|
|
||||||
|
CopyDataInit:
|
||||||
|
ldr r3, =_sidata
|
||||||
|
ldr r3, [r3, r1]
|
||||||
|
str r3, [r0, r1]
|
||||||
|
adds r1, r1, #4
|
||||||
|
|
||||||
|
LoopCopyDataInit:
|
||||||
|
ldr r0, =_sdata
|
||||||
|
ldr r3, =_edata
|
||||||
|
adds r2, r0, r1
|
||||||
|
cmp r2, r3
|
||||||
|
bcc CopyDataInit
|
||||||
|
ldr r2, =_sbss
|
||||||
|
b LoopFillZerobss
|
||||||
|
/* Zero fill the bss segment. */
|
||||||
|
FillZerobss:
|
||||||
|
movs r3, #0
|
||||||
|
str r3, [r2], #4
|
||||||
|
|
||||||
|
LoopFillZerobss:
|
||||||
|
ldr r3, = _ebss
|
||||||
|
cmp r2, r3
|
||||||
|
bcc FillZerobss
|
||||||
|
|
||||||
|
/* Call the clock system intitialization function.*/
|
||||||
|
bl SystemInit
|
||||||
|
/* Call static constructors */
|
||||||
|
/* bl __libc_init_array */
|
||||||
|
/* Call the application's entry point.*/
|
||||||
|
bl main
|
||||||
|
bx lr
|
||||||
|
.size Reset_Handler, .-Reset_Handler
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This is the code that gets called when the processor receives an
|
||||||
|
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||||
|
* the system state for examination by a debugger.
|
||||||
|
* @param None
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
.section .text.Default_Handler,"ax",%progbits
|
||||||
|
Default_Handler:
|
||||||
|
Infinite_Loop:
|
||||||
|
b Infinite_Loop
|
||||||
|
.size Default_Handler, .-Default_Handler
|
||||||
|
/******************************************************************************
|
||||||
|
*
|
||||||
|
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||||
|
* must be placed on this to ensure that it ends up at physical address
|
||||||
|
* 0x0000.0000.
|
||||||
|
*
|
||||||
|
*******************************************************************************/
|
||||||
|
.section .isr_vector,"a",%progbits
|
||||||
|
.type g_pfnVectors, %object
|
||||||
|
.size g_pfnVectors, .-g_pfnVectors
|
||||||
|
|
||||||
|
g_pfnVectors:
|
||||||
|
.word _estack
|
||||||
|
.word Reset_Handler
|
||||||
|
.word NMI_Handler
|
||||||
|
.word HardFault_Handler
|
||||||
|
.word MemManage_Handler
|
||||||
|
.word BusFault_Handler
|
||||||
|
.word UsageFault_Handler
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word 0
|
||||||
|
.word SVC_Handler
|
||||||
|
.word DebugMon_Handler
|
||||||
|
.word 0
|
||||||
|
.word PendSV_Handler
|
||||||
|
.word SysTick_Handler
|
||||||
|
|
||||||
|
/* External Interrupts */
|
||||||
|
.word WWDG_IRQHandler /* Window WatchDog */
|
||||||
|
.word PVD_IRQHandler /* PVD through EXTI Line detection */
|
||||||
|
.word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */
|
||||||
|
.word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */
|
||||||
|
.word FLASH_IRQHandler /* FLASH */
|
||||||
|
.word RCC_IRQHandler /* RCC */
|
||||||
|
.word EXTI0_IRQHandler /* EXTI Line0 */
|
||||||
|
.word EXTI1_IRQHandler /* EXTI Line1 */
|
||||||
|
.word EXTI2_IRQHandler /* EXTI Line2 */
|
||||||
|
.word EXTI3_IRQHandler /* EXTI Line3 */
|
||||||
|
.word EXTI4_IRQHandler /* EXTI Line4 */
|
||||||
|
.word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */
|
||||||
|
.word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */
|
||||||
|
.word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */
|
||||||
|
.word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */
|
||||||
|
.word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */
|
||||||
|
.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
|
||||||
|
.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
|
||||||
|
.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word EXTI9_5_IRQHandler /* External Line[9:5]s */
|
||||||
|
.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
|
||||||
|
.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
|
||||||
|
.word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */
|
||||||
|
.word TIM1_CC_IRQHandler /* TIM1 Capture Compare */
|
||||||
|
.word TIM2_IRQHandler /* TIM2 */
|
||||||
|
.word TIM3_IRQHandler /* TIM3 */
|
||||||
|
.word TIM4_IRQHandler /* TIM4 */
|
||||||
|
.word I2C1_EV_IRQHandler /* I2C1 Event */
|
||||||
|
.word I2C1_ER_IRQHandler /* I2C1 Error */
|
||||||
|
.word I2C2_EV_IRQHandler /* I2C2 Event */
|
||||||
|
.word I2C2_ER_IRQHandler /* I2C2 Error */
|
||||||
|
.word SPI1_IRQHandler /* SPI1 */
|
||||||
|
.word SPI2_IRQHandler /* SPI2 */
|
||||||
|
.word USART1_IRQHandler /* USART1 */
|
||||||
|
.word USART2_IRQHandler /* USART2 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word EXTI15_10_IRQHandler /* External Line[15:10]s */
|
||||||
|
.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
|
||||||
|
.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word SDIO_IRQHandler /* SDIO */
|
||||||
|
.word TIM5_IRQHandler /* TIM5 */
|
||||||
|
.word SPI3_IRQHandler /* SPI3 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
|
||||||
|
.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
|
||||||
|
.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
|
||||||
|
.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
|
||||||
|
.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word OTG_FS_IRQHandler /* USB OTG FS */
|
||||||
|
.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
|
||||||
|
.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
|
||||||
|
.word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */
|
||||||
|
.word USART6_IRQHandler /* USART6 */
|
||||||
|
.word I2C3_EV_IRQHandler /* I2C3 event */
|
||||||
|
.word I2C3_ER_IRQHandler /* I2C3 error */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word FPU_IRQHandler /* FPU */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word 0 /* Reserved */
|
||||||
|
.word SPI4_IRQHandler /* SPI4 */
|
||||||
|
|
||||||
|
/*******************************************************************************
|
||||||
|
*
|
||||||
|
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||||
|
* As they are weak aliases, any function with the same name will override
|
||||||
|
* this definition.
|
||||||
|
*
|
||||||
|
*******************************************************************************/
|
||||||
|
.weak NMI_Handler
|
||||||
|
.thumb_set NMI_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak HardFault_Handler
|
||||||
|
.thumb_set HardFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak MemManage_Handler
|
||||||
|
.thumb_set MemManage_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak BusFault_Handler
|
||||||
|
.thumb_set BusFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak UsageFault_Handler
|
||||||
|
.thumb_set UsageFault_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak SVC_Handler
|
||||||
|
.thumb_set SVC_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak DebugMon_Handler
|
||||||
|
.thumb_set DebugMon_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak PendSV_Handler
|
||||||
|
.thumb_set PendSV_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak SysTick_Handler
|
||||||
|
.thumb_set SysTick_Handler,Default_Handler
|
||||||
|
|
||||||
|
.weak WWDG_IRQHandler
|
||||||
|
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak PVD_IRQHandler
|
||||||
|
.thumb_set PVD_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TAMP_STAMP_IRQHandler
|
||||||
|
.thumb_set TAMP_STAMP_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RTC_WKUP_IRQHandler
|
||||||
|
.thumb_set RTC_WKUP_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak FLASH_IRQHandler
|
||||||
|
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RCC_IRQHandler
|
||||||
|
.thumb_set RCC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI0_IRQHandler
|
||||||
|
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI1_IRQHandler
|
||||||
|
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI2_IRQHandler
|
||||||
|
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI3_IRQHandler
|
||||||
|
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI4_IRQHandler
|
||||||
|
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Stream0_IRQHandler
|
||||||
|
.thumb_set DMA1_Stream0_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Stream1_IRQHandler
|
||||||
|
.thumb_set DMA1_Stream1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Stream2_IRQHandler
|
||||||
|
.thumb_set DMA1_Stream2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Stream3_IRQHandler
|
||||||
|
.thumb_set DMA1_Stream3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Stream4_IRQHandler
|
||||||
|
.thumb_set DMA1_Stream4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Stream5_IRQHandler
|
||||||
|
.thumb_set DMA1_Stream5_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Stream6_IRQHandler
|
||||||
|
.thumb_set DMA1_Stream6_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak ADC_IRQHandler
|
||||||
|
.thumb_set ADC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI9_5_IRQHandler
|
||||||
|
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_BRK_TIM9_IRQHandler
|
||||||
|
.thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_UP_TIM10_IRQHandler
|
||||||
|
.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_TRG_COM_TIM11_IRQHandler
|
||||||
|
.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM1_CC_IRQHandler
|
||||||
|
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM2_IRQHandler
|
||||||
|
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM3_IRQHandler
|
||||||
|
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM4_IRQHandler
|
||||||
|
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C1_EV_IRQHandler
|
||||||
|
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C1_ER_IRQHandler
|
||||||
|
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C2_EV_IRQHandler
|
||||||
|
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C2_ER_IRQHandler
|
||||||
|
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SPI1_IRQHandler
|
||||||
|
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SPI2_IRQHandler
|
||||||
|
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USART1_IRQHandler
|
||||||
|
.thumb_set USART1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USART2_IRQHandler
|
||||||
|
.thumb_set USART2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak EXTI15_10_IRQHandler
|
||||||
|
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak RTC_Alarm_IRQHandler
|
||||||
|
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak OTG_FS_WKUP_IRQHandler
|
||||||
|
.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA1_Stream7_IRQHandler
|
||||||
|
.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SDIO_IRQHandler
|
||||||
|
.thumb_set SDIO_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak TIM5_IRQHandler
|
||||||
|
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SPI3_IRQHandler
|
||||||
|
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Stream0_IRQHandler
|
||||||
|
.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Stream1_IRQHandler
|
||||||
|
.thumb_set DMA2_Stream1_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Stream2_IRQHandler
|
||||||
|
.thumb_set DMA2_Stream2_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Stream3_IRQHandler
|
||||||
|
.thumb_set DMA2_Stream3_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Stream4_IRQHandler
|
||||||
|
.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak OTG_FS_IRQHandler
|
||||||
|
.thumb_set OTG_FS_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Stream5_IRQHandler
|
||||||
|
.thumb_set DMA2_Stream5_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Stream6_IRQHandler
|
||||||
|
.thumb_set DMA2_Stream6_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak DMA2_Stream7_IRQHandler
|
||||||
|
.thumb_set DMA2_Stream7_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak USART6_IRQHandler
|
||||||
|
.thumb_set USART6_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C3_EV_IRQHandler
|
||||||
|
.thumb_set I2C3_EV_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak I2C3_ER_IRQHandler
|
||||||
|
.thumb_set I2C3_ER_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak FPU_IRQHandler
|
||||||
|
.thumb_set FPU_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
.weak SPI4_IRQHandler
|
||||||
|
.thumb_set SPI4_IRQHandler,Default_Handler
|
||||||
|
|
||||||
|
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||||
|
|
||||||
@ -34,7 +34,6 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
|
|||||||
{ MP_ROM_QSTR(MP_QSTR_C15), MP_ROM_PTR(&pin_PC15) },
|
{ MP_ROM_QSTR(MP_QSTR_C15), MP_ROM_PTR(&pin_PC15) },
|
||||||
{ MP_ROM_QSTR(MP_QSTR_C14), MP_ROM_PTR(&pin_PC14) },
|
{ MP_ROM_QSTR(MP_QSTR_C14), MP_ROM_PTR(&pin_PC14) },
|
||||||
{ MP_ROM_QSTR(MP_QSTR_C13), MP_ROM_PTR(&pin_PC13) },
|
{ MP_ROM_QSTR(MP_QSTR_C13), MP_ROM_PTR(&pin_PC13) },
|
||||||
|
|
||||||
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PC13) },
|
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_PC13) },
|
||||||
};
|
};
|
||||||
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
|
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
|
||||||
|
|||||||
@ -428,31 +428,43 @@ STATIC void spi_clock_disable(uint8_t mask) {
|
|||||||
#ifdef SPI1
|
#ifdef SPI1
|
||||||
if (mask & (1 << 0)) {
|
if (mask & (1 << 0)) {
|
||||||
__HAL_RCC_SPI1_CLK_DISABLE();
|
__HAL_RCC_SPI1_CLK_DISABLE();
|
||||||
|
__HAL_RCC_SPI1_FORCE_RESET();
|
||||||
|
__HAL_RCC_SPI1_RELEASE_RESET();
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
#ifdef SPI2
|
#ifdef SPI2
|
||||||
if (mask & (1 << 1)) {
|
if (mask & (1 << 1)) {
|
||||||
__HAL_RCC_SPI2_CLK_DISABLE();
|
__HAL_RCC_SPI2_CLK_DISABLE();
|
||||||
|
__HAL_RCC_SPI2_FORCE_RESET();
|
||||||
|
__HAL_RCC_SPI2_RELEASE_RESET();
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
#ifdef SPI3
|
#ifdef SPI3
|
||||||
if (mask & (1 << 2)) {
|
if (mask & (1 << 2)) {
|
||||||
__HAL_RCC_SPI3_CLK_DISABLE();
|
__HAL_RCC_SPI3_CLK_DISABLE();
|
||||||
|
__HAL_RCC_SPI3_FORCE_RESET();
|
||||||
|
__HAL_RCC_SPI3_RELEASE_RESET();
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
#ifdef SPI4
|
#ifdef SPI4
|
||||||
if (mask & (1 << 3)) {
|
if (mask & (1 << 3)) {
|
||||||
__HAL_RCC_SPI4_CLK_DISABLE();
|
__HAL_RCC_SPI4_CLK_DISABLE();
|
||||||
|
__HAL_RCC_SPI4_FORCE_RESET();
|
||||||
|
__HAL_RCC_SPI4_RELEASE_RESET();
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
#ifdef SPI5
|
#ifdef SPI5
|
||||||
if (mask & (1 << 4)) {
|
if (mask & (1 << 4)) {
|
||||||
__HAL_RCC_SPI5_CLK_DISABLE();
|
__HAL_RCC_SPI5_CLK_DISABLE();
|
||||||
|
__HAL_RCC_SPI5_FORCE_RESET();
|
||||||
|
__HAL_RCC_SPI5_RELEASE_RESET();
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
#ifdef SPI6
|
#ifdef SPI6
|
||||||
if (mask & (1 << 5)) {
|
if (mask & (1 << 5)) {
|
||||||
__HAL_RCC_SPI6_CLK_DISABLE();
|
__HAL_RCC_SPI6_CLK_DISABLE();
|
||||||
|
__HAL_RCC_SPI6_FORCE_RESET();
|
||||||
|
__HAL_RCC_SPI6_RELEASE_RESET();
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|||||||
@ -76,6 +76,7 @@ void reset_pin_number(uint8_t pin_port, uint8_t pin_number) {
|
|||||||
}
|
}
|
||||||
// Clear claimed bit & reset
|
// Clear claimed bit & reset
|
||||||
claimed_pins[pin_port] &= ~(1<<pin_number);
|
claimed_pins[pin_port] &= ~(1<<pin_number);
|
||||||
|
never_reset_pins[pin_port] &= ~(1<<pin_number);
|
||||||
HAL_GPIO_DeInit(ports[pin_port], 1<<pin_number);
|
HAL_GPIO_DeInit(ports[pin_port], 1<<pin_number);
|
||||||
|
|
||||||
#ifdef MICROPY_HW_NEOPIXEL
|
#ifdef MICROPY_HW_NEOPIXEL
|
||||||
|
|||||||
@ -169,7 +169,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
|
|||||||
{ MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) },
|
{ MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) },
|
||||||
#endif
|
#endif
|
||||||
{ MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) },
|
{ MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) },
|
||||||
#if MCU_PACKAGE == 144
|
#if MCU_PACKAGE == 144 || defined STM32F405xx
|
||||||
{ MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) },
|
{ MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) },
|
||||||
#endif
|
#endif
|
||||||
{ MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) },
|
{ MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) },
|
||||||
|
|||||||
@ -113,12 +113,12 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
|
|||||||
bool first_time_setup = true;
|
bool first_time_setup = true;
|
||||||
|
|
||||||
for (uint i = 0; i < tim_num; i++) {
|
for (uint i = 0; i < tim_num; i++) {
|
||||||
mcu_tim_pin_obj_t l_tim = mcu_tim_pin_list[i];
|
const mcu_tim_pin_obj_t * l_tim = &mcu_tim_pin_list[i];
|
||||||
uint8_t l_tim_index = l_tim.tim_index - 1;
|
uint8_t l_tim_index = l_tim->tim_index - 1;
|
||||||
uint8_t l_tim_channel = l_tim.channel_index - 1;
|
uint8_t l_tim_channel = l_tim->channel_index - 1;
|
||||||
|
|
||||||
//if pin is same
|
//if pin is same
|
||||||
if (l_tim.pin == pin) {
|
if (l_tim->pin == pin) {
|
||||||
//check if the timer has a channel active
|
//check if the timer has a channel active
|
||||||
if (reserved_tim[l_tim_index] != 0) {
|
if (reserved_tim[l_tim_index] != 0) {
|
||||||
//is it the same channel? (or all channels reserved by a var-freq)
|
//is it the same channel? (or all channels reserved by a var-freq)
|
||||||
@ -139,7 +139,7 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
|
|||||||
first_time_setup = false; //skip setting up the timer
|
first_time_setup = false; //skip setting up the timer
|
||||||
}
|
}
|
||||||
//No problems taken, so set it up
|
//No problems taken, so set it up
|
||||||
self->tim = &l_tim;
|
self->tim = l_tim;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@ -203,11 +203,8 @@ pwmout_result_t common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
|
|||||||
//Channel/PWM init
|
//Channel/PWM init
|
||||||
self->chan_handle.OCMode = TIM_OCMODE_PWM1;
|
self->chan_handle.OCMode = TIM_OCMODE_PWM1;
|
||||||
self->chan_handle.Pulse = timer_get_internal_duty(duty, period);
|
self->chan_handle.Pulse = timer_get_internal_duty(duty, period);
|
||||||
self->chan_handle.OCPolarity = TIM_OCPOLARITY_LOW;
|
self->chan_handle.OCPolarity = TIM_OCPOLARITY_HIGH;
|
||||||
self->chan_handle.OCFastMode = TIM_OCFAST_DISABLE;
|
self->chan_handle.OCFastMode = TIM_OCFAST_DISABLE;
|
||||||
self->chan_handle.OCNPolarity = TIM_OCNPOLARITY_LOW; // needed for TIM1 and TIM8
|
|
||||||
self->chan_handle.OCIdleState = TIM_OCIDLESTATE_SET; // needed for TIM1 and TIM8
|
|
||||||
self->chan_handle.OCNIdleState = TIM_OCNIDLESTATE_SET; // needed for TIM1 and TIM8
|
|
||||||
if (HAL_TIM_PWM_ConfigChannel(&self->handle, &self->chan_handle, self->channel) != HAL_OK) {
|
if (HAL_TIM_PWM_ConfigChannel(&self->handle, &self->chan_handle, self->channel) != HAL_OK) {
|
||||||
mp_raise_ValueError(translate("Could not initialize channel"));
|
mp_raise_ValueError(translate("Could not initialize channel"));
|
||||||
}
|
}
|
||||||
|
|||||||
@ -140,6 +140,12 @@ typedef struct {
|
|||||||
|
|
||||||
//Starter Lines
|
//Starter Lines
|
||||||
|
|
||||||
|
#ifdef STM32F401xE
|
||||||
|
#define HAS_DAC 0
|
||||||
|
#define HAS_TRNG 0
|
||||||
|
#include "stm32f401xe/periph.h"
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifdef STM32F411xE
|
#ifdef STM32F411xE
|
||||||
#define HAS_DAC 0
|
#define HAS_DAC 0
|
||||||
#define HAS_TRNG 0
|
#define HAS_TRNG 0
|
||||||
|
|||||||
@ -77,13 +77,17 @@ extern const mp_obj_type_t mcu_pin_type;
|
|||||||
#define NO_PIN 0xff
|
#define NO_PIN 0xff
|
||||||
|
|
||||||
// Choose based on chip
|
// Choose based on chip
|
||||||
#ifdef STM32F412Zx
|
#ifdef STM32F401xE
|
||||||
#include "stm32f412zx/pins.h"
|
#include "stm32f401xe/pins.h"
|
||||||
#endif
|
#endif
|
||||||
#ifdef STM32F411xE
|
#ifdef STM32F411xE
|
||||||
#include "stm32f411xe/pins.h"
|
#include "stm32f411xe/pins.h"
|
||||||
#endif
|
#endif
|
||||||
|
#ifdef STM32F412Zx
|
||||||
|
#include "stm32f412zx/pins.h"
|
||||||
|
#endif
|
||||||
#ifdef STM32F405xx
|
#ifdef STM32F405xx
|
||||||
#include "stm32f405xx/pins.h"
|
#include "stm32f405xx/pins.h"
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__
|
#endif // __MICROPY_INCLUDED_STM32F4_PERIPHERALS_PINS_H__
|
||||||
|
|||||||
61
ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c
Normal file
61
ports/stm32f4/peripherals/stm32f4/stm32f401xe/clocks.c
Normal file
@ -0,0 +1,61 @@
|
|||||||
|
|
||||||
|
/*
|
||||||
|
* This file is part of the Micro Python project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
#include "stm32f4xx_hal.h"
|
||||||
|
|
||||||
|
void stm32f4_peripherals_clocks_init(void) {
|
||||||
|
//System clock init
|
||||||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
||||||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
||||||
|
|
||||||
|
/* Enable Power Control clock */
|
||||||
|
__HAL_RCC_PWR_CLK_ENABLE();
|
||||||
|
|
||||||
|
/* The voltage scaling allows optimizing the power consumption when the device is
|
||||||
|
clocked below the maximum system frequency, to update the voltage scaling value
|
||||||
|
regarding system frequency refer to product datasheet. */
|
||||||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
|
||||||
|
|
||||||
|
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
||||||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
||||||
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||||
|
RCC_OscInitStruct.PLL.PLLM = 12;
|
||||||
|
RCC_OscInitStruct.PLL.PLLN = 336;
|
||||||
|
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
|
||||||
|
RCC_OscInitStruct.PLL.PLLQ = 7;
|
||||||
|
HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
||||||
|
|
||||||
|
/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
|
||||||
|
clocks dividers */
|
||||||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
|
||||||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||||||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
|
||||||
|
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
|
||||||
|
}
|
||||||
52
ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c
Normal file
52
ports/stm32f4/peripherals/stm32f4/stm32f401xe/gpio.c
Normal file
@ -0,0 +1,52 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the Micro Python project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "stm32f4xx_hal.h"
|
||||||
|
#include "stm32f4/gpio.h"
|
||||||
|
#include "common-hal/microcontroller/Pin.h"
|
||||||
|
|
||||||
|
void stm32f4_peripherals_gpio_init(void) {
|
||||||
|
/* GPIO Ports Clock Enable */
|
||||||
|
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOE_CLK_ENABLE();
|
||||||
|
__HAL_RCC_GPIOH_CLK_ENABLE();
|
||||||
|
|
||||||
|
//Never reset pins
|
||||||
|
never_reset_pin_number(2,13); //PC13 anti tamp
|
||||||
|
never_reset_pin_number(2,14); //PC14 OSC32_IN
|
||||||
|
never_reset_pin_number(2,15); //PC15 OSC32_OUT
|
||||||
|
never_reset_pin_number(0,13); //PA13 SWDIO
|
||||||
|
never_reset_pin_number(0,14); //PA14 SWCLK
|
||||||
|
}
|
||||||
|
|
||||||
|
//LEDs are inverted on F411 DISCO
|
||||||
|
void stm32f4_peripherals_status_led(uint8_t led, uint8_t state) {
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
173
ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c
Normal file
173
ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.c
Normal file
@ -0,0 +1,173 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the MicroPython project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "py/obj.h"
|
||||||
|
#include "py/mphal.h"
|
||||||
|
#include "stm32f4/pins.h"
|
||||||
|
#include "stm32f4/periph.h"
|
||||||
|
|
||||||
|
// I2C
|
||||||
|
|
||||||
|
I2C_TypeDef * mcu_i2c_banks[3] = {I2C1, I2C2, I2C3};
|
||||||
|
|
||||||
|
const mcu_i2c_sda_obj_t mcu_i2c_sda_list[5] = {
|
||||||
|
I2C_SDA(1, 4, &pin_PB07),
|
||||||
|
I2C_SDA(1, 4, &pin_PB09),
|
||||||
|
I2C_SDA(2, 9, &pin_PB03),
|
||||||
|
I2C_SDA(3, 4, &pin_PC09),
|
||||||
|
I2C_SDA(3, 9, &pin_PB04),
|
||||||
|
};
|
||||||
|
|
||||||
|
const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4] = {
|
||||||
|
I2C_SCL(1, 4, &pin_PB06),
|
||||||
|
I2C_SCL(1, 4, &pin_PB08),
|
||||||
|
I2C_SCL(2, 4, &pin_PB10),
|
||||||
|
I2C_SCL(3, 4, &pin_PA08)
|
||||||
|
};
|
||||||
|
|
||||||
|
// SPI
|
||||||
|
|
||||||
|
SPI_TypeDef * mcu_spi_banks[4] = {SPI1, SPI2, SPI3, SPI4};
|
||||||
|
|
||||||
|
const mcu_spi_sck_obj_t mcu_spi_sck_list[9] = {
|
||||||
|
SPI(1, 5, &pin_PA05),
|
||||||
|
SPI(1, 5, &pin_PB03),
|
||||||
|
SPI(2, 5, &pin_PB10),
|
||||||
|
SPI(2, 5, &pin_PB13),
|
||||||
|
SPI(2, 5, &pin_PD03),
|
||||||
|
SPI(3, 6, &pin_PB03),
|
||||||
|
SPI(3, 6, &pin_PC10),
|
||||||
|
SPI(4, 5, &pin_PE02),
|
||||||
|
SPI(4, 5, &pin_PE12),
|
||||||
|
};
|
||||||
|
|
||||||
|
const mcu_spi_mosi_obj_t mcu_spi_mosi_list[9] = {
|
||||||
|
SPI(1, 5, &pin_PA07),
|
||||||
|
SPI(1, 5, &pin_PB05),
|
||||||
|
SPI(2, 5, &pin_PB15),
|
||||||
|
SPI(2, 5, &pin_PC03),
|
||||||
|
SPI(3, 6, &pin_PB05),
|
||||||
|
SPI(3, 6, &pin_PC12),
|
||||||
|
SPI(3, 5, &pin_PD06),
|
||||||
|
SPI(4, 5, &pin_PE06),
|
||||||
|
SPI(4, 5, &pin_PE14),
|
||||||
|
};
|
||||||
|
|
||||||
|
const mcu_spi_miso_obj_t mcu_spi_miso_list[8] = {
|
||||||
|
SPI(1, 5, &pin_PA06),
|
||||||
|
SPI(1, 5, &pin_PB04),
|
||||||
|
SPI(2, 5, &pin_PB14),
|
||||||
|
SPI(2, 5, &pin_PC02),
|
||||||
|
SPI(3, 6, &pin_PB04),
|
||||||
|
SPI(3, 6, &pin_PC11),
|
||||||
|
SPI(4, 5, &pin_PE05),
|
||||||
|
SPI(4, 5, &pin_PE13),
|
||||||
|
};
|
||||||
|
|
||||||
|
const mcu_spi_nss_obj_t mcu_spi_nss_list[9] = {
|
||||||
|
SPI(1, 5, &pin_PA04),
|
||||||
|
SPI(1, 5, &pin_PA15),
|
||||||
|
SPI(2, 5, &pin_PB09),
|
||||||
|
SPI(2, 5, &pin_PB12),
|
||||||
|
SPI(3, 6, &pin_PA04),
|
||||||
|
SPI(3, 6, &pin_PA15),
|
||||||
|
SPI(4, 6, &pin_PB12),
|
||||||
|
SPI(4, 5, &pin_PE04),
|
||||||
|
SPI(4, 5, &pin_PE11),
|
||||||
|
};
|
||||||
|
|
||||||
|
USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, NULL, NULL, NULL, USART6};
|
||||||
|
bool mcu_uart_has_usart[MAX_UART] = {true, true, false, false, false, true};
|
||||||
|
|
||||||
|
const mcu_uart_tx_obj_t mcu_uart_tx_list[6] = {
|
||||||
|
UART(2, 7, &pin_PA02),
|
||||||
|
UART(1, 7, &pin_PA09),
|
||||||
|
UART(6, 8, &pin_PA11),
|
||||||
|
UART(1, 7, &pin_PB06),
|
||||||
|
UART(6, 8, &pin_PC06),
|
||||||
|
UART(2, 7, &pin_PD05),
|
||||||
|
};
|
||||||
|
|
||||||
|
const mcu_uart_rx_obj_t mcu_uart_rx_list[6] = {
|
||||||
|
UART(2, 7, &pin_PA03),
|
||||||
|
UART(1, 7, &pin_PA10),
|
||||||
|
UART(6, 8, &pin_PA12),
|
||||||
|
UART(1, 7, &pin_PB07),
|
||||||
|
UART(6, 8, &pin_PC07),
|
||||||
|
UART(2, 7, &pin_PD06),
|
||||||
|
};
|
||||||
|
|
||||||
|
//Timers
|
||||||
|
//TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins
|
||||||
|
TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, NULL, TIM9, TIM10,
|
||||||
|
TIM11, NULL, NULL, NULL};
|
||||||
|
|
||||||
|
//#define TIM(index, alt, channel, tim_pin)
|
||||||
|
const mcu_tim_pin_obj_t mcu_tim_pin_list[44] = {
|
||||||
|
TIM(2,1,1,&pin_PA00),
|
||||||
|
TIM(5,2,1,&pin_PA00),
|
||||||
|
TIM(2,1,2,&pin_PA01),
|
||||||
|
TIM(5,2,2,&pin_PA01),
|
||||||
|
TIM(2,1,3,&pin_PA02),
|
||||||
|
TIM(5,2,3,&pin_PA02),
|
||||||
|
TIM(2,1,4,&pin_PA03),
|
||||||
|
TIM(5,2,4,&pin_PA03),
|
||||||
|
TIM(9,3,1,&pin_PA02),
|
||||||
|
TIM(9,3,2,&pin_PA03),
|
||||||
|
TIM(3,2,1,&pin_PA06),
|
||||||
|
TIM(3,2,2,&pin_PA07),
|
||||||
|
TIM(1,1,1,&pin_PA08),
|
||||||
|
TIM(1,1,2,&pin_PA09),
|
||||||
|
TIM(1,1,3,&pin_PA10),
|
||||||
|
TIM(1,1,4,&pin_PA11),
|
||||||
|
TIM(2,1,1,&pin_PA15),
|
||||||
|
TIM(3,2,3,&pin_PB00),
|
||||||
|
TIM(3,2,4,&pin_PB01),
|
||||||
|
TIM(2,1,2,&pin_PB03),
|
||||||
|
TIM(3,2,1,&pin_PB04),
|
||||||
|
TIM(3,2,2,&pin_PB05),
|
||||||
|
TIM(4,2,1,&pin_PB06),
|
||||||
|
TIM(4,2,2,&pin_PB07),
|
||||||
|
TIM(4,2,3,&pin_PB08),
|
||||||
|
TIM(10,2,1,&pin_PB08),
|
||||||
|
TIM(4,2,4,&pin_PB09),
|
||||||
|
TIM(11,2,1,&pin_PB09),
|
||||||
|
TIM(2,1,3,&pin_PB10),
|
||||||
|
TIM(3,2,1,&pin_PC06),
|
||||||
|
TIM(3,2,2,&pin_PC07),
|
||||||
|
TIM(3,2,3,&pin_PC08),
|
||||||
|
TIM(3,2,4,&pin_PC09),
|
||||||
|
TIM(4,2,1,&pin_PD12),
|
||||||
|
TIM(4,2,2,&pin_PD13),
|
||||||
|
TIM(4,2,3,&pin_PD14),
|
||||||
|
TIM(4,2,4,&pin_PD15),
|
||||||
|
TIM(9,3,1,&pin_PE05),
|
||||||
|
TIM(9,3,2,&pin_PE06),
|
||||||
|
TIM(1,1,1,&pin_PE09),
|
||||||
|
TIM(1,1,2,&pin_PE11),
|
||||||
|
TIM(1,1,3,&pin_PE13),
|
||||||
|
TIM(1,1,4,&pin_PE14),
|
||||||
|
};
|
||||||
57
ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.h
Normal file
57
ports/stm32f4/peripherals/stm32f4/stm32f401xe/periph.h
Normal file
@ -0,0 +1,57 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the MicroPython project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H
|
||||||
|
#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H
|
||||||
|
|
||||||
|
//I2C
|
||||||
|
extern I2C_TypeDef * mcu_i2c_banks[3];
|
||||||
|
|
||||||
|
extern const mcu_i2c_sda_obj_t mcu_i2c_sda_list[5];
|
||||||
|
extern const mcu_i2c_scl_obj_t mcu_i2c_scl_list[4];
|
||||||
|
|
||||||
|
//SPI
|
||||||
|
extern SPI_TypeDef * mcu_spi_banks[4];
|
||||||
|
|
||||||
|
extern const mcu_spi_sck_obj_t mcu_spi_sck_list[9];
|
||||||
|
extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[9];
|
||||||
|
extern const mcu_spi_miso_obj_t mcu_spi_miso_list[8];
|
||||||
|
extern const mcu_spi_nss_obj_t mcu_spi_nss_list[9];
|
||||||
|
|
||||||
|
//UART
|
||||||
|
extern USART_TypeDef * mcu_uart_banks[MAX_UART];
|
||||||
|
extern bool mcu_uart_has_usart[MAX_UART];
|
||||||
|
|
||||||
|
extern const mcu_uart_tx_obj_t mcu_uart_tx_list[6];
|
||||||
|
extern const mcu_uart_rx_obj_t mcu_uart_rx_list[6];
|
||||||
|
|
||||||
|
//Timers
|
||||||
|
#define TIM_BANK_ARRAY_LEN 14
|
||||||
|
#define TIM_PIN_ARRAY_LEN 44
|
||||||
|
TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN];
|
||||||
|
const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN];
|
||||||
|
|
||||||
|
#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PERIPH_H
|
||||||
123
ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.c
Normal file
123
ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.c
Normal file
@ -0,0 +1,123 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the MicroPython project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "py/obj.h"
|
||||||
|
#include "py/mphal.h"
|
||||||
|
#include "stm32f4/pins.h"
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PE02 = PIN(4, 2, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE03 = PIN(4, 3, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE04 = PIN(4, 4, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE05 = PIN(4, 5, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE06 = PIN(4, 6, NO_ADC);
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PC13 = PIN(2, 13, NO_ADC); //anti-tamp
|
||||||
|
const mcu_pin_obj_t pin_PC14 = PIN(2, 14, NO_ADC); //OSC32_IN
|
||||||
|
const mcu_pin_obj_t pin_PC15 = PIN(2, 15, NO_ADC); //OSC32_OUT
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PC00 = PIN(2, 0, ADC_INPUT(ADC_1,10));
|
||||||
|
const mcu_pin_obj_t pin_PC01 = PIN(2, 1, ADC_INPUT(ADC_1,11));
|
||||||
|
const mcu_pin_obj_t pin_PC02 = PIN(2, 2, ADC_INPUT(ADC_1,12));
|
||||||
|
const mcu_pin_obj_t pin_PC03 = PIN(2, 3, ADC_INPUT(ADC_1,13));
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PA00 = PIN(0, 0, ADC_INPUT(ADC_1,0));
|
||||||
|
const mcu_pin_obj_t pin_PA01 = PIN(0, 1, ADC_INPUT(ADC_1,1));
|
||||||
|
const mcu_pin_obj_t pin_PA02 = PIN(0, 2, ADC_INPUT(ADC_1,2));
|
||||||
|
const mcu_pin_obj_t pin_PA03 = PIN(0, 3, ADC_INPUT(ADC_1,3));
|
||||||
|
const mcu_pin_obj_t pin_PA04 = PIN(0, 4, ADC_INPUT(ADC_1,4));
|
||||||
|
const mcu_pin_obj_t pin_PA05 = PIN(0, 5, ADC_INPUT(ADC_1,5));
|
||||||
|
const mcu_pin_obj_t pin_PA06 = PIN(0, 6, ADC_INPUT(ADC_1,6));
|
||||||
|
const mcu_pin_obj_t pin_PA07 = PIN(0, 7, ADC_INPUT(ADC_1,7));
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PC04 = PIN(2, 4, ADC_INPUT(ADC_1,14));
|
||||||
|
const mcu_pin_obj_t pin_PC05 = PIN(2, 5, ADC_INPUT(ADC_1,15));
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PB00 = PIN(1, 0, ADC_INPUT(ADC_1,8));
|
||||||
|
const mcu_pin_obj_t pin_PB01 = PIN(1, 1, ADC_INPUT(ADC_1,9));
|
||||||
|
const mcu_pin_obj_t pin_PB02 = PIN(1, 2, NO_ADC);
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PE07 = PIN(4, 7, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE08 = PIN(4, 8, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE09 = PIN(4, 9, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE10 = PIN(4, 10, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE11 = PIN(4, 11, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE12 = PIN(4, 12, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE13 = PIN(4, 13, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE14 = PIN(4, 14, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE15 = PIN(4, 15, NO_ADC);
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PB10 = PIN(1, 10, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PB12 = PIN(1, 12, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PB13 = PIN(1, 13, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PB14 = PIN(1, 14, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PB15 = PIN(1, 15, NO_ADC);
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PD08 = PIN(3, 8, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD09 = PIN(3, 9, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD10 = PIN(3, 10, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD11 = PIN(3, 11, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD12 = PIN(3, 12, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD13 = PIN(3, 13, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD14 = PIN(3, 14, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD15 = PIN(3, 15, NO_ADC);
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PC06 = PIN(2, 6, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PC07 = PIN(2, 7, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PC08 = PIN(2, 8, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PC09 = PIN(2, 9, NO_ADC);
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PA08 = PIN(0, 8, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PA09 = PIN(0, 9, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PA10 = PIN(0, 10, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PA11 = PIN(0, 11, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PA12 = PIN(0, 12, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PA13 = PIN(0, 13, NO_ADC); //SWDIO
|
||||||
|
const mcu_pin_obj_t pin_PA14 = PIN(0, 14, NO_ADC); //SWCLK
|
||||||
|
const mcu_pin_obj_t pin_PA15 = PIN(0, 15, NO_ADC); //JTDI
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PC10 = PIN(2, 10, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PC11 = PIN(2, 11, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PC12 = PIN(2, 12, NO_ADC);
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PD00 = PIN(3, 0, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD01 = PIN(3, 1, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD02 = PIN(3, 2, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD03 = PIN(3, 3, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD04 = PIN(3, 4, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD05 = PIN(3, 5, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD06 = PIN(3, 6, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PD07 = PIN(3, 7, NO_ADC);
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PB03 = PIN(1, 3, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PB04 = PIN(1, 4, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PB05 = PIN(1, 5, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PB06 = PIN(1, 6, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PB07 = PIN(1, 7, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PB08 = PIN(1, 8, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PB09 = PIN(1, 9, NO_ADC);
|
||||||
|
|
||||||
|
const mcu_pin_obj_t pin_PE00 = PIN(4, 0, NO_ADC);
|
||||||
|
const mcu_pin_obj_t pin_PE01 = PIN(4, 1, NO_ADC);
|
||||||
121
ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.h
Normal file
121
ports/stm32f4/peripherals/stm32f4/stm32f401xe/pins.h
Normal file
@ -0,0 +1,121 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the MicroPython project, http://micropython.org/
|
||||||
|
*
|
||||||
|
* The MIT License (MIT)
|
||||||
|
*
|
||||||
|
* Copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H
|
||||||
|
#define MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H
|
||||||
|
|
||||||
|
//Pins in datasheet order: DocID026289 Rev 7 page 38. LQFP100 only
|
||||||
|
//pg 38
|
||||||
|
extern const mcu_pin_obj_t pin_PE02;
|
||||||
|
extern const mcu_pin_obj_t pin_PE03;
|
||||||
|
extern const mcu_pin_obj_t pin_PE04;
|
||||||
|
extern const mcu_pin_obj_t pin_PE05;
|
||||||
|
//pg 39
|
||||||
|
extern const mcu_pin_obj_t pin_PE06;
|
||||||
|
extern const mcu_pin_obj_t pin_PC13;
|
||||||
|
extern const mcu_pin_obj_t pin_PC14;
|
||||||
|
extern const mcu_pin_obj_t pin_PC15;
|
||||||
|
extern const mcu_pin_obj_t pin_PC00;
|
||||||
|
extern const mcu_pin_obj_t pin_PC01;
|
||||||
|
extern const mcu_pin_obj_t pin_PC02;
|
||||||
|
extern const mcu_pin_obj_t pin_PC03;
|
||||||
|
//pg 40
|
||||||
|
extern const mcu_pin_obj_t pin_PA00;
|
||||||
|
extern const mcu_pin_obj_t pin_PA01;
|
||||||
|
extern const mcu_pin_obj_t pin_PA02;
|
||||||
|
extern const mcu_pin_obj_t pin_PA03;
|
||||||
|
extern const mcu_pin_obj_t pin_PA04;
|
||||||
|
extern const mcu_pin_obj_t pin_PA05;
|
||||||
|
extern const mcu_pin_obj_t pin_PA06;
|
||||||
|
extern const mcu_pin_obj_t pin_PA07;
|
||||||
|
//pg 41
|
||||||
|
extern const mcu_pin_obj_t pin_PC04;
|
||||||
|
extern const mcu_pin_obj_t pin_PC05;
|
||||||
|
extern const mcu_pin_obj_t pin_PB00;
|
||||||
|
extern const mcu_pin_obj_t pin_PB01;
|
||||||
|
extern const mcu_pin_obj_t pin_PB02;
|
||||||
|
extern const mcu_pin_obj_t pin_PE07;
|
||||||
|
extern const mcu_pin_obj_t pin_PE08;
|
||||||
|
extern const mcu_pin_obj_t pin_PE09;
|
||||||
|
extern const mcu_pin_obj_t pin_PE10;
|
||||||
|
extern const mcu_pin_obj_t pin_PE11;
|
||||||
|
extern const mcu_pin_obj_t pin_PE12;
|
||||||
|
extern const mcu_pin_obj_t pin_PE13;
|
||||||
|
extern const mcu_pin_obj_t pin_PE14;
|
||||||
|
extern const mcu_pin_obj_t pin_PE15;
|
||||||
|
//pg 42
|
||||||
|
extern const mcu_pin_obj_t pin_PB10;
|
||||||
|
extern const mcu_pin_obj_t pin_PB12;
|
||||||
|
extern const mcu_pin_obj_t pin_PB13;
|
||||||
|
extern const mcu_pin_obj_t pin_PB14;
|
||||||
|
extern const mcu_pin_obj_t pin_PB15;
|
||||||
|
extern const mcu_pin_obj_t pin_PD08;
|
||||||
|
extern const mcu_pin_obj_t pin_PD09;
|
||||||
|
extern const mcu_pin_obj_t pin_PD10;
|
||||||
|
extern const mcu_pin_obj_t pin_PD11;
|
||||||
|
extern const mcu_pin_obj_t pin_PD12;
|
||||||
|
//pg 43
|
||||||
|
extern const mcu_pin_obj_t pin_PD13;
|
||||||
|
extern const mcu_pin_obj_t pin_PD14;
|
||||||
|
extern const mcu_pin_obj_t pin_PD15;
|
||||||
|
extern const mcu_pin_obj_t pin_PC06;
|
||||||
|
extern const mcu_pin_obj_t pin_PC07;
|
||||||
|
extern const mcu_pin_obj_t pin_PC08;
|
||||||
|
extern const mcu_pin_obj_t pin_PC09;
|
||||||
|
extern const mcu_pin_obj_t pin_PA08;
|
||||||
|
extern const mcu_pin_obj_t pin_PA09;
|
||||||
|
//pg 44
|
||||||
|
extern const mcu_pin_obj_t pin_PA10;
|
||||||
|
extern const mcu_pin_obj_t pin_PA11;
|
||||||
|
extern const mcu_pin_obj_t pin_PA12;
|
||||||
|
extern const mcu_pin_obj_t pin_PA13;
|
||||||
|
extern const mcu_pin_obj_t pin_PA14;
|
||||||
|
extern const mcu_pin_obj_t pin_PA15;
|
||||||
|
extern const mcu_pin_obj_t pin_PC10;
|
||||||
|
extern const mcu_pin_obj_t pin_PC11;
|
||||||
|
extern const mcu_pin_obj_t pin_PC12;
|
||||||
|
//pg 45
|
||||||
|
extern const mcu_pin_obj_t pin_PD00;
|
||||||
|
extern const mcu_pin_obj_t pin_PD01;
|
||||||
|
extern const mcu_pin_obj_t pin_PD02;
|
||||||
|
extern const mcu_pin_obj_t pin_PD03;
|
||||||
|
extern const mcu_pin_obj_t pin_PD04;
|
||||||
|
extern const mcu_pin_obj_t pin_PD05;
|
||||||
|
extern const mcu_pin_obj_t pin_PD06;
|
||||||
|
extern const mcu_pin_obj_t pin_PD07;
|
||||||
|
extern const mcu_pin_obj_t pin_PB03;
|
||||||
|
extern const mcu_pin_obj_t pin_PB04;
|
||||||
|
extern const mcu_pin_obj_t pin_PB05;
|
||||||
|
extern const mcu_pin_obj_t pin_PB06;
|
||||||
|
//pg 46
|
||||||
|
extern const mcu_pin_obj_t pin_PB07;
|
||||||
|
extern const mcu_pin_obj_t pin_PB08;
|
||||||
|
extern const mcu_pin_obj_t pin_PB09;
|
||||||
|
extern const mcu_pin_obj_t pin_PE00;
|
||||||
|
extern const mcu_pin_obj_t pin_PE01;
|
||||||
|
|
||||||
|
|
||||||
|
#endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F401XE_PINS_H
|
||||||
@ -32,6 +32,11 @@
|
|||||||
|
|
||||||
#include "py/mpconfig.h"
|
#include "py/mpconfig.h"
|
||||||
|
|
||||||
|
#ifdef STM32F401xE
|
||||||
|
#define STM32_FLASH_SIZE 0x80000 //512KiB
|
||||||
|
#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB
|
||||||
|
#endif
|
||||||
|
|
||||||
#ifdef STM32F411xE
|
#ifdef STM32F411xE
|
||||||
#define STM32_FLASH_SIZE 0x80000 //512KiB
|
#define STM32_FLASH_SIZE 0x80000 //512KiB
|
||||||
#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB
|
#define INTERNAL_FLASH_FILESYSTEM_SIZE 0xC000 //48KiB
|
||||||
|
|||||||
@ -50,7 +50,6 @@ safe_mode_t port_init(void) {
|
|||||||
stm32f4_peripherals_gpio_init();
|
stm32f4_peripherals_gpio_init();
|
||||||
|
|
||||||
tick_init();
|
tick_init();
|
||||||
board_init();
|
|
||||||
|
|
||||||
return NO_SAFE_MODE;
|
return NO_SAFE_MODE;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -58,7 +58,6 @@ STATIC void init_usb_vbus_sense(void) {
|
|||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void init_usb_hardware(void) {
|
void init_usb_hardware(void) {
|
||||||
//TODO: if future chips overload this with options, move to peripherals management.
|
//TODO: if future chips overload this with options, move to peripherals management.
|
||||||
|
|
||||||
@ -106,6 +105,7 @@ void init_usb_hardware(void) {
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Peripheral clock enable */
|
/* Peripheral clock enable */
|
||||||
|
__HAL_RCC_USB_OTG_FS_CLK_DISABLE();
|
||||||
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
|
__HAL_RCC_USB_OTG_FS_CLK_ENABLE();
|
||||||
|
|
||||||
init_usb_vbus_sense();
|
init_usb_vbus_sense();
|
||||||
|
|||||||
@ -1,3 +1,27 @@
|
|||||||
|
/*
|
||||||
|
* Taken from ST Cube library and modified. See below for original header.
|
||||||
|
*
|
||||||
|
* Modifications copyright (c) 2019 Lucian Copeland for Adafruit Industries
|
||||||
|
*
|
||||||
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||||
|
* of this software and associated documentation files (the "Software"), to deal
|
||||||
|
* in the Software without restriction, including without limitation the rights
|
||||||
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||||
|
* copies of the Software, and to permit persons to whom the Software is
|
||||||
|
* furnished to do so, subject to the following conditions:
|
||||||
|
*
|
||||||
|
* The above copyright notice and this permission notice shall be included in
|
||||||
|
* all copies or substantial portions of the Software.
|
||||||
|
*
|
||||||
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||||
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||||
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||||
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||||
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||||
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||||
|
* THE SOFTWARE.
|
||||||
|
*/
|
||||||
|
|
||||||
/**
|
/**
|
||||||
******************************************************************************
|
******************************************************************************
|
||||||
* @file system_stm32f4xx.c
|
* @file system_stm32f4xx.c
|
||||||
@ -63,6 +87,7 @@
|
|||||||
|
|
||||||
|
|
||||||
#include "stm32f4xx.h"
|
#include "stm32f4xx.h"
|
||||||
|
#include "py/mpconfig.h"
|
||||||
|
|
||||||
#if !defined (HSE_VALUE)
|
#if !defined (HSE_VALUE)
|
||||||
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
|
#define HSE_VALUE ((uint32_t)25000000) /*!< Default value of the External oscillator in Hz */
|
||||||
@ -193,10 +218,12 @@ void SystemInit(void)
|
|||||||
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
|
||||||
|
|
||||||
/* Configure the Vector Table location add offset address ------------------*/
|
/* Configure the Vector Table location add offset address ------------------*/
|
||||||
#ifdef VECT_TAB_SRAM
|
#if !defined(BOARD_VTOR_DEFER) //only set VTOR if the bootloader hasn't already
|
||||||
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
#ifdef VECT_TAB_SRAM
|
||||||
#else
|
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
|
||||||
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
#else
|
||||||
|
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
|
||||||
|
#endif
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -34,6 +34,11 @@
|
|||||||
|
|
||||||
#define SWAP(type, var1, var2) { type t = var2; var2 = var1; var1 = t; }
|
#define SWAP(type, var1, var2) { type t = var2; var2 = var1; var1 = t; }
|
||||||
|
|
||||||
|
#if __GNUC__ < 5
|
||||||
|
// n.b. does not actually detect overflow!
|
||||||
|
#define __builtin_mul_overflow(a, b, x) (*(x) = (a) * (b), false)
|
||||||
|
#endif
|
||||||
|
|
||||||
// Detect when a multiply causes an overflow.
|
// Detect when a multiply causes an overflow.
|
||||||
size_t mp_seq_multiply_len(size_t item_sz, size_t len) {
|
size_t mp_seq_multiply_len(size_t item_sz, size_t len) {
|
||||||
size_t new_len;
|
size_t new_len;
|
||||||
|
|||||||
@ -49,7 +49,7 @@
|
|||||||
//| as part of remote Services.
|
//| as part of remote Services.
|
||||||
//|
|
//|
|
||||||
|
|
||||||
//| .. method:: add_to_service(service, uuid, *, properties=0, read_perm=`Attribute.OPEN`, write_perm=`Attribute.OPEN`, max_length=20, fixed_length=False, initial_value=None)
|
//| .. method:: add_to_service(service, uuid, *, properties=0, read_perm=Attribute.OPEN, write_perm=Attribute.OPEN, max_length=20, fixed_length=False, initial_value=None)
|
||||||
//|
|
//|
|
||||||
//| Create a new Characteristic object, and add it to this Service.
|
//| Create a new Characteristic object, and add it to this Service.
|
||||||
//|
|
//|
|
||||||
|
|||||||
@ -163,13 +163,13 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_packet_buffer_deinit_obj, bleio_packet_bu
|
|||||||
|
|
||||||
//| .. attribute:: packet_size
|
//| .. attribute:: packet_size
|
||||||
//|
|
//|
|
||||||
//| Maximum size of each packet in bytes. This is the minimum of the Characterstic length and
|
//| Maximum size of each packet in bytes. This is the minimum of the Characteristic length and
|
||||||
//| the negotiated Maximum Transfer Unit (MTU).
|
//| the negotiated Maximum Transfer Unit (MTU).
|
||||||
//|
|
//|
|
||||||
STATIC mp_obj_t bleio_packet_buffer_get_packet_size(mp_obj_t self_in) {
|
STATIC mp_obj_t bleio_packet_buffer_get_packet_size(mp_obj_t self_in) {
|
||||||
bleio_packet_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in);
|
bleio_packet_buffer_obj_t *self = MP_OBJ_TO_PTR(self_in);
|
||||||
|
|
||||||
return mp_obj_new_bool(common_hal_bleio_packet_buffer_get_packet_size(self));
|
return MP_OBJ_NEW_SMALL_INT(common_hal_bleio_packet_buffer_get_packet_size(self));
|
||||||
}
|
}
|
||||||
STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_packet_buffer_get_packet_size_obj, bleio_packet_buffer_get_packet_size);
|
STATIC MP_DEFINE_CONST_FUN_OBJ_1(bleio_packet_buffer_get_packet_size_obj, bleio_packet_buffer_get_packet_size);
|
||||||
|
|
||||||
|
|||||||
@ -51,7 +51,7 @@
|
|||||||
//| Layer
|
//| Layer
|
||||||
//| Text
|
//| Text
|
||||||
//|
|
//|
|
||||||
//| .. function:: render(x0, y0, x1, y1, layers, buffer, display[, scale])
|
//| .. function:: render(x0, y0, x1, y1, layers, buffer, display[, scale[, background]])
|
||||||
//|
|
//|
|
||||||
//| Render and send to the display a fragment of the screen.
|
//| Render and send to the display a fragment of the screen.
|
||||||
//|
|
//|
|
||||||
@ -63,6 +63,7 @@
|
|||||||
//| :param bytearray buffer: A buffer to use for rendering.
|
//| :param bytearray buffer: A buffer to use for rendering.
|
||||||
//| :param ~displayio.Display display: The display to use.
|
//| :param ~displayio.Display display: The display to use.
|
||||||
//| :param int scale: How many times should the image be scaled up.
|
//| :param int scale: How many times should the image be scaled up.
|
||||||
|
//| :param int background: What color to display when nothing is there.
|
||||||
//|
|
//|
|
||||||
//| There are also no sanity checks, outside of the basic overflow
|
//| There are also no sanity checks, outside of the basic overflow
|
||||||
//| checking. The caller is responsible for making the passed parameters
|
//| checking. The caller is responsible for making the passed parameters
|
||||||
@ -92,12 +93,16 @@ STATIC mp_obj_t stage_render(size_t n_args, const mp_obj_t *args) {
|
|||||||
}
|
}
|
||||||
displayio_display_obj_t *display = MP_OBJ_TO_PTR(native_display);
|
displayio_display_obj_t *display = MP_OBJ_TO_PTR(native_display);
|
||||||
uint8_t scale = 1;
|
uint8_t scale = 1;
|
||||||
if (n_args >= 8) {
|
if (n_args > 7) {
|
||||||
scale = mp_obj_get_int(args[7]);
|
scale = mp_obj_get_int(args[7]);
|
||||||
}
|
}
|
||||||
|
uint16_t background = 0;
|
||||||
|
if (n_args > 8) {
|
||||||
|
background = mp_obj_get_int(args[8]);
|
||||||
|
}
|
||||||
|
|
||||||
render_stage(x0, y0, x1, y1, layers, layers_size, buffer, buffer_size,
|
render_stage(x0, y0, x1, y1, layers, layers_size, buffer, buffer_size,
|
||||||
display, scale);
|
display, scale, background);
|
||||||
|
|
||||||
return mp_const_none;
|
return mp_const_none;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -34,7 +34,8 @@
|
|||||||
void render_stage(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1,
|
void render_stage(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1,
|
||||||
mp_obj_t *layers, size_t layers_size,
|
mp_obj_t *layers, size_t layers_size,
|
||||||
uint16_t *buffer, size_t buffer_size,
|
uint16_t *buffer, size_t buffer_size,
|
||||||
displayio_display_obj_t *display, uint8_t scale) {
|
displayio_display_obj_t *display,
|
||||||
|
uint8_t scale, uint16_t background) {
|
||||||
|
|
||||||
|
|
||||||
displayio_area_t area;
|
displayio_area_t area;
|
||||||
@ -68,6 +69,9 @@ void render_stage(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1,
|
|||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
if (c == TRANSPARENT) {
|
||||||
|
c = background;
|
||||||
|
}
|
||||||
for (uint8_t xscale = 0; xscale < scale; ++xscale) {
|
for (uint8_t xscale = 0; xscale < scale; ++xscale) {
|
||||||
buffer[index] = c;
|
buffer[index] = c;
|
||||||
index += 1;
|
index += 1;
|
||||||
|
|||||||
@ -37,6 +37,7 @@
|
|||||||
void render_stage(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1,
|
void render_stage(uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1,
|
||||||
mp_obj_t *layers, size_t layers_size,
|
mp_obj_t *layers, size_t layers_size,
|
||||||
uint16_t *buffer, size_t buffer_size,
|
uint16_t *buffer, size_t buffer_size,
|
||||||
displayio_display_obj_t *display, uint8_t scale);
|
displayio_display_obj_t *display,
|
||||||
|
uint8_t scale, uint16_t background);
|
||||||
|
|
||||||
#endif // MICROPY_INCLUDED_SHARED_MODULE__STAGE
|
#endif // MICROPY_INCLUDED_SHARED_MODULE__STAGE
|
||||||
|
|||||||
@ -16,6 +16,9 @@
|
|||||||
#include "supervisor/shared/display.h"
|
#include "supervisor/shared/display.h"
|
||||||
#include "supervisor/memory.h"
|
#include "supervisor/memory.h"
|
||||||
|
|
||||||
|
#include "supervisor/spi_flash_api.h"
|
||||||
|
#include "py/mpconfig.h"
|
||||||
|
|
||||||
primary_display_t displays[CIRCUITPY_DISPLAY_LIMIT];
|
primary_display_t displays[CIRCUITPY_DISPLAY_LIMIT];
|
||||||
|
|
||||||
// Check for recursive calls to displayio_background.
|
// Check for recursive calls to displayio_background.
|
||||||
@ -100,6 +103,11 @@ void reset_displays(void) {
|
|||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
#ifdef BOARD_USE_INTERNAL_SPI
|
||||||
|
if (original_spi == (mp_obj_t)(&supervisor_flash_spi_bus)) {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
memcpy(&fourwire->inline_bus, original_spi, sizeof(busio_spi_obj_t));
|
memcpy(&fourwire->inline_bus, original_spi, sizeof(busio_spi_obj_t));
|
||||||
fourwire->bus = &fourwire->inline_bus;
|
fourwire->bus = &fourwire->inline_bus;
|
||||||
// Check for other displays that use the same spi bus and swap them too.
|
// Check for other displays that use the same spi bus and swap them too.
|
||||||
|
|||||||
@ -36,33 +36,33 @@
|
|||||||
#include "py/mpconfig.h"
|
#include "py/mpconfig.h"
|
||||||
|
|
||||||
digitalio_digitalinout_obj_t cs_pin;
|
digitalio_digitalinout_obj_t cs_pin;
|
||||||
busio_spi_obj_t spi;
|
busio_spi_obj_t supervisor_flash_spi_bus;
|
||||||
|
|
||||||
const external_flash_device* flash_device;
|
const external_flash_device* flash_device;
|
||||||
uint32_t spi_flash_baudrate;
|
uint32_t spi_flash_baudrate;
|
||||||
|
|
||||||
// Enable the flash over SPI.
|
// Enable the flash over SPI.
|
||||||
static void flash_enable(void) {
|
static void flash_enable(void) {
|
||||||
while (!common_hal_busio_spi_try_lock(&spi)) {}
|
while (!common_hal_busio_spi_try_lock(&supervisor_flash_spi_bus)) {}
|
||||||
common_hal_digitalio_digitalinout_set_value(&cs_pin, false);
|
common_hal_digitalio_digitalinout_set_value(&cs_pin, false);
|
||||||
}
|
}
|
||||||
|
|
||||||
// Disable the flash over SPI.
|
// Disable the flash over SPI.
|
||||||
static void flash_disable(void) {
|
static void flash_disable(void) {
|
||||||
common_hal_digitalio_digitalinout_set_value(&cs_pin, true);
|
common_hal_digitalio_digitalinout_set_value(&cs_pin, true);
|
||||||
common_hal_busio_spi_unlock(&spi);
|
common_hal_busio_spi_unlock(&supervisor_flash_spi_bus);
|
||||||
}
|
}
|
||||||
|
|
||||||
static bool transfer(uint8_t* command, uint32_t command_length, uint8_t* data_in, uint8_t* data_out, uint32_t data_length) {
|
static bool transfer(uint8_t* command, uint32_t command_length, uint8_t* data_in, uint8_t* data_out, uint32_t data_length) {
|
||||||
flash_enable();
|
flash_enable();
|
||||||
bool status = common_hal_busio_spi_write(&spi, command, command_length);
|
bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, command, command_length);
|
||||||
if (status) {
|
if (status) {
|
||||||
if (data_in != NULL && data_out != NULL) {
|
if (data_in != NULL && data_out != NULL) {
|
||||||
status = common_hal_busio_spi_transfer(&spi, data_out, data_in, data_length);
|
status = common_hal_busio_spi_transfer(&supervisor_flash_spi_bus, data_out, data_in, data_length);
|
||||||
} else if (data_out != NULL) {
|
} else if (data_out != NULL) {
|
||||||
status = common_hal_busio_spi_read(&spi, data_out, data_length, 0xff);
|
status = common_hal_busio_spi_read(&supervisor_flash_spi_bus, data_out, data_length, 0xff);
|
||||||
} else if (data_in != NULL) {
|
} else if (data_in != NULL) {
|
||||||
status = common_hal_busio_spi_write(&spi, data_in, data_length);
|
status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, data_in, data_length);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
flash_disable();
|
flash_disable();
|
||||||
@ -103,10 +103,10 @@ bool spi_flash_write_data(uint32_t address, uint8_t* data, uint32_t data_length)
|
|||||||
// Write the SPI flash write address into the bytes following the command byte.
|
// Write the SPI flash write address into the bytes following the command byte.
|
||||||
address_to_bytes(address, request + 1);
|
address_to_bytes(address, request + 1);
|
||||||
flash_enable();
|
flash_enable();
|
||||||
common_hal_busio_spi_configure(&spi, spi_flash_baudrate, 0, 0, 8);
|
common_hal_busio_spi_configure(&supervisor_flash_spi_bus, spi_flash_baudrate, 0, 0, 8);
|
||||||
bool status = common_hal_busio_spi_write(&spi, request, 4);
|
bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, request, 4);
|
||||||
if (status) {
|
if (status) {
|
||||||
status = common_hal_busio_spi_write(&spi, data, data_length);
|
status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, data, data_length);
|
||||||
}
|
}
|
||||||
flash_disable();
|
flash_disable();
|
||||||
return status;
|
return status;
|
||||||
@ -122,10 +122,10 @@ bool spi_flash_read_data(uint32_t address, uint8_t* data, uint32_t data_length)
|
|||||||
// Write the SPI flash write address into the bytes following the command byte.
|
// Write the SPI flash write address into the bytes following the command byte.
|
||||||
address_to_bytes(address, request + 1);
|
address_to_bytes(address, request + 1);
|
||||||
flash_enable();
|
flash_enable();
|
||||||
common_hal_busio_spi_configure(&spi, spi_flash_baudrate, 0, 0, 8);
|
common_hal_busio_spi_configure(&supervisor_flash_spi_bus, spi_flash_baudrate, 0, 0, 8);
|
||||||
bool status = common_hal_busio_spi_write(&spi, request, command_length);
|
bool status = common_hal_busio_spi_write(&supervisor_flash_spi_bus, request, command_length);
|
||||||
if (status) {
|
if (status) {
|
||||||
status = common_hal_busio_spi_read(&spi, data, data_length, 0xff);
|
status = common_hal_busio_spi_read(&supervisor_flash_spi_bus, data, data_length, 0xff);
|
||||||
}
|
}
|
||||||
flash_disable();
|
flash_disable();
|
||||||
return status;
|
return status;
|
||||||
@ -140,9 +140,9 @@ void spi_flash_init(void) {
|
|||||||
common_hal_digitalio_digitalinout_switch_to_output(&cs_pin, true, DRIVE_MODE_PUSH_PULL);
|
common_hal_digitalio_digitalinout_switch_to_output(&cs_pin, true, DRIVE_MODE_PUSH_PULL);
|
||||||
common_hal_digitalio_digitalinout_never_reset(&cs_pin);
|
common_hal_digitalio_digitalinout_never_reset(&cs_pin);
|
||||||
|
|
||||||
spi.base.type = &busio_spi_type;
|
supervisor_flash_spi_bus.base.type = &busio_spi_type;
|
||||||
common_hal_busio_spi_construct(&spi, SPI_FLASH_SCK_PIN, SPI_FLASH_MOSI_PIN, SPI_FLASH_MISO_PIN);
|
common_hal_busio_spi_construct(&supervisor_flash_spi_bus, SPI_FLASH_SCK_PIN, SPI_FLASH_MOSI_PIN, SPI_FLASH_MISO_PIN);
|
||||||
common_hal_busio_spi_never_reset(&spi);
|
common_hal_busio_spi_never_reset(&supervisor_flash_spi_bus);
|
||||||
}
|
}
|
||||||
|
|
||||||
void spi_flash_init_device(const external_flash_device* device) {
|
void spi_flash_init_device(const external_flash_device* device) {
|
||||||
|
|||||||
@ -31,6 +31,10 @@
|
|||||||
|
|
||||||
#include "supervisor/shared/external_flash/devices.h"
|
#include "supervisor/shared/external_flash/devices.h"
|
||||||
|
|
||||||
|
#include "shared-bindings/busio/SPI.h"
|
||||||
|
|
||||||
|
extern busio_spi_obj_t supervisor_flash_spi_bus; //Used to share SPI bus on some boards
|
||||||
|
|
||||||
// This API is implemented for both normal SPI peripherals and QSPI peripherals.
|
// This API is implemented for both normal SPI peripherals and QSPI peripherals.
|
||||||
|
|
||||||
bool spi_flash_command(uint8_t command);
|
bool spi_flash_command(uint8_t command);
|
||||||
|
|||||||
@ -1 +1 @@
|
|||||||
Subproject commit 84da66ce62215c1daa62204f2c3fa83c05143a42
|
Subproject commit adbb8c7260f938e810eb37f2287f8e1a055ff402
|
||||||
Loading…
Reference in New Issue
Block a user