atmel-samd: Introduce audiobusio.PDMIn for recording audio from PDM
microphones.
This commit is contained in:
Scott Shawcroft
Scott Shawcroft
parent
48375ba954
commit
557ceded00
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@ -120,6 +120,7 @@ CFLAGS_CORTEX_M0 = \
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-DTCC_ASYNC=false \
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-DADC_CALLBACK_MODE=false \
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-DEVENTS_INTERRUPT_HOOKS_MODE=false \
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-DI2S_CALLBACK_MODE=false \
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-DTC_ASYNC=true \
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-DUSB_DEVICE_LPM_SUPPORT \
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-DCIRCUITPY_CANARY_WORD=0xADAF00 \
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@ -162,6 +163,7 @@ SRC_ASF = $(addprefix asf/sam0/,\
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drivers/events/events_sam_d_r/events.c \
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drivers/extint/extint_callback.c \
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drivers/extint/extint_sam_d_r/extint.c \
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drivers/i2s/i2s.c \
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drivers/nvm/nvm.c \
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drivers/port/port.c \
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drivers/sercom/i2c/i2c_sam0/i2c_master.c \
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@ -233,6 +235,8 @@ SRC_COMMON_HAL = \
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analogio/__init__.c \
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analogio/AnalogIn.c \
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analogio/AnalogOut.c \
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audiobusio/__init__.c \
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audiobusio/PDMIn.c \
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audioio/__init__.c \
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audioio/AudioOut.c \
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board/__init__.c \
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@ -0,0 +1,750 @@
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/**
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* \file
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*
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* \brief SAM I2S - Inter-IC Sound Controller
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*
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* Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#include "i2s.h"
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/**
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* \brief Initializes a hardware I<SUP>2</SUP>S module instance
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*
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* Enables the clock and initialize the I<SUP>2</SUP>S module.
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*
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* \param[in,out] module_inst Pointer to the software module instance struct
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* \param[in] hw Pointer to the TCC hardware module
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*
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* \return Status of the initialization procedure.
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*
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* \retval STATUS_OK The module was initialized successfully
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* \retval STATUS_BUSY Hardware module was busy when the
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* initialization procedure was attempted
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* \retval STATUS_ERR_DENIED Hardware module was already enabled
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*/
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enum status_code i2s_init(
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struct i2s_module *const module_inst,
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I2s *hw)
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{
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Assert(module_inst);
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Assert(hw);
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/* Enable the user interface clock in the PM */
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system_apb_clock_set_mask(SYSTEM_CLOCK_APB_APBC, PM_APBCMASK_I2S);
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/* Status check */
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uint32_t ctrla;
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ctrla = module_inst->hw->CTRLA.reg;
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if (ctrla & I2S_CTRLA_ENABLE) {
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if (ctrla & (I2S_CTRLA_SEREN1 |
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I2S_CTRLA_SEREN0 | I2S_CTRLA_CKEN1 | I2S_CTRLA_CKEN0)) {
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return STATUS_BUSY;
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} else {
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return STATUS_ERR_DENIED;
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}
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}
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/* Initialize module */
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module_inst->hw = hw;
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/* Initialize serializers */
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#if I2S_CALLBACK_MODE == true
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int i, j;
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for (i = 0; i < 2; i ++) {
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for (j = 0; j < I2S_SERIALIZER_CALLBACK_N; j ++) {
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module_inst->serializer[i].callback[j] = NULL;
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}
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module_inst->serializer[i].registered_callback_mask = 0;
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module_inst->serializer[i].enabled_callback_mask = 0;
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module_inst->serializer[i].job_buffer = NULL;
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module_inst->serializer[i].job_status = STATUS_OK;
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module_inst->serializer[i].requested_words = 0;
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module_inst->serializer[i].transferred_words = 0;
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module_inst->serializer[i].mode = I2S_SERIALIZER_RECEIVE;
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module_inst->serializer[i].data_size = I2S_DATA_SIZE_32BIT;
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}
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_i2s_instances[0] = module_inst;
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system_interrupt_enable(SYSTEM_INTERRUPT_MODULE_I2S);
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#endif
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return STATUS_OK;
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}
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/**
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* \brief Configure specified I<SUP>2</SUP>S clock unit
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*
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* Enables the clock and initialize the clock unit, based on the given
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* configurations.
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*
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* \param[in,out] module_inst Pointer to the software module instance struct
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* \param[in] clock_unit I<SUP>2</SUP>S clock unit to initialize and configure
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* \param[in] config Pointer to the I<SUP>2</SUP>S clock unit configuration
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* options struct
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*
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* \return Status of the configuration procedure.
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*
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* \retval STATUS_OK The module was initialized successfully
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* \retval STATUS_BUSY Hardware module was busy when the
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* configuration procedure was attempted
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* \retval STATUS_ERR_DENIED Hardware module was already enabled
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* \retval STATUS_ERR_INVALID_ARG Invalid divider value or
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* MCK direction setting conflict
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*/
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enum status_code i2s_clock_unit_set_config(
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struct i2s_module *const module_inst,
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const enum i2s_clock_unit clock_unit,
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const struct i2s_clock_unit_config *config)
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{
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Assert(module_inst);
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Assert(module_inst->hw);
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Assert(clock_unit < I2S_CLOCK_UNIT_N);
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Assert(config);
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/* Status check */
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uint32_t ctrla, syncbusy;
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syncbusy = module_inst->hw->SYNCBUSY.reg;
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ctrla = module_inst->hw->CTRLA.reg;
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/* Busy ? */
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if (syncbusy & (I2S_SYNCBUSY_CKEN0 << clock_unit)) {
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return STATUS_BUSY;
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}
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/* Already enabled ? */
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if (ctrla & (I2S_CTRLA_CKEN0 << clock_unit)) {
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return STATUS_ERR_DENIED;
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}
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/* Parameter check */
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if (config->clock.mck_src && config->clock.mck_out_enable) {
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return STATUS_ERR_INVALID_ARG;
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}
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/* Initialize Clock Unit */
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uint32_t clkctrl =
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(config->clock.mck_out_invert ? I2S_CLKCTRL_MCKOUTINV : 0) |
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(config->clock.sck_out_invert ? I2S_CLKCTRL_SCKOUTINV : 0) |
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(config->frame.frame_sync.invert_out ? I2S_CLKCTRL_FSOUTINV : 0) |
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(config->clock.mck_out_enable ? I2S_CLKCTRL_MCKEN : 0) |
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(config->clock.mck_src ? I2S_CLKCTRL_MCKSEL : 0) |
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(config->clock.sck_src ? I2S_CLKCTRL_SCKSEL : 0) |
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(config->frame.frame_sync.invert_use ? I2S_CLKCTRL_FSINV : 0) |
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(config->frame.frame_sync.source ? I2S_CLKCTRL_FSSEL : 0) |
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(config->frame.data_delay ? I2S_CLKCTRL_BITDELAY : 0);
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uint8_t div_val = config->clock.mck_out_div;
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if ((div_val > 0x21) || (div_val == 0)) {
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return STATUS_ERR_INVALID_ARG;
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} else {
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div_val --;
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}
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clkctrl |= I2S_CLKCTRL_MCKOUTDIV(div_val);
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div_val = config->clock.sck_div;
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if ((div_val > 0x21) || (div_val == 0)) {
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return STATUS_ERR_INVALID_ARG;
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} else {
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div_val --;
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}
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clkctrl |= I2S_CLKCTRL_MCKDIV(div_val);
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uint8_t number_slots = config->frame.number_slots;
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if (number_slots > 8) {
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return STATUS_ERR_INVALID_ARG;
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} else if (number_slots > 0) {
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number_slots --;
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}
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clkctrl |=
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I2S_CLKCTRL_NBSLOTS(number_slots) |
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I2S_CLKCTRL_FSWIDTH(config->frame.frame_sync.width) |
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I2S_CLKCTRL_SLOTSIZE(config->frame.slot_size);
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/* Write clock unit configurations */
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module_inst->hw->CLKCTRL[clock_unit].reg = clkctrl;
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/* Select general clock source */
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const uint8_t i2s_gclk_ids[2] = {I2S_GCLK_ID_0, I2S_GCLK_ID_1};
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struct system_gclk_chan_config gclk_chan_config;
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system_gclk_chan_get_config_defaults(&gclk_chan_config);
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gclk_chan_config.source_generator = config->clock.gclk_src;
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system_gclk_chan_set_config(i2s_gclk_ids[clock_unit], &gclk_chan_config);
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system_gclk_chan_enable(i2s_gclk_ids[clock_unit]);
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/* Initialize pins */
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struct system_pinmux_config pin_config;
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system_pinmux_get_config_defaults(&pin_config);
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if (config->mck_pin.enable) {
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pin_config.mux_position = config->mck_pin.mux;
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system_pinmux_pin_set_config(config->mck_pin.gpio, &pin_config);
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}
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if (config->sck_pin.enable) {
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pin_config.mux_position = config->sck_pin.mux;
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system_pinmux_pin_set_config(config->sck_pin.gpio, &pin_config);
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}
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if (config->fs_pin.enable) {
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pin_config.mux_position = config->fs_pin.mux;
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system_pinmux_pin_set_config(config->fs_pin.gpio, &pin_config);
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}
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return STATUS_OK;
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}
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/**
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* \brief Configure specified I<SUP>2</SUP>S serializer
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*
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* Enables the clock and initialize the serializer, based on the given
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* configurations.
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*
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* \param[in,out] module_inst Pointer to the software module instance struct
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* \param[in] serializer I<SUP>2</SUP>S serializer to initialize and configure
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* \param[in] config Pointer to the I<SUP>2</SUP>S serializer configuration
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* options struct
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*
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* \return Status of the configuration procedure.
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*
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* \retval STATUS_OK The module was initialized successfully
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* \retval STATUS_BUSY Hardware module was busy when the
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* configuration procedure was attempted
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* \retval STATUS_ERR_DENIED Hardware module was already enabled
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*/
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enum status_code i2s_serializer_set_config(
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struct i2s_module *const module_inst,
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const enum i2s_serializer serializer,
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const struct i2s_serializer_config *config)
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{
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Assert(module_inst);
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Assert(module_inst->hw);
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Assert(serializer < I2S_SERIALIZER_N);
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Assert(config);
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/* Status check */
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uint32_t ctrla, syncbusy;
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syncbusy = module_inst->hw->SYNCBUSY.reg;
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ctrla = module_inst->hw->CTRLA.reg;
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/* Busy ? */
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if (syncbusy & ((I2S_SYNCBUSY_SEREN0 | I2S_SYNCBUSY_DATA0) << serializer)) {
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return STATUS_BUSY;
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}
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/* Already enabled ? */
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if (ctrla & (I2S_CTRLA_CKEN0 << serializer)) {
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return STATUS_ERR_DENIED;
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}
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/* Initialize Serializer */
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uint32_t serctrl =
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(config->loop_back ? I2S_SERCTRL_RXLOOP : 0) |
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(config->dma_usage ? I2S_SERCTRL_DMA : 0) |
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(config->mono_mode ? I2S_SERCTRL_MONO : 0) |
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(config->disable_data_slot[7] ? I2S_SERCTRL_SLOTDIS7 : 0) |
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(config->disable_data_slot[6] ? I2S_SERCTRL_SLOTDIS6 : 0) |
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(config->disable_data_slot[5] ? I2S_SERCTRL_SLOTDIS5 : 0) |
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(config->disable_data_slot[4] ? I2S_SERCTRL_SLOTDIS4 : 0) |
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(config->disable_data_slot[3] ? I2S_SERCTRL_SLOTDIS3 : 0) |
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(config->disable_data_slot[2] ? I2S_SERCTRL_SLOTDIS2 : 0) |
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(config->disable_data_slot[1] ? I2S_SERCTRL_SLOTDIS1 : 0) |
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(config->disable_data_slot[0] ? I2S_SERCTRL_SLOTDIS0 : 0) |
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(config->transfer_lsb_first ? I2S_SERCTRL_BITREV : 0) |
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(config->data_adjust_left_in_word ? I2S_SERCTRL_WORDADJ : 0) |
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(config->data_adjust_left_in_slot ? I2S_SERCTRL_SLOTADJ : 0) |
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(config->data_padding ? I2S_SERCTRL_TXSAME : 0);
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if (config->clock_unit < I2S_CLOCK_UNIT_N) {
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serctrl |= (config->clock_unit ? I2S_SERCTRL_CLKSEL : 0);
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} else {
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return STATUS_ERR_INVALID_ARG;
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}
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serctrl |=
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I2S_SERCTRL_SERMODE(config->mode) |
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I2S_SERCTRL_TXDEFAULT(config->line_default_state) |
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I2S_SERCTRL_DATASIZE(config->data_size) |
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I2S_SERCTRL_EXTEND(config->bit_padding);
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/* Write Serializer configuration */
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module_inst->hw->SERCTRL[serializer].reg = serctrl;
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/* Initialize pins */
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struct system_pinmux_config pin_config;
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system_pinmux_get_config_defaults(&pin_config);
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if (config->data_pin.enable) {
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pin_config.mux_position = config->data_pin.mux;
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system_pinmux_pin_set_config(config->data_pin.gpio, &pin_config);
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}
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/* Save configure */
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module_inst->serializer[serializer].mode = config->mode;
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module_inst->serializer[serializer].data_size = config->data_size;
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return STATUS_OK;
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}
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/**
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* \brief Retrieves the current module status.
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*
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* Retrieves the status of the module, giving overall state information.
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*
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* \param[in] module_inst Pointer to the I<SUP>2</SUP>S software instance struct
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*
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* \return Bitmask of \c I2S_STATUS_* flags.
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*
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* \retval I2S_STATUS_SYNC_BUSY Module is busy synchronization
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* \retval I2S_STATUS_TRANSMIT_UNDERRUN(x) Serializer x (0~1) is underrun
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* \retval I2S_STATUS_TRANSMIT_READY(x) Serializer x (0~1) is ready to
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* transmit new data word
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* \retval I2S_STATUS_RECEIVE_OVERRUN(x) Serializer x (0~1) is overrun
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* \retval I2S_STATUS_RECEIVE_READY(x) Serializer x (0~1) has data ready to
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* read
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*/
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uint32_t i2s_get_status(
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const struct i2s_module *const module_inst)
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{
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/* Sanity check arguments */
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Assert(module_inst);
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Assert(module_inst->hw);
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uint32_t intflag = module_inst->hw->INTFLAG.reg;
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uint32_t status;
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if (module_inst->hw->SYNCBUSY.reg) {
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status = I2S_STATUS_SYNC_BUSY;
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} else {
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status = 0;
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}
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if (intflag & I2S_INTFLAG_TXUR0) {
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status |= I2S_STATUS_TRANSMIT_UNDERRUN(0);
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}
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if (intflag & I2S_INTFLAG_TXUR1) {
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status |= I2S_STATUS_TRANSMIT_UNDERRUN(1);
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}
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if ((intflag & I2S_INTFLAG_TXRDY0) &&
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!module_inst->hw->SYNCBUSY.bit.DATA0) {
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status |= I2S_STATUS_TRANSMIT_READY(0);
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}
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if ((intflag & I2S_INTFLAG_TXRDY1) &&
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!module_inst->hw->SYNCBUSY.bit.DATA1) {
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status |= I2S_STATUS_TRANSMIT_READY(1);
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}
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if (intflag & I2S_INTFLAG_RXOR0) {
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status |= I2S_STATUS_RECEIVE_OVERRUN(0);
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}
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if (intflag & I2S_INTFLAG_RXOR1) {
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status |= I2S_STATUS_RECEIVE_OVERRUN(1);
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}
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if (intflag & I2S_INTFLAG_RXRDY0) {
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status |= I2S_STATUS_RECEIVE_READY(0);
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}
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if (intflag & I2S_INTFLAG_RXRDY1) {
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status |= I2S_STATUS_RECEIVE_READY(1);
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}
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return status;
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}
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||||
|
||||
/**
|
||||
* \brief Clears a module status flags.
|
||||
*
|
||||
* Clears the given status flags of the module.
|
||||
*
|
||||
* \param[in] module_inst Pointer to the I<SUP>2</SUP>S software instance struct
|
||||
* \param[in] status Bitmask of \c I2S_STATUS_* flags to clear
|
||||
*/
|
||||
void i2s_clear_status(
|
||||
const struct i2s_module *const module_inst,
|
||||
uint32_t status)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
uint32_t intflag = 0;
|
||||
|
||||
if (status & I2S_STATUS_TRANSMIT_UNDERRUN(0)) {
|
||||
intflag = I2S_INTFLAG_TXUR0;
|
||||
}
|
||||
if (status & I2S_STATUS_TRANSMIT_UNDERRUN(1)) {
|
||||
intflag = I2S_INTFLAG_TXUR1;
|
||||
}
|
||||
if (status & I2S_STATUS_TRANSMIT_READY(0)) {
|
||||
intflag = I2S_INTFLAG_TXRDY0;
|
||||
}
|
||||
if (status & I2S_STATUS_TRANSMIT_READY(1)) {
|
||||
intflag = I2S_INTFLAG_TXRDY1;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_OVERRUN(0)) {
|
||||
intflag = I2S_INTFLAG_RXOR0;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_OVERRUN(1)) {
|
||||
intflag = I2S_INTFLAG_RXOR1;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_READY(0)) {
|
||||
intflag = I2S_INTFLAG_RXRDY0;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_READY(1)) {
|
||||
intflag = I2S_INTFLAG_RXRDY1;
|
||||
}
|
||||
module_inst->hw->INTFLAG.reg = intflag;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enable interrupts on status set
|
||||
*
|
||||
* Enable the given status interrupt request from the I<SUP>2</SUP>S module.
|
||||
*
|
||||
* \param[in] module_inst Pointer to the I<SUP>2</SUP>S software instance struct
|
||||
* \param[in] status Status interrupts to enable
|
||||
*
|
||||
* \return Status of enable procedure.
|
||||
*
|
||||
* \retval STATUS_OK Interrupt is enabled successfully
|
||||
* \retval STATUS_ERR_INVALID_ARG Status with no interrupt is passed
|
||||
*/
|
||||
enum status_code i2s_enable_status_interrupt(
|
||||
struct i2s_module *const module_inst,
|
||||
uint32_t status)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
|
||||
/* No sync busy interrupt */
|
||||
if (status & I2S_STATUS_SYNC_BUSY) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
Assert(module_inst->hw);
|
||||
|
||||
uint32_t intflag = 0;
|
||||
if (status & I2S_STATUS_TRANSMIT_UNDERRUN(0)) {
|
||||
intflag = I2S_INTFLAG_TXUR0;
|
||||
}
|
||||
if (status & I2S_STATUS_TRANSMIT_UNDERRUN(1)) {
|
||||
intflag = I2S_INTFLAG_TXUR1;
|
||||
}
|
||||
if (status & I2S_STATUS_TRANSMIT_READY(0)) {
|
||||
intflag = I2S_INTFLAG_TXRDY0;
|
||||
}
|
||||
if (status & I2S_STATUS_TRANSMIT_READY(1)) {
|
||||
intflag = I2S_INTFLAG_TXRDY1;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_OVERRUN(0)) {
|
||||
intflag = I2S_INTFLAG_RXOR0;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_OVERRUN(1)) {
|
||||
intflag = I2S_INTFLAG_RXOR1;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_READY(0)) {
|
||||
intflag = I2S_INTFLAG_RXRDY0;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_READY(1)) {
|
||||
intflag = I2S_INTFLAG_RXRDY1;
|
||||
}
|
||||
module_inst->hw->INTENSET.reg = intflag;
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disable interrupts on status set
|
||||
*
|
||||
* Disable the given status interrupt request from the I<SUP>2</SUP>S module.
|
||||
*
|
||||
* \param[in] module_inst Pointer to the I<SUP>2</SUP>S software instance struct
|
||||
* \param[in] status Status interrupts to disable
|
||||
*/
|
||||
void i2s_disable_status_interrupt(
|
||||
struct i2s_module *const module_inst,
|
||||
uint32_t status)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
uint32_t intflag = 0;
|
||||
if (status & I2S_STATUS_TRANSMIT_UNDERRUN(0)) {
|
||||
intflag = I2S_INTFLAG_TXUR0;
|
||||
}
|
||||
if (status & I2S_STATUS_TRANSMIT_UNDERRUN(1)) {
|
||||
intflag = I2S_INTFLAG_TXUR1;
|
||||
}
|
||||
if (status & I2S_STATUS_TRANSMIT_READY(0)) {
|
||||
intflag = I2S_INTFLAG_TXRDY0;
|
||||
}
|
||||
if (status & I2S_STATUS_TRANSMIT_READY(1)) {
|
||||
intflag = I2S_INTFLAG_TXRDY1;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_OVERRUN(0)) {
|
||||
intflag = I2S_INTFLAG_RXOR0;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_OVERRUN(1)) {
|
||||
intflag = I2S_INTFLAG_RXOR1;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_READY(0)) {
|
||||
intflag = I2S_INTFLAG_RXRDY0;
|
||||
}
|
||||
if (status & I2S_STATUS_RECEIVE_READY(1)) {
|
||||
intflag = I2S_INTFLAG_RXRDY1;
|
||||
}
|
||||
module_inst->hw->INTENCLR.reg = intflag;
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* \brief Write buffer to the specified Serializer of I<SUP>2</SUP>S module
|
||||
*
|
||||
* \param[in] module_inst Pointer to the software module instance struct
|
||||
* \param[in] serializer The serializer to write to
|
||||
* \param[in] buffer The data buffer to write
|
||||
* \param[in] size Number of data words to write
|
||||
*
|
||||
* \return Status of the initialization procedure.
|
||||
*
|
||||
* \retval STATUS_OK The data was sent successfully
|
||||
* \retval STATUS_ERR_DENIED The module or serializer is disabled
|
||||
* \retval STATUS_ERR_INVALID_ARG An invalid buffer pointer was supplied
|
||||
*/
|
||||
enum status_code i2s_serializer_write_buffer_wait(
|
||||
const struct i2s_module *const module_inst,
|
||||
enum i2s_serializer serializer,
|
||||
void *buffer, uint32_t size)
|
||||
{
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
Assert(serializer < I2S_SERIALIZER_N);
|
||||
Assert(buffer);
|
||||
|
||||
if (size == 0) {
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
uint8_t data_size = 1; /* number of bytes */
|
||||
struct i2s_serializer_module *data_module = (struct i2s_serializer_module *)
|
||||
&module_inst->serializer[serializer];
|
||||
|
||||
/* Check buffer */
|
||||
switch(data_module->data_size) {
|
||||
case I2S_DATA_SIZE_32BIT:
|
||||
case I2S_DATA_SIZE_24BIT:
|
||||
case I2S_DATA_SIZE_20BIT:
|
||||
case I2S_DATA_SIZE_18BIT:
|
||||
if ((uint32_t)buffer & 0x3) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
data_size = 4;
|
||||
break;
|
||||
case I2S_DATA_SIZE_16BIT:
|
||||
case I2S_DATA_SIZE_16BIT_COMPACT:
|
||||
if ((uint32_t)buffer & 0x1) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
data_size = 2;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/* Check status */
|
||||
if (!(module_inst->hw->CTRLA.reg &
|
||||
(I2S_CTRLA_ENABLE | (I2S_CTRLA_SEREN0 << serializer)))) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
/* Write */
|
||||
uint32_t i;
|
||||
uint32_t sync_bit = I2S_SYNCBUSY_DATA0 << serializer;
|
||||
uint32_t ready_bit = I2S_INTFLAG_TXRDY0 << serializer;
|
||||
if (4 == data_size) {
|
||||
uint32_t *p32 = (uint32_t*)buffer;
|
||||
for (i = 0; i < size; i ++) {
|
||||
while(!(module_inst->hw->INTFLAG.reg & ready_bit)) {
|
||||
/* Wait Tx ready */
|
||||
}
|
||||
while(module_inst->hw->SYNCBUSY.reg & sync_bit) {
|
||||
/* Wait Sync */
|
||||
}
|
||||
module_inst->hw->DATA[serializer].reg = p32[i];
|
||||
module_inst->hw->INTFLAG.reg = ready_bit;
|
||||
}
|
||||
} else if (2 == data_size) {
|
||||
uint16_t *p16 = (uint16_t*)buffer;
|
||||
for (i = 0; i < size; i ++) {
|
||||
while(!(module_inst->hw->INTFLAG.reg & ready_bit)) {
|
||||
/* Wait Tx ready */
|
||||
}
|
||||
while(module_inst->hw->SYNCBUSY.reg & sync_bit) {
|
||||
/* Wait Sync */
|
||||
}
|
||||
module_inst->hw->DATA[serializer].reg = p16[i];
|
||||
module_inst->hw->INTFLAG.reg = ready_bit;
|
||||
}
|
||||
} else {
|
||||
uint8_t *p8 = (uint8_t*)buffer;
|
||||
for (i = 0; i < size; i ++) {
|
||||
while(!(module_inst->hw->INTFLAG.reg & ready_bit)) {
|
||||
/* Wait Tx ready */
|
||||
}
|
||||
while(module_inst->hw->SYNCBUSY.reg & sync_bit) {
|
||||
/* Wait Sync */
|
||||
}
|
||||
module_inst->hw->DATA[serializer].reg = p8[i];
|
||||
module_inst->hw->INTFLAG.reg = ready_bit;
|
||||
}
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read from the specified Serializer of I<SUP>2</SUP>S module to a buffer
|
||||
*
|
||||
* \param[in] module_inst Pointer to the software module instance struct
|
||||
* \param[in] serializer The serializer to write to
|
||||
* \param[in] buffer The buffer to fill read data (NULL to discard)
|
||||
* \param[in] size Number of data words to read
|
||||
*
|
||||
* \return Status of the initialization procedure.
|
||||
*
|
||||
* \retval STATUS_OK The data was sent successfully
|
||||
* \retval STATUS_ERR_DENIED The module or serializer is disabled
|
||||
* \retval STATUS_ERR_INVALID_ARG An invalid buffer pointer was supplied
|
||||
*/
|
||||
enum status_code i2s_serializer_read_buffer_wait(
|
||||
const struct i2s_module *const module_inst,
|
||||
enum i2s_serializer serializer,
|
||||
void *buffer, uint32_t size)
|
||||
{
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
|
||||
if (size == 0) {
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
uint8_t data_size = 1; /* number of bytes */
|
||||
struct i2s_serializer_module *data_module = (struct i2s_serializer_module *)
|
||||
&module_inst->serializer[serializer];
|
||||
|
||||
/* Check buffer */
|
||||
switch(data_module->data_size) {
|
||||
case I2S_DATA_SIZE_32BIT:
|
||||
case I2S_DATA_SIZE_24BIT:
|
||||
case I2S_DATA_SIZE_20BIT:
|
||||
case I2S_DATA_SIZE_18BIT:
|
||||
if ((uint32_t)buffer & 0x3) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
data_size = 4;
|
||||
break;
|
||||
case I2S_DATA_SIZE_16BIT:
|
||||
case I2S_DATA_SIZE_16BIT_COMPACT:
|
||||
if ((uint32_t)buffer & 0x1) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
data_size = 2;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
/* Check status */
|
||||
if (!(module_inst->hw->CTRLA.reg &
|
||||
(I2S_CTRLA_ENABLE | (I2S_CTRLA_SEREN0 << serializer)))) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
/* Read */
|
||||
uint32_t i;
|
||||
uint32_t sync_bit = I2S_SYNCBUSY_DATA0 << serializer;
|
||||
uint32_t ready_bit = I2S_INTFLAG_RXRDY0 << serializer;
|
||||
if (buffer == NULL) {
|
||||
for (i = 0; i < size; i ++) {
|
||||
while(!(module_inst->hw->INTFLAG.reg & ready_bit)) {
|
||||
/* Wait Rx ready */
|
||||
}
|
||||
while(module_inst->hw->SYNCBUSY.reg & sync_bit) {
|
||||
/* Wait Sync */
|
||||
}
|
||||
module_inst->hw->DATA[serializer].reg;
|
||||
module_inst->hw->INTFLAG.reg = ready_bit;
|
||||
}
|
||||
}
|
||||
else if (4 == data_size) {
|
||||
uint32_t *p32 = (uint32_t*)buffer;
|
||||
for (i = 0; i < size; i ++) {
|
||||
while(!(module_inst->hw->INTFLAG.reg & ready_bit)) {
|
||||
/* Wait Rx ready */
|
||||
}
|
||||
while(module_inst->hw->SYNCBUSY.reg & sync_bit) {
|
||||
/* Wait Sync */
|
||||
}
|
||||
p32[i] = module_inst->hw->DATA[serializer].reg;
|
||||
module_inst->hw->INTFLAG.reg = ready_bit;
|
||||
}
|
||||
} else if (2 == data_size) {
|
||||
uint16_t *p16 = (uint16_t*)buffer;
|
||||
for (i = 0; i < size; i ++) {
|
||||
while(!(module_inst->hw->INTFLAG.reg & ready_bit)) {
|
||||
/* Wait Rx ready */
|
||||
}
|
||||
while(module_inst->hw->SYNCBUSY.reg & sync_bit) {
|
||||
/* Wait Sync */
|
||||
}
|
||||
p16[i] = module_inst->hw->DATA[serializer].reg;
|
||||
module_inst->hw->INTFLAG.reg = ready_bit;
|
||||
}
|
||||
} else {
|
||||
uint8_t *p8 = (uint8_t*)buffer;
|
||||
for (i = 0; i < size; i ++) {
|
||||
while(!(module_inst->hw->INTFLAG.reg & ready_bit)) {
|
||||
/* Wait Tx ready */
|
||||
}
|
||||
while(module_inst->hw->SYNCBUSY.reg & sync_bit) {
|
||||
/* Wait Sync */
|
||||
}
|
||||
p8[i] = module_inst->hw->DATA[serializer].reg;
|
||||
module_inst->hw->INTFLAG.reg = ready_bit;
|
||||
}
|
||||
}
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,392 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM I<SUP>2</SUP>S - Inter-IC Sound Controller
|
||||
*
|
||||
* Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#include "i2s_callback.h"
|
||||
|
||||
struct i2s_module *_i2s_instances[I2S_INST_NUM];
|
||||
|
||||
static void _i2s_interrupt_handler(const uint8_t instance)
|
||||
{
|
||||
struct i2s_module *module = _i2s_instances[instance];
|
||||
struct i2s_serializer_module *data_module;
|
||||
|
||||
/* Get interrupt flags */
|
||||
uint32_t intflag = module->hw->INTFLAG.reg;
|
||||
uint32_t inten = intflag & module->hw->INTENSET.reg;
|
||||
uint32_t run_flags = (I2S_INTFLAG_TXUR0 | I2S_INTFLAG_RXOR0);
|
||||
uint32_t ready_flags = (I2S_INTFLAG_TXRDY0 | I2S_INTFLAG_RXRDY0);
|
||||
uint32_t call_mask;
|
||||
uint8_t serializer;
|
||||
|
||||
for (serializer = 0; serializer < 2; serializer ++) {
|
||||
data_module = &module->serializer[serializer];
|
||||
call_mask = data_module->registered_callback_mask &
|
||||
data_module->enabled_callback_mask;
|
||||
|
||||
if (intflag & (run_flags | ready_flags)) {
|
||||
/* Serializer Tx ready */
|
||||
if ((I2S_INTFLAG_TXRDY0 << serializer) & inten) {
|
||||
|
||||
if (data_module->transferred_words <
|
||||
data_module->requested_words) {
|
||||
|
||||
/* Write data word */
|
||||
while (module->hw->SYNCBUSY.reg &
|
||||
(I2S_SYNCBUSY_DATA0 << serializer)) {
|
||||
/* Wait sync */
|
||||
}
|
||||
switch(data_module->data_size) {
|
||||
case I2S_DATA_SIZE_32BIT:
|
||||
case I2S_DATA_SIZE_24BIT:
|
||||
case I2S_DATA_SIZE_20BIT:
|
||||
case I2S_DATA_SIZE_18BIT:
|
||||
module->hw->DATA[serializer].reg =
|
||||
((uint32_t*)data_module->job_buffer) \
|
||||
[data_module->transferred_words];
|
||||
break;
|
||||
case I2S_DATA_SIZE_16BIT:
|
||||
case I2S_DATA_SIZE_16BIT_COMPACT:
|
||||
module->hw->DATA[serializer].reg =
|
||||
((uint16_t*)data_module->job_buffer) \
|
||||
[data_module->transferred_words];
|
||||
break;
|
||||
default:
|
||||
module->hw->DATA[serializer].reg =
|
||||
((uint8_t*)data_module->job_buffer) \
|
||||
[data_module->transferred_words];
|
||||
}
|
||||
/* Clear interrupt status */
|
||||
module->hw->INTFLAG.reg = I2S_INTFLAG_TXRDY0 << serializer;
|
||||
|
||||
/* Count data */
|
||||
data_module->transferred_words ++;
|
||||
}
|
||||
|
||||
/* Check if the buffer is done */
|
||||
if (data_module->transferred_words >=
|
||||
data_module->requested_words) {
|
||||
/* It's done */
|
||||
data_module->job_status = STATUS_OK;
|
||||
/* Disable interrupt */
|
||||
module->hw->INTENCLR.reg =
|
||||
I2S_INTFLAG_TXRDY0 << serializer;
|
||||
/* Invoke callback */
|
||||
if ((1 << I2S_SERIALIZER_CALLBACK_BUFFER_DONE) &
|
||||
call_mask) {
|
||||
(data_module->callback \
|
||||
[I2S_SERIALIZER_CALLBACK_BUFFER_DONE])(module);
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
/* Serializer Rx ready */
|
||||
if ((I2S_INTFLAG_RXRDY0 << serializer) & inten) {
|
||||
/* Read data word */
|
||||
switch(data_module->data_size) {
|
||||
case I2S_DATA_SIZE_32BIT:
|
||||
case I2S_DATA_SIZE_24BIT:
|
||||
case I2S_DATA_SIZE_20BIT:
|
||||
case I2S_DATA_SIZE_18BIT:
|
||||
((uint32_t*)data_module->job_buffer) \
|
||||
[data_module->transferred_words] =
|
||||
module->hw->DATA[serializer].reg;
|
||||
break;
|
||||
case I2S_DATA_SIZE_16BIT:
|
||||
case I2S_DATA_SIZE_16BIT_COMPACT:
|
||||
((uint16_t*)data_module->job_buffer) \
|
||||
[data_module->transferred_words] =
|
||||
(uint16_t)module->hw->DATA[serializer].reg;
|
||||
break;
|
||||
default:
|
||||
((uint8_t*)data_module->job_buffer) \
|
||||
[data_module->transferred_words] =
|
||||
(uint8_t)module->hw->DATA[serializer].reg;
|
||||
|
||||
}
|
||||
/* Clear interrupt status */
|
||||
module->hw->INTFLAG.reg = I2S_INTFLAG_RXRDY0 << serializer;
|
||||
|
||||
/* Count data */
|
||||
data_module->transferred_words ++;
|
||||
|
||||
/* Check if the buffer is done */
|
||||
if (data_module->transferred_words >=
|
||||
data_module->requested_words) {
|
||||
if (data_module->job_status == STATUS_BUSY) {
|
||||
data_module->job_status = STATUS_OK;
|
||||
/* Disable interrupt */
|
||||
module->hw->INTENCLR.reg =
|
||||
I2S_INTFLAG_RXRDY0 << serializer;
|
||||
/* Invoke callback */
|
||||
if ((1 << I2S_SERIALIZER_CALLBACK_BUFFER_DONE) &
|
||||
call_mask) {
|
||||
(data_module->callback \
|
||||
[I2S_SERIALIZER_CALLBACK_BUFFER_DONE])(module);
|
||||
}
|
||||
}
|
||||
}
|
||||
return;
|
||||
}
|
||||
/* Serializer Tx undrerun or Rx overrun */
|
||||
if (run_flags & inten) {
|
||||
module->hw->INTFLAG.reg = I2S_INTFLAG_TXUR0 << serializer;
|
||||
if ((1 << I2S_SERIALIZER_CALLBACK_OVER_UNDER_RUN) &
|
||||
call_mask) {
|
||||
(data_module->callback \
|
||||
[I2S_SERIALIZER_CALLBACK_OVER_UNDER_RUN])(module);
|
||||
}
|
||||
return;
|
||||
}
|
||||
}
|
||||
run_flags <<= 1;
|
||||
ready_flags <<= 1;
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/** Interrupt handler for the I<SUP>2</SUP>S module */
|
||||
void I2S_Handler(void)
|
||||
{
|
||||
_i2s_interrupt_handler(0);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Write buffer to the specified Serializer of I<SUP>2</SUP>S module
|
||||
*
|
||||
* \param[in] module_inst Pointer to the software module instance struct
|
||||
* \param[in] serializer The serializer to write to
|
||||
* \param[in] buffer The data buffer to write
|
||||
* \param[in] size Number of data words to write
|
||||
*
|
||||
* \return Status of the initialization procedure.
|
||||
*
|
||||
* \retval STATUS_OK The data was sent successfully
|
||||
* \retval STATUS_ERR_DENIED The serializer is not in transmit mode
|
||||
* \retval STATUS_ERR_INVALID_ARG An invalid buffer pointer was supplied
|
||||
*/
|
||||
enum status_code i2s_serializer_write_buffer_job(
|
||||
struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
const void *buffer,
|
||||
const uint32_t size)
|
||||
{
|
||||
struct i2s_serializer_module *data_module;
|
||||
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
Assert(serializer < I2S_SERIALIZER_N);
|
||||
|
||||
data_module = &module_inst->serializer[serializer];
|
||||
|
||||
/* Serializer must in transmit mode */
|
||||
if (data_module->mode != I2S_SERIALIZER_TRANSMIT) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
/* Buffer should be aligned */
|
||||
switch(data_module->data_size) {
|
||||
case I2S_DATA_SIZE_32BIT:
|
||||
case I2S_DATA_SIZE_24BIT:
|
||||
case I2S_DATA_SIZE_20BIT:
|
||||
case I2S_DATA_SIZE_18BIT:
|
||||
if ((uint32_t)buffer & 0x3) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
break;
|
||||
case I2S_DATA_SIZE_16BIT:
|
||||
case I2S_DATA_SIZE_16BIT_COMPACT:
|
||||
if ((uint32_t)buffer & 0x1) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
data_module = &module_inst->serializer[serializer];
|
||||
if (data_module->job_status == STATUS_BUSY) {
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
|
||||
data_module->job_status = STATUS_BUSY;
|
||||
data_module->requested_words = size;
|
||||
data_module->transferred_words = 0;
|
||||
data_module->job_buffer = (void*)buffer;
|
||||
|
||||
module_inst->hw->INTENSET.reg = (I2S_INTENSET_TXRDY0 << serializer);
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Read from the specified Serializer of I<SUP>2</SUP>S module to a buffer
|
||||
*
|
||||
* \param[in] module_inst Pointer to the software module instance struct
|
||||
* \param[in] serializer The serializer to write to
|
||||
* \param[out] buffer The buffer to fill read data
|
||||
* \param[in] size Number of data words to read
|
||||
*
|
||||
* \return Status of the initialization procedure.
|
||||
*
|
||||
* \retval STATUS_OK The data was sent successfully
|
||||
* \retval STATUS_ERR_DENIED The serializer is not in receive mode
|
||||
* \retval STATUS_ERR_INVALID_ARG An invalid buffer pointer was supplied
|
||||
*/
|
||||
enum status_code i2s_serializer_read_buffer_job(
|
||||
struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
void *buffer,
|
||||
const uint32_t size)
|
||||
{
|
||||
struct i2s_serializer_module *data_module;
|
||||
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
Assert(serializer < I2S_SERIALIZER_N);
|
||||
|
||||
data_module = &module_inst->serializer[serializer];
|
||||
|
||||
/* Serializer must in receive mode */
|
||||
if (data_module->mode == I2S_SERIALIZER_TRANSMIT) {
|
||||
return STATUS_ERR_DENIED;
|
||||
}
|
||||
|
||||
/* Data buffer must be aligned */
|
||||
switch(data_module->data_size) {
|
||||
case I2S_DATA_SIZE_32BIT:
|
||||
case I2S_DATA_SIZE_24BIT:
|
||||
case I2S_DATA_SIZE_20BIT:
|
||||
case I2S_DATA_SIZE_18BIT:
|
||||
if ((uint32_t)buffer & 0x3) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
break;
|
||||
case I2S_DATA_SIZE_16BIT:
|
||||
case I2S_DATA_SIZE_16BIT_COMPACT:
|
||||
if ((uint32_t)buffer & 0x1) {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
data_module = &module_inst->serializer[serializer];
|
||||
if (data_module->job_status == STATUS_BUSY) {
|
||||
return STATUS_BUSY;
|
||||
}
|
||||
|
||||
data_module->job_status = STATUS_BUSY;
|
||||
data_module->requested_words = size;
|
||||
data_module->transferred_words = 0;
|
||||
data_module->job_buffer = (void*)buffer;
|
||||
|
||||
module_inst->hw->INTENCLR.reg = (I2S_INTENSET_RXRDY0 << serializer);
|
||||
module_inst->hw->INTENSET.reg = (I2S_INTENSET_RXRDY0 << serializer);
|
||||
|
||||
return STATUS_OK;
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Aborts an ongoing job running on serializer
|
||||
*
|
||||
* Aborts an ongoing job.
|
||||
*
|
||||
* \param[in] module_inst Pointer to the software module instance struct
|
||||
* \param[in] serializer The serializer which runs the job
|
||||
* \param[in] job_type Type of job to abort
|
||||
*/
|
||||
void i2s_serializer_abort_job(
|
||||
struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
const enum i2s_job_type job_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
Assert(serializer < I2S_SERIALIZER_N);
|
||||
|
||||
if (job_type == I2S_JOB_WRITE_BUFFER) {
|
||||
/* Disable interrupt */
|
||||
module_inst->hw->INTENCLR.reg = (I2S_INTENCLR_TXRDY0 << serializer);
|
||||
/* Mark job as aborted */
|
||||
module_inst->serializer[serializer].job_status = STATUS_ABORTED;
|
||||
} else if (job_type == I2S_JOB_READ_BUFFER) {
|
||||
/* Disable interrupt */
|
||||
module_inst->hw->INTENCLR.reg = (I2S_INTENCLR_RXRDY0 << serializer);
|
||||
/* Mark job as aborted */
|
||||
module_inst->serializer[serializer].job_status = STATUS_ABORTED;
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Gets the status of a job running on serializer
|
||||
*
|
||||
* Gets the status of an ongoing or the last job.
|
||||
*
|
||||
* \param[in] module_inst Pointer to the software module instance struct
|
||||
* \param[in] serializer The serializer which runs the job
|
||||
* \param[in] job_type Type of job to abort
|
||||
*
|
||||
* \return Status of the job.
|
||||
*/
|
||||
enum status_code i2s_serializer_get_job_status(
|
||||
const struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
const enum i2s_job_type job_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(serializer < I2S_SERIALIZER_N);
|
||||
|
||||
if (job_type == I2S_JOB_WRITE_BUFFER || job_type == I2S_JOB_READ_BUFFER) {
|
||||
return module_inst->serializer[serializer].job_status;
|
||||
} else {
|
||||
return STATUS_ERR_INVALID_ARG;
|
||||
}
|
||||
}
|
||||
|
|
@ -0,0 +1,234 @@
|
|||
/**
|
||||
* \file
|
||||
*
|
||||
* \brief SAM I2S - Inter-IC Sound Controller
|
||||
*
|
||||
* Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
|
||||
*
|
||||
* \asf_license_start
|
||||
*
|
||||
* \page License
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
*
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. The name of Atmel may not be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* 4. This software may only be redistributed and used in connection with an
|
||||
* Atmel microcontroller product.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
|
||||
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
|
||||
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* \asf_license_stop
|
||||
*
|
||||
*/
|
||||
/*
|
||||
* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
|
||||
*/
|
||||
|
||||
#ifndef I2S_CALLBACK_H_INCLUDED
|
||||
#define I2S_CALLBACK_H_INCLUDED
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* \addtogroup asfdoc_sam0_i2s_group
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include <i2s.h>
|
||||
|
||||
/**
|
||||
* Enum for the possible types of I<SUP>2</SUP>S asynchronous jobs that may be issued to
|
||||
* the driver.
|
||||
*/
|
||||
enum i2s_job_type {
|
||||
/** Asynchronous I<SUP>2</SUP>S write from a user provided buffer */
|
||||
I2S_JOB_WRITE_BUFFER,
|
||||
/** Asynchronous I<SUP>2</SUP>S read into a user provided buffer */
|
||||
I2S_JOB_READ_BUFFER
|
||||
};
|
||||
|
||||
/**
|
||||
* \name Callback Management
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* \brief Registers a callback for serializer
|
||||
*
|
||||
* Registers a callback function which is implemented by the user.
|
||||
*
|
||||
* \note The callback must be enabled by for the interrupt handler to call it
|
||||
* when the condition for the callback is met.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] serializer The serializer that generates callback
|
||||
* \param[in] callback_func Pointer to callback function
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
*/
|
||||
static inline void i2s_serializer_register_callback(
|
||||
struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
const i2s_serializer_callback_t callback_func,
|
||||
const enum i2s_serializer_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(serializer < I2S_SERIALIZER_N);
|
||||
|
||||
module_inst->serializer[serializer].callback[callback_type] = callback_func;
|
||||
module_inst->serializer[serializer].registered_callback_mask |=
|
||||
(1u << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Unregisters a callback for serializer
|
||||
*
|
||||
* Unregisters a callback function which is implemented by the user.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] serializer The serializer that generates callback
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
*/
|
||||
static inline void i2s_serializer_unregister_callback(
|
||||
struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
const enum i2s_serializer_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(serializer < I2S_SERIALIZER_N);
|
||||
|
||||
module_inst->serializer[serializer].callback[callback_type] = NULL;
|
||||
module_inst->serializer[serializer].registered_callback_mask &=
|
||||
~(1u << callback_type);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Enables callback for serializer
|
||||
*
|
||||
* Enables the callback function registered by \ref
|
||||
* i2s_serializer_register_callback. The callback function will be called from
|
||||
* the interrupt handler when the conditions for the callback type are met.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] serializer The serializer that generates callback
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
*/
|
||||
static inline void i2s_serializer_enable_callback(
|
||||
struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
const enum i2s_serializer_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
Assert(serializer < I2S_SERIALIZER_N);
|
||||
|
||||
module_inst->serializer[serializer].enabled_callback_mask |=
|
||||
(1u << callback_type);
|
||||
if (I2S_SERIALIZER_CALLBACK_OVER_UNDER_RUN != callback_type) {
|
||||
return;
|
||||
}
|
||||
module_inst->hw->INTENSET.reg =
|
||||
(module_inst->serializer[serializer].mode == I2S_SERIALIZER_TRANSMIT) ?
|
||||
(I2S_INTFLAG_TXUR0 << serializer) :
|
||||
(I2S_INTFLAG_RXOR0 << serializer);
|
||||
}
|
||||
|
||||
/**
|
||||
* \brief Disables callback for Serializer
|
||||
*
|
||||
* Disables the callback function registered by the \ref
|
||||
* i2s_serializer_register_callback.
|
||||
*
|
||||
* \param[in] module Pointer to ADC software instance struct
|
||||
* \param[in] serializer The serializer that generates callback
|
||||
* \param[in] callback_type Callback type given by an enum
|
||||
*
|
||||
*/
|
||||
static inline void i2s_serializer_disable_callback(
|
||||
struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
const enum i2s_serializer_callback callback_type)
|
||||
{
|
||||
/* Sanity check arguments */
|
||||
Assert(module_inst);
|
||||
Assert(module_inst->hw);
|
||||
Assert(serializer < I2S_SERIALIZER_N);
|
||||
|
||||
module_inst->serializer[serializer].enabled_callback_mask &=
|
||||
~(1u << callback_type);
|
||||
if (I2S_SERIALIZER_CALLBACK_OVER_UNDER_RUN != callback_type) {
|
||||
return;
|
||||
}
|
||||
module_inst->hw->INTENCLR.reg =
|
||||
(module_inst->serializer[serializer].mode == I2S_SERIALIZER_TRANSMIT) ?
|
||||
(I2S_INTFLAG_TXUR0 << serializer) :
|
||||
(I2S_INTFLAG_RXOR0 << serializer);
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* \name Job Management
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
|
||||
enum status_code i2s_serializer_write_buffer_job(
|
||||
struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
const void *buffer,
|
||||
const uint32_t size);
|
||||
|
||||
enum status_code i2s_serializer_read_buffer_job(
|
||||
struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
void *buffer,
|
||||
const uint32_t size);
|
||||
|
||||
void i2s_serializer_abort_job(
|
||||
struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
const enum i2s_job_type job_type);
|
||||
|
||||
enum status_code i2s_serializer_get_job_status(
|
||||
const struct i2s_module *const module_inst,
|
||||
const enum i2s_serializer serializer,
|
||||
const enum i2s_job_type job_type);
|
||||
|
||||
/** @} */
|
||||
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* #ifndef I2S_CALLBACK_H_INCLUDED */
|
||||
|
|
@ -36,8 +36,8 @@ STATIC const mp_map_elem_t board_global_dict_table[] = {
|
|||
{ MP_OBJ_NEW_QSTR(MP_QSTR_IR_TX), (mp_obj_t)&pin_PA23 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_IR_PROXIMITY), (mp_obj_t)&pin_PA04 },
|
||||
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_MICROPHONE_SCK), (mp_obj_t)&pin_PA10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_MICROPHONE_DO), (mp_obj_t)&pin_PA08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_MICROPHONE_CLOCK), (mp_obj_t)&pin_PA10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_MICROPHONE_DATA), (mp_obj_t)&pin_PA08 },
|
||||
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_ACCELEROMETER_INTERRUPT), (mp_obj_t)&pin_PA13 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_ACCELEROMETER_SDA), (mp_obj_t)&pin_PA00 },
|
||||
|
|
|
|||
|
|
@ -0,0 +1,320 @@
|
|||
/*
|
||||
* This file is part of the Micro Python project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
|
||||
#include "py/gc.h"
|
||||
#include "py/mperrno.h"
|
||||
#include "py/runtime.h"
|
||||
#include "common-hal/analogio/AnalogOut.h"
|
||||
#include "common-hal/audiobusio/PDMIn.h"
|
||||
#include "shared-bindings/analogio/AnalogOut.h"
|
||||
#include "shared-bindings/audiobusio/PDMIn.h"
|
||||
#include "shared-bindings/microcontroller/Pin.h"
|
||||
|
||||
#include "asf/sam0/drivers/port/port.h"
|
||||
#include "samd21_pins.h"
|
||||
|
||||
#include "shared_dma.h"
|
||||
#include "tick.h"
|
||||
|
||||
void pdmin_reset(void) {
|
||||
while (I2S->SYNCBUSY.reg & I2S_SYNCBUSY_ENABLE) {}
|
||||
I2S->INTENCLR.reg = I2S_INTENCLR_MASK;
|
||||
I2S->INTFLAG.reg = I2S_INTFLAG_MASK;
|
||||
I2S->CTRLA.reg &= ~I2S_SYNCBUSY_ENABLE;
|
||||
while (I2S->SYNCBUSY.reg & I2S_SYNCBUSY_ENABLE) {}
|
||||
I2S->CTRLA.reg = I2S_CTRLA_SWRST;
|
||||
}
|
||||
|
||||
void common_hal_audiobusio_pdmin_construct(audiobusio_pdmin_obj_t* self,
|
||||
const mcu_pin_obj_t* clock_pin,
|
||||
const mcu_pin_obj_t* data_pin,
|
||||
uint32_t frequency,
|
||||
uint8_t bit_depth,
|
||||
bool mono,
|
||||
uint8_t oversample) {
|
||||
self->clock_pin = clock_pin; // PA10, PA20 -> SCK0, PB11 -> SCK1
|
||||
if (clock_pin == &pin_PA10
|
||||
#ifdef PIN_PA20
|
||||
|| clock_pin == &pin_PA20
|
||||
#endif
|
||||
) {
|
||||
self->clock_unit = 0;
|
||||
#ifdef PIN_PB11
|
||||
} else if (clock_pin == &pin_PB11) {
|
||||
self->clock_unit = 1;
|
||||
#endif
|
||||
} else {
|
||||
mp_raise_ValueError("Invalid clock pin");
|
||||
}
|
||||
|
||||
self->data_pin = data_pin; // PA07, PA19 -> SD0, PA08, PB16 -> SD1
|
||||
|
||||
if (data_pin == &pin_PA07 || data_pin == &pin_PA19) {
|
||||
self->serializer = 0;
|
||||
} else if (data_pin == &pin_PA08
|
||||
#ifdef PB16
|
||||
|| data_pin == &pin_PB16) {
|
||||
#else
|
||||
) {
|
||||
#endif
|
||||
self->serializer = 1;
|
||||
} else {
|
||||
mp_raise_ValueError("Invalid data pin");
|
||||
}
|
||||
|
||||
claim_pin(clock_pin);
|
||||
claim_pin(data_pin);
|
||||
|
||||
if (MP_STATE_VM(audiodma_block_counter) == NULL &&
|
||||
!allocate_block_counter()) {
|
||||
mp_raise_RuntimeError("Unable to allocate audio DMA block counter.");
|
||||
}
|
||||
|
||||
if (bit_depth != 16 || !mono || oversample != 64) {
|
||||
mp_raise_NotImplementedError("");
|
||||
}
|
||||
|
||||
// TODO(tannewt): Use the DPLL to get a more precise sampling rate.
|
||||
// DFLL -> GCLK (/600 for 8khz, /300 for 16khz and /150 for 32khz) -> DPLL (*(63 + 1)) -> GCLK ( / 10) -> 512khz
|
||||
|
||||
i2s_init(&self->i2s_instance, I2S);
|
||||
struct i2s_clock_unit_config config_clock_unit;
|
||||
i2s_clock_unit_get_config_defaults(&config_clock_unit);
|
||||
config_clock_unit.clock.gclk_src = GCLK_GENERATOR_3;
|
||||
|
||||
config_clock_unit.clock.mck_src = I2S_MASTER_CLOCK_SOURCE_GCLK;
|
||||
config_clock_unit.clock.mck_out_enable = false;
|
||||
|
||||
config_clock_unit.clock.sck_src = I2S_SERIAL_CLOCK_SOURCE_MCKDIV;
|
||||
config_clock_unit.clock.sck_div = 8000000 / frequency / oversample;
|
||||
self->frequency = 8000000 / config_clock_unit.clock.sck_div / oversample;
|
||||
|
||||
config_clock_unit.frame.number_slots = 2;
|
||||
config_clock_unit.frame.slot_size = I2S_SLOT_SIZE_16_BIT;
|
||||
config_clock_unit.frame.data_delay = I2S_DATA_DELAY_1;
|
||||
|
||||
config_clock_unit.frame.frame_sync.width = I2S_FRAME_SYNC_WIDTH_SLOT;
|
||||
|
||||
config_clock_unit.mck_pin.enable = false;
|
||||
config_clock_unit.sck_pin.enable = true;
|
||||
config_clock_unit.sck_pin.gpio = self->clock_pin->pin;
|
||||
// Mux is always the same.
|
||||
config_clock_unit.sck_pin.mux = 6L;
|
||||
config_clock_unit.fs_pin.enable = false;
|
||||
i2s_clock_unit_set_config(&self->i2s_instance, self->clock_unit, &config_clock_unit);
|
||||
|
||||
struct i2s_serializer_config config_serializer;
|
||||
i2s_serializer_get_config_defaults(&config_serializer);
|
||||
config_serializer.clock_unit = self->clock_unit;
|
||||
config_serializer.mode = I2S_SERIALIZER_PDM2;
|
||||
config_serializer.data_size = I2S_DATA_SIZE_32BIT;
|
||||
config_serializer.data_pin.gpio = self->data_pin->pin;
|
||||
// Mux is always the same.
|
||||
config_serializer.data_pin.mux = 6L;
|
||||
config_serializer.data_pin.enable = true;
|
||||
i2s_serializer_set_config(&self->i2s_instance, self->serializer, &config_serializer);
|
||||
i2s_enable(&self->i2s_instance);
|
||||
|
||||
self->bytes_per_sample = oversample >> 3;
|
||||
self->bit_depth = bit_depth;
|
||||
}
|
||||
|
||||
void common_hal_audiobusio_pdmin_deinit(audiobusio_pdmin_obj_t* self) {
|
||||
i2s_disable(&self->i2s_instance);
|
||||
i2s_reset(&self->i2s_instance);
|
||||
}
|
||||
|
||||
uint8_t common_hal_audiobusio_pdmin_get_bit_depth(audiobusio_pdmin_obj_t* self) {
|
||||
return self->bit_depth;
|
||||
}
|
||||
|
||||
uint32_t common_hal_audiobusio_pdmin_get_frequency(audiobusio_pdmin_obj_t* self) {
|
||||
return self->frequency;
|
||||
}
|
||||
|
||||
static void setup_dma(audiobusio_pdmin_obj_t* self, uint32_t length,
|
||||
DmacDescriptor* second_descriptor,
|
||||
uint8_t words_per_buffer, uint8_t words_per_sample,
|
||||
uint32_t* first_buffer, uint32_t* second_buffer) {
|
||||
// Set up the DMA
|
||||
struct dma_descriptor_config descriptor_config;
|
||||
dma_descriptor_get_config_defaults(&descriptor_config);
|
||||
descriptor_config.beat_size = DMA_BEAT_SIZE_WORD;
|
||||
descriptor_config.step_selection = DMA_STEPSEL_SRC;
|
||||
descriptor_config.source_address = (uint32_t)&I2S->DATA[self->serializer];
|
||||
descriptor_config.src_increment_enable = false;
|
||||
// Block transfer count is the number of beats per block (aka descriptor).
|
||||
// In this case there are two bytes per beat so divide the length by two.
|
||||
uint16_t block_transfer_count = words_per_buffer;
|
||||
if (length * words_per_sample < words_per_buffer) {
|
||||
block_transfer_count = length * words_per_sample;
|
||||
}
|
||||
descriptor_config.block_transfer_count = block_transfer_count;
|
||||
descriptor_config.destination_address = ((uint32_t) first_buffer + sizeof(uint32_t) * block_transfer_count);
|
||||
descriptor_config.event_output_selection = DMA_EVENT_OUTPUT_BLOCK;
|
||||
descriptor_config.next_descriptor_address = 0;
|
||||
if (length * words_per_sample > words_per_buffer) {
|
||||
descriptor_config.next_descriptor_address = ((uint32_t)second_descriptor);
|
||||
}
|
||||
dma_descriptor_create(audio_dma.descriptor, &descriptor_config);
|
||||
|
||||
if (length * words_per_sample > words_per_buffer) {
|
||||
block_transfer_count = words_per_buffer;
|
||||
descriptor_config.next_descriptor_address = ((uint32_t)audio_dma.descriptor);
|
||||
if (length * words_per_sample < 2 * words_per_buffer) {
|
||||
block_transfer_count = 2 * words_per_buffer - length * words_per_sample;
|
||||
descriptor_config.next_descriptor_address = 0;
|
||||
}
|
||||
descriptor_config.block_transfer_count = block_transfer_count;
|
||||
descriptor_config.destination_address = ((uint32_t) second_buffer + sizeof(uint32_t) * block_transfer_count);
|
||||
dma_descriptor_create(second_descriptor, &descriptor_config);
|
||||
}
|
||||
|
||||
switch_audiodma_trigger(I2S_DMAC_ID_RX_0 + self->serializer);
|
||||
}
|
||||
|
||||
void start_dma(audiobusio_pdmin_obj_t* self) {
|
||||
dma_start_transfer_job(&audio_dma);
|
||||
tc_start_counter(MP_STATE_VM(audiodma_block_counter));
|
||||
i2s_clock_unit_enable(&self->i2s_instance, self->clock_unit);
|
||||
i2s_serializer_enable(&self->i2s_instance, self->serializer);
|
||||
I2S->DATA[1].reg = I2S->DATA[1].reg;
|
||||
}
|
||||
|
||||
void stop_dma(audiobusio_pdmin_obj_t* self) {
|
||||
// Turn off the I2S clock and serializer. Peripheral is still enabled.
|
||||
i2s_serializer_disable(&self->i2s_instance, self->serializer);
|
||||
i2s_clock_unit_disable(&self->i2s_instance, self->clock_unit);
|
||||
|
||||
// Shutdown the DMA
|
||||
tc_stop_counter(MP_STATE_VM(audiodma_block_counter));
|
||||
dma_abort_job(&audio_dma);
|
||||
}
|
||||
|
||||
static const uint16_t sinc_filter[64] = {
|
||||
0, 1, 6, 16, 29, 49, 75, 108,
|
||||
149, 200, 261, 334, 418, 514, 622, 742,
|
||||
872, 1012, 1161, 1315, 1472, 1631, 1787, 1938,
|
||||
2081, 2212, 2329, 2429, 2509, 2568, 2604, 2616,
|
||||
2604, 2568, 2509, 2429, 2329, 2212, 2081, 1938,
|
||||
1787, 1631, 1472, 1315, 1161, 1012, 872, 742,
|
||||
622, 514, 418, 334, 261, 200, 149, 108,
|
||||
75, 49, 29, 16, 6, 1, 0, 0
|
||||
};
|
||||
|
||||
static uint16_t filter_sample(uint32_t pdm_samples[4]) {
|
||||
uint16_t sample = 0;
|
||||
for (uint8_t i = 0; i < 4; i++) {
|
||||
uint16_t pdm = pdm_samples[i] & 0xffff;
|
||||
for (uint8_t j = 0; j < 16; j++) {
|
||||
if ((pdm & 0x8000) != 0) {
|
||||
sample += sinc_filter[i * 16 + j];
|
||||
}
|
||||
pdm <<= 1;
|
||||
}
|
||||
}
|
||||
return sample;
|
||||
}
|
||||
|
||||
uint32_t common_hal_audiobusio_pdmin_record_to_buffer(audiobusio_pdmin_obj_t* self,
|
||||
uint16_t* output_buffer, uint32_t length) {
|
||||
// Write the wave file header.
|
||||
|
||||
// We allocate two 256 byte buffers on the stack to use for double buffering.
|
||||
// Our oversample rate is 64 (bits) so each buffer produces 32 samples.
|
||||
// TODO(tannewt): Can the compiler optimize better if we fix the size of
|
||||
// these buffers?
|
||||
uint8_t samples_per_buffer = 32;
|
||||
// For every word we record, we throw away 2 bytes of a phantom second channel.
|
||||
uint8_t words_per_sample = self->bytes_per_sample / 2;
|
||||
uint8_t words_per_buffer = samples_per_buffer * words_per_sample;
|
||||
uint32_t first_buffer[words_per_buffer];
|
||||
uint32_t second_buffer[words_per_buffer];
|
||||
|
||||
COMPILER_ALIGNED(16) DmacDescriptor second_descriptor;
|
||||
|
||||
setup_dma(self, length, &second_descriptor, words_per_buffer,
|
||||
words_per_sample, first_buffer, second_buffer);
|
||||
|
||||
start_dma(self);
|
||||
|
||||
// Record
|
||||
uint32_t buffers_processed = 0;
|
||||
uint32_t total_bytes = 0;
|
||||
|
||||
uint64_t start_ticks = ticks_ms;
|
||||
while (total_bytes < length) {
|
||||
// Wait for the next buffer to fill
|
||||
while (tc_get_count_value(MP_STATE_VM(audiodma_block_counter)) == buffers_processed) {
|
||||
#ifdef MICROPY_VM_HOOK_LOOP
|
||||
MICROPY_VM_HOOK_LOOP
|
||||
#endif
|
||||
}
|
||||
if (tc_get_count_value(MP_STATE_VM(audiodma_block_counter)) != (buffers_processed + 1)) {
|
||||
break;
|
||||
}
|
||||
// Throw away the first ~10ms of data because thats during mic start up.
|
||||
if (ticks_ms - start_ticks < 10) {
|
||||
buffers_processed++;
|
||||
continue;
|
||||
}
|
||||
uint32_t* buffer = first_buffer;
|
||||
DmacDescriptor* descriptor = audio_dma.descriptor;
|
||||
if (buffers_processed % 2 == 1) {
|
||||
buffer = second_buffer;
|
||||
descriptor = &second_descriptor;
|
||||
}
|
||||
// Decimate and filter the last buffer
|
||||
int32_t samples_gathered = descriptor->BTCNT.reg / words_per_sample;
|
||||
for (uint16_t i = 0; i < samples_gathered; i++) {
|
||||
if (self->bit_depth == 8) {
|
||||
((uint8_t*) output_buffer)[total_bytes] = filter_sample(buffer + i * words_per_sample) >> 8;
|
||||
total_bytes += 1;
|
||||
} else if (self->bit_depth == 16) {
|
||||
output_buffer[total_bytes / 2] = filter_sample(buffer + i * words_per_sample);
|
||||
total_bytes += 2;
|
||||
}
|
||||
}
|
||||
buffers_processed++;
|
||||
|
||||
if (length - total_bytes < samples_per_buffer) {
|
||||
descriptor->BTCNT.reg = (length - total_bytes) * words_per_sample;
|
||||
descriptor->DSTADDR.reg = ((uint32_t) buffer) + (length - total_bytes) * self->bytes_per_sample;
|
||||
descriptor->DESCADDR.reg = 0;
|
||||
}
|
||||
}
|
||||
|
||||
stop_dma(self);
|
||||
|
||||
return total_bytes;
|
||||
}
|
||||
|
||||
void common_hal_audiobusio_pdmin_record_to_file(audiobusio_pdmin_obj_t* self, uint8_t* buffer, uint32_t length) {
|
||||
|
||||
}
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* This file is part of the MicroPython project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_AUDIOBUSIO_AUDIOOUT_H__
|
||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_AUDIOBUSIO_AUDIOOUT_H__
|
||||
|
||||
#include "common-hal/microcontroller/Pin.h"
|
||||
#include "asf/sam0/drivers/i2s/i2s.h"
|
||||
#include "asf/sam0/drivers/tc/tc.h"
|
||||
|
||||
#include "extmod/vfs_fat_file.h"
|
||||
#include "py/obj.h"
|
||||
|
||||
typedef struct {
|
||||
mp_obj_base_t base;
|
||||
const mcu_pin_obj_t *clock_pin;
|
||||
const mcu_pin_obj_t *data_pin;
|
||||
uint32_t frequency;
|
||||
struct i2s_module i2s_instance;
|
||||
uint8_t serializer;
|
||||
uint8_t clock_unit;
|
||||
uint8_t bytes_per_sample;
|
||||
uint8_t bit_depth;
|
||||
} audiobusio_pdmin_obj_t;
|
||||
|
||||
void pdmin_reset(void);
|
||||
|
||||
void pdmin_background(void);
|
||||
|
||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_COMMON_HAL_AUDIOBUSIO_AUDIOOUT_H__
|
||||
|
|
@ -0,0 +1 @@
|
|||
// No audiobusio module functions.
|
||||
|
|
@ -76,7 +76,7 @@ void audioout_reset(void) {
|
|||
// Only reset DMA. PWMOut will reset the timer. Other code will reset the DAC.
|
||||
refcount = 0;
|
||||
MP_STATE_VM(audioout_sample_timer) = NULL;
|
||||
MP_STATE_VM(audioout_block_counter) = NULL;
|
||||
MP_STATE_VM(audiodma_block_counter) = NULL;
|
||||
MP_STATE_VM(audioout_dac_instance) = NULL;
|
||||
|
||||
if (MP_STATE_VM(audioout_sample_event) != NULL) {
|
||||
|
|
@ -85,10 +85,10 @@ void audioout_reset(void) {
|
|||
}
|
||||
MP_STATE_VM(audioout_sample_event) = NULL;
|
||||
|
||||
if (MP_STATE_VM(audioout_block_event) != NULL) {
|
||||
events_release(MP_STATE_VM(audioout_block_event));
|
||||
if (MP_STATE_VM(audiodma_block_event) != NULL) {
|
||||
events_release(MP_STATE_VM(audiodma_block_event));
|
||||
}
|
||||
MP_STATE_VM(audioout_block_event) = NULL;
|
||||
MP_STATE_VM(audiodma_block_event) = NULL;
|
||||
|
||||
if (MP_STATE_VM(audioout_dac_event) != NULL) {
|
||||
events_detach_user(MP_STATE_VM(audioout_dac_event), EVSYS_ID_USER_DMAC_CH_0);
|
||||
|
|
@ -102,12 +102,12 @@ void audioout_reset(void) {
|
|||
// WARN(tannewt): DO NOT print from here. It calls background tasks and causes a
|
||||
// stack overflow.
|
||||
void audioout_background(void) {
|
||||
if (MP_STATE_VM(audioout_block_counter) != NULL &&
|
||||
if (MP_STATE_VM(audiodma_block_counter) != NULL &&
|
||||
active_audioout != NULL &&
|
||||
active_audioout->second_buffer != NULL &&
|
||||
active_audioout->last_loaded_block < tc_get_count_value(MP_STATE_VM(audioout_block_counter))) {
|
||||
active_audioout->last_loaded_block < tc_get_count_value(MP_STATE_VM(audiodma_block_counter))) {
|
||||
uint8_t* buffer;
|
||||
if (tc_get_count_value(MP_STATE_VM(audioout_block_counter)) % 2 == 1) {
|
||||
if (tc_get_count_value(MP_STATE_VM(audiodma_block_counter)) % 2 == 1) {
|
||||
buffer = active_audioout->buffer;
|
||||
} else {
|
||||
buffer = active_audioout->second_buffer;
|
||||
|
|
@ -148,82 +148,6 @@ void audioout_background(void) {
|
|||
}
|
||||
}
|
||||
|
||||
static void allocate_block_counter(audioio_audioout_obj_t* self) {
|
||||
// Find a timer to count DMA block completions.
|
||||
Tc *t = NULL;
|
||||
Tc *tcs[TC_INST_NUM] = TC_INSTS;
|
||||
for (uint8_t i = TC_INST_NUM; i > 0; i--) {
|
||||
if (tcs[i - 1]->COUNT16.CTRLA.bit.ENABLE == 0) {
|
||||
t = tcs[i - 1];
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (t == NULL) {
|
||||
common_hal_audioio_audioout_deinit(self);
|
||||
mp_raise_RuntimeError("All timers in use");
|
||||
return;
|
||||
}
|
||||
MP_STATE_VM(audioout_block_counter) = gc_alloc(sizeof(struct tc_module), false);
|
||||
if (MP_STATE_VM(audioout_block_counter) == NULL) {
|
||||
common_hal_audioio_audioout_deinit(self);
|
||||
mp_raise_msg(&mp_type_MemoryError, "");
|
||||
}
|
||||
|
||||
// Don't bother setting the period. We set it before you playback anything.
|
||||
struct tc_config config_tc;
|
||||
tc_get_config_defaults(&config_tc);
|
||||
config_tc.counter_size = TC_COUNTER_SIZE_16BIT;
|
||||
config_tc.clock_prescaler = TC_CLOCK_PRESCALER_DIV1;
|
||||
if (tc_init(MP_STATE_VM(audioout_block_counter), t, &config_tc) != STATUS_OK) {
|
||||
common_hal_audioio_audioout_deinit(self);
|
||||
mp_raise_OSError(MP_EIO);
|
||||
return;
|
||||
};
|
||||
|
||||
struct tc_events events_tc;
|
||||
events_tc.generate_event_on_overflow = false;
|
||||
events_tc.on_event_perform_action = true;
|
||||
events_tc.event_action = TC_EVENT_ACTION_INCREMENT_COUNTER;
|
||||
tc_enable_events(MP_STATE_VM(audioout_block_counter), &events_tc);
|
||||
|
||||
// Connect the timer overflow event, which happens at the target frequency,
|
||||
// to the DAC conversion trigger.
|
||||
MP_STATE_VM(audioout_block_event) = gc_alloc(sizeof(struct events_resource), false);
|
||||
if (MP_STATE_VM(audioout_block_event) == NULL) {
|
||||
common_hal_audioio_audioout_deinit(self);
|
||||
mp_raise_msg(&mp_type_MemoryError, "");
|
||||
}
|
||||
struct events_config config;
|
||||
events_get_config_defaults(&config);
|
||||
|
||||
uint8_t user = EVSYS_ID_USER_TC3_EVU;
|
||||
if (t == TC4) {
|
||||
user = EVSYS_ID_USER_TC4_EVU;
|
||||
} else if (t == TC5) {
|
||||
user = EVSYS_ID_USER_TC5_EVU;
|
||||
#ifdef TC6
|
||||
} else if (t == TC6) {
|
||||
user = EVSYS_ID_USER_TC6_EVU;
|
||||
#endif
|
||||
#ifdef TC7
|
||||
} else if (t == TC7) {
|
||||
user = EVSYS_ID_USER_TC7_EVU;
|
||||
#endif
|
||||
}
|
||||
|
||||
config.generator = EVSYS_ID_GEN_DMAC_CH_0;
|
||||
config.path = EVENTS_PATH_ASYNCHRONOUS;
|
||||
if (events_allocate(MP_STATE_VM(audioout_block_event), &config) != STATUS_OK ||
|
||||
events_attach_user(MP_STATE_VM(audioout_block_event), user) != STATUS_OK) {
|
||||
common_hal_audioio_audioout_deinit(self);
|
||||
mp_raise_OSError(MP_EIO);
|
||||
return;
|
||||
}
|
||||
|
||||
tc_enable(MP_STATE_VM(audioout_block_counter));
|
||||
tc_stop_counter(MP_STATE_VM(audioout_block_counter));
|
||||
}
|
||||
|
||||
static void shared_construct(audioio_audioout_obj_t* self, const mcu_pin_obj_t* pin) {
|
||||
assert_pin_free(pin);
|
||||
|
||||
|
|
@ -380,8 +304,8 @@ void common_hal_audioio_audioout_construct_from_file(audioio_audioout_obj_t* sel
|
|||
refcount++;
|
||||
shared_construct(self, pin);
|
||||
}
|
||||
if (MP_STATE_VM(audioout_block_counter) == NULL) {
|
||||
allocate_block_counter(self);
|
||||
if (MP_STATE_VM(audiodma_block_counter) == NULL && !allocate_block_counter()) {
|
||||
mp_raise_RuntimeError("Unable to allocate audio DMA block counter.");
|
||||
}
|
||||
|
||||
// Load the wave
|
||||
|
|
@ -519,6 +443,7 @@ void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, bool loop) {
|
|||
} else {
|
||||
dac_enable(MP_STATE_VM(audioout_dac_instance));
|
||||
}
|
||||
switch_audiodma_trigger(DAC_DMAC_ID_EMPTY);
|
||||
struct dma_descriptor_config descriptor_config;
|
||||
dma_descriptor_get_config_defaults(&descriptor_config);
|
||||
if (self->bytes_per_sample == 2) {
|
||||
|
|
@ -580,8 +505,8 @@ void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, bool loop) {
|
|||
active_audioout = self;
|
||||
dma_start_transfer_job(&audio_dma);
|
||||
|
||||
if (MP_STATE_VM(audioout_block_counter) != NULL) {
|
||||
tc_start_counter(MP_STATE_VM(audioout_block_counter));
|
||||
if (MP_STATE_VM(audiodma_block_counter) != NULL) {
|
||||
tc_start_counter(MP_STATE_VM(audiodma_block_counter));
|
||||
}
|
||||
set_timer_frequency(self->frequency);
|
||||
tc_start_counter(MP_STATE_VM(audioout_sample_timer));
|
||||
|
|
@ -589,8 +514,8 @@ void common_hal_audioio_audioout_play(audioio_audioout_obj_t* self, bool loop) {
|
|||
|
||||
void common_hal_audioio_audioout_stop(audioio_audioout_obj_t* self) {
|
||||
if (active_audioout == self) {
|
||||
if (MP_STATE_VM(audioout_block_counter) != NULL) {
|
||||
tc_stop_counter(MP_STATE_VM(audioout_block_counter));
|
||||
if (MP_STATE_VM(audiodma_block_counter) != NULL) {
|
||||
tc_stop_counter(MP_STATE_VM(audiodma_block_counter));
|
||||
}
|
||||
tc_stop_counter(MP_STATE_VM(audioout_sample_timer));
|
||||
dma_abort_job(&audio_dma);
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@
|
|||
|
||||
#include "common-hal/analogio/AnalogIn.h"
|
||||
#include "common-hal/audioio/AudioOut.h"
|
||||
#include "common-hal/audiobusio/PDMIn.h"
|
||||
#include "common-hal/pulseio/PulseIn.h"
|
||||
#include "common-hal/pulseio/PulseOut.h"
|
||||
#include "common-hal/pulseio/PWMOut.h"
|
||||
|
|
@ -161,13 +162,16 @@ void reset_samd21(void) {
|
|||
}
|
||||
|
||||
#ifdef EXPRESS_BOARD
|
||||
audioout_reset();
|
||||
touchin_reset();
|
||||
pdmin_reset();
|
||||
pulsein_reset();
|
||||
pulseout_reset();
|
||||
pwmout_reset();
|
||||
#endif
|
||||
|
||||
analogin_reset();
|
||||
|
||||
pulsein_reset();
|
||||
pulseout_reset();
|
||||
|
||||
// Wait for the DAC to sync then reset.
|
||||
while (DAC->STATUS.reg & DAC_STATUS_SYNCBUSY) {}
|
||||
|
|
@ -175,8 +179,6 @@ void reset_samd21(void) {
|
|||
|
||||
reset_all_pins();
|
||||
|
||||
audioout_reset();
|
||||
pwmout_reset();
|
||||
|
||||
usb_hid_reset();
|
||||
|
||||
|
|
|
|||
|
|
@ -139,6 +139,7 @@ typedef long mp_off_t;
|
|||
extern const struct _mp_obj_module_t microcontroller_module;
|
||||
extern const struct _mp_obj_module_t bitbangio_module;
|
||||
extern const struct _mp_obj_module_t audioio_module;
|
||||
extern const struct _mp_obj_module_t audiobusio_module;
|
||||
extern const struct _mp_obj_module_t analogio_module;
|
||||
extern const struct _mp_obj_module_t digitalio_module;
|
||||
extern const struct _mp_obj_module_t pulseio_module;
|
||||
|
|
@ -167,6 +168,7 @@ extern const struct _mp_obj_module_t usb_hid_module;
|
|||
#define MICROPY_PY_FRAMEBUF (1)
|
||||
#define EXTRA_BUILTIN_MODULES \
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_audioio), (mp_obj_t)&audioio_module }, \
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_audiobusio), (mp_obj_t)&audiobusio_module }, \
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_pulseio), (mp_obj_t)&pulseio_module }, \
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_bitbangio), (mp_obj_t)&bitbangio_module }
|
||||
#define EXPRESS_BOARD
|
||||
|
|
@ -218,11 +220,11 @@ extern const struct _mp_obj_module_t usb_hid_module;
|
|||
#define MICROPY_PORT_ROOT_POINTERS \
|
||||
const char *readline_hist[8]; \
|
||||
vstr_t *repl_line; \
|
||||
struct tc_module* audiodma_block_counter; \
|
||||
struct events_resource* audiodma_block_event; \
|
||||
struct tc_module* audioout_sample_timer; \
|
||||
struct tc_module* audioout_block_counter; \
|
||||
struct dac_module* audioout_dac_instance; \
|
||||
struct events_resource* audioout_sample_event; \
|
||||
struct events_resource* audioout_block_event; \
|
||||
struct events_resource* audioout_dac_event; \
|
||||
struct tc_module* pulseout_tc_instance; \
|
||||
FLASH_ROOT_POINTERS \
|
||||
|
|
|
|||
|
|
@ -25,7 +25,14 @@
|
|||
*/
|
||||
#include "shared_dma.h"
|
||||
|
||||
#include "py/gc.h"
|
||||
#include "py/mpstate.h"
|
||||
|
||||
#include "asf/sam0/drivers/events/events.h"
|
||||
#include "asf/sam0/drivers/system/interrupt/system_interrupt.h"
|
||||
#include "asf/sam0/drivers/tc/tc.h"
|
||||
|
||||
#undef ENABLE
|
||||
|
||||
// We allocate two DMA resources for the entire lifecycle of the board (not the
|
||||
// vm) because the general_dma resource will be shared between the REPL and SPI
|
||||
|
|
@ -72,16 +79,21 @@ static uint8_t sercom_index(Sercom* sercom) {
|
|||
return ((uint32_t) sercom - (uint32_t) SERCOM0) / 0x400;
|
||||
}
|
||||
|
||||
static void dma_configure(uint8_t channel, uint8_t trigsrc) {
|
||||
static void dma_configure(uint8_t channel, uint8_t trigsrc, bool output_event) {
|
||||
system_interrupt_enter_critical_section();
|
||||
/** Select the DMA channel and clear software trigger */
|
||||
DMAC->CHID.reg = DMAC_CHID_ID(channel);
|
||||
DMAC->CHCTRLA.reg &= ~DMAC_CHCTRLA_ENABLE;
|
||||
DMAC->CHCTRLA.reg = DMAC_CHCTRLA_SWRST;
|
||||
DMAC->SWTRIGCTRL.reg &= (uint32_t)(~(1 << channel));
|
||||
DMAC->CHCTRLB.reg = DMAC_CHCTRLB_LVL(DMA_PRIORITY_LEVEL_0) | \
|
||||
DMAC_CHCTRLB_TRIGSRC(trigsrc) | \
|
||||
DMAC_CHCTRLB_TRIGACT(DMA_TRIGGER_ACTION_BEAT);
|
||||
uint32_t event_output_enable = 0;
|
||||
if (output_event) {
|
||||
event_output_enable = DMAC_CHCTRLB_EVOE;
|
||||
}
|
||||
DMAC->CHCTRLB.reg = DMAC_CHCTRLB_LVL(DMA_PRIORITY_LEVEL_0) |
|
||||
DMAC_CHCTRLB_TRIGSRC(trigsrc) |
|
||||
DMAC_CHCTRLB_TRIGACT(DMA_TRIGGER_ACTION_BEAT) |
|
||||
event_output_enable;
|
||||
system_interrupt_leave_critical_section();
|
||||
}
|
||||
|
||||
|
|
@ -89,7 +101,7 @@ enum status_code shared_dma_write(Sercom* sercom, const uint8_t* buffer, uint32_
|
|||
if (general_dma_tx.job_status != STATUS_OK) {
|
||||
return general_dma_tx.job_status;
|
||||
}
|
||||
dma_configure(general_dma_tx.channel_id, sercom_index(sercom) * 2 + 2);
|
||||
dma_configure(general_dma_tx.channel_id, sercom_index(sercom) * 2 + 2, false);
|
||||
|
||||
// Set up TX second.
|
||||
struct dma_descriptor_config descriptor_config;
|
||||
|
|
@ -128,8 +140,8 @@ enum status_code shared_dma_read(Sercom* sercom, uint8_t* buffer, uint32_t lengt
|
|||
return general_dma_tx.job_status;
|
||||
}
|
||||
|
||||
dma_configure(general_dma_tx.channel_id, sercom_index(sercom) * 2 + 2);
|
||||
dma_configure(general_dma_rx.channel_id, sercom_index(sercom) * 2 + 1);
|
||||
dma_configure(general_dma_tx.channel_id, sercom_index(sercom) * 2 + 2, false);
|
||||
dma_configure(general_dma_rx.channel_id, sercom_index(sercom) * 2 + 1, false);
|
||||
|
||||
// Set up RX first.
|
||||
struct dma_descriptor_config descriptor_config;
|
||||
|
|
@ -168,3 +180,76 @@ enum status_code shared_dma_read(Sercom* sercom, uint8_t* buffer, uint32_t lengt
|
|||
while (sercom->SPI.INTFLAG.bit.RXC == 1) {}
|
||||
return general_dma_rx.job_status;
|
||||
}
|
||||
|
||||
bool allocate_block_counter() {
|
||||
// Find a timer to count DMA block completions.
|
||||
Tc *t = NULL;
|
||||
Tc *tcs[TC_INST_NUM] = TC_INSTS;
|
||||
for (uint8_t i = TC_INST_NUM; i > 0; i--) {
|
||||
if (tcs[i - 1]->COUNT16.CTRLA.bit.ENABLE == 0) {
|
||||
t = tcs[i - 1];
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (t == NULL) {
|
||||
return false;
|
||||
}
|
||||
MP_STATE_VM(audiodma_block_counter) = gc_alloc(sizeof(struct tc_module), false);
|
||||
if (MP_STATE_VM(audiodma_block_counter) == NULL) {
|
||||
return false;
|
||||
}
|
||||
|
||||
// Don't bother setting the period. We set it before you playback anything.
|
||||
struct tc_config config_tc;
|
||||
tc_get_config_defaults(&config_tc);
|
||||
config_tc.counter_size = TC_COUNTER_SIZE_16BIT;
|
||||
config_tc.clock_prescaler = TC_CLOCK_PRESCALER_DIV1;
|
||||
if (tc_init(MP_STATE_VM(audiodma_block_counter), t, &config_tc) != STATUS_OK) {
|
||||
return false;
|
||||
};
|
||||
|
||||
struct tc_events events_tc;
|
||||
events_tc.generate_event_on_overflow = false;
|
||||
events_tc.on_event_perform_action = true;
|
||||
events_tc.event_action = TC_EVENT_ACTION_INCREMENT_COUNTER;
|
||||
tc_enable_events(MP_STATE_VM(audiodma_block_counter), &events_tc);
|
||||
|
||||
// Connect the timer overflow event, which happens at the target frequency,
|
||||
// to the DAC conversion trigger.
|
||||
MP_STATE_VM(audiodma_block_event) = gc_alloc(sizeof(struct events_resource), false);
|
||||
if (MP_STATE_VM(audiodma_block_event) == NULL) {
|
||||
return false;
|
||||
}
|
||||
struct events_config config;
|
||||
events_get_config_defaults(&config);
|
||||
|
||||
uint8_t user = EVSYS_ID_USER_TC3_EVU;
|
||||
if (t == TC4) {
|
||||
user = EVSYS_ID_USER_TC4_EVU;
|
||||
} else if (t == TC5) {
|
||||
user = EVSYS_ID_USER_TC5_EVU;
|
||||
#ifdef TC6
|
||||
} else if (t == TC6) {
|
||||
user = EVSYS_ID_USER_TC6_EVU;
|
||||
#endif
|
||||
#ifdef TC7
|
||||
} else if (t == TC7) {
|
||||
user = EVSYS_ID_USER_TC7_EVU;
|
||||
#endif
|
||||
}
|
||||
|
||||
config.generator = EVSYS_ID_GEN_DMAC_CH_0;
|
||||
config.path = EVENTS_PATH_ASYNCHRONOUS;
|
||||
if (events_allocate(MP_STATE_VM(audiodma_block_event), &config) != STATUS_OK ||
|
||||
events_attach_user(MP_STATE_VM(audiodma_block_event), user) != STATUS_OK) {
|
||||
return false;
|
||||
}
|
||||
|
||||
tc_enable(MP_STATE_VM(audiodma_block_counter));
|
||||
tc_stop_counter(MP_STATE_VM(audiodma_block_counter));
|
||||
return true;
|
||||
}
|
||||
|
||||
void switch_audiodma_trigger(uint8_t trigger_dmac_id) {
|
||||
dma_configure(audio_dma.channel_id, trigger_dmac_id, true);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -33,9 +33,15 @@ extern struct dma_resource audio_dma;
|
|||
extern struct dma_resource general_dma_tx;
|
||||
extern struct dma_resource general_dma_rx;
|
||||
|
||||
volatile bool audio_dma_in_use;
|
||||
|
||||
void init_shared_dma(void);
|
||||
|
||||
enum status_code shared_dma_write(Sercom* sercom, const uint8_t* buffer, uint32_t length);
|
||||
enum status_code shared_dma_read(Sercom* sercom, uint8_t* buffer, uint32_t length, uint8_t tx);
|
||||
|
||||
// Allocate a counter to track how far along we are in a DMA double buffer.
|
||||
bool allocate_block_counter(void);
|
||||
void switch_audiodma_trigger(uint8_t trigger_dmac_id);
|
||||
|
||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_SHARED_DMA_H__
|
||||
|
|
|
|||
|
|
@ -137,6 +137,19 @@ static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_len
|
|||
if (!spi_flash_is_initialised) {
|
||||
return false;
|
||||
}
|
||||
// Don't bother writing if the data is all 1s. Thats equivalent to the flash
|
||||
// state after an erase.
|
||||
bool all_ones = true;
|
||||
for (uint16_t i = 0; i < data_length; i++) {
|
||||
if (data[i] != 0xff) {
|
||||
all_ones = false;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (all_ones) {
|
||||
return true;
|
||||
}
|
||||
|
||||
for (uint32_t bytes_written = 0;
|
||||
bytes_written < data_length;
|
||||
bytes_written += SPI_FLASH_PAGE_SIZE) {
|
||||
|
|
@ -145,12 +158,14 @@ static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_len
|
|||
}
|
||||
enum status_code status;
|
||||
|
||||
#ifdef SPI_FLASH_SECTOR_PROTECTION
|
||||
// Print out the protection status.
|
||||
uint8_t protect_check[5] = {0x3C, 0x00, 0x00, 0x00, 0x00};
|
||||
address_to_bytes(address + bytes_written, protect_check + 1);
|
||||
flash_enable();
|
||||
status = spi_write_buffer_wait(&spi_flash_instance, protect_check, 5);
|
||||
flash_disable();
|
||||
// uint8_t protect_check[5] = {0x3C, 0x00, 0x00, 0x00, 0x00};
|
||||
// address_to_bytes(address + bytes_written, protect_check + 1);
|
||||
// flash_enable();
|
||||
// status = spi_write_buffer_wait(&spi_flash_instance, protect_check, 5);
|
||||
// flash_disable();
|
||||
#endif
|
||||
|
||||
flash_enable();
|
||||
uint8_t command[4] = {CMD_PAGE_PROGRAM, 0x00, 0x00, 0x00};
|
||||
|
|
@ -167,6 +182,34 @@ static bool write_flash(uint32_t address, const uint8_t* data, uint32_t data_len
|
|||
return true;
|
||||
}
|
||||
|
||||
static bool page_erased(uint32_t sector_address) {
|
||||
// Check the first few bytes to catch the common case where there is data
|
||||
// without using a bunch of memory.
|
||||
uint8_t short_buffer[4];
|
||||
if (read_flash(sector_address, short_buffer, 4)) {
|
||||
for (uint16_t i = 0; i < 4; i++) {
|
||||
if (short_buffer[i] != 0xff) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
return false;
|
||||
}
|
||||
|
||||
// Now check the full length.
|
||||
uint8_t full_buffer[FILESYSTEM_BLOCK_SIZE];
|
||||
if (read_flash(sector_address, full_buffer, FILESYSTEM_BLOCK_SIZE)) {
|
||||
for (uint16_t i = 0; i < FILESYSTEM_BLOCK_SIZE; i++) {
|
||||
if (short_buffer[i] != 0xff) {
|
||||
return false;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
// Erases the given sector. Make sure you copied all of the data out of it you
|
||||
// need! Also note, sector_address is really 24 bits.
|
||||
static bool erase_sector(uint32_t sector_address) {
|
||||
|
|
@ -553,9 +596,14 @@ bool spi_flash_write_block(const uint8_t *data, uint32_t block) {
|
|||
uint32_t this_sector = address & (~(SPI_FLASH_ERASE_SIZE - 1));
|
||||
uint8_t block_index = (address / FILESYSTEM_BLOCK_SIZE) % (SPI_FLASH_ERASE_SIZE / FILESYSTEM_BLOCK_SIZE);
|
||||
uint8_t mask = 1 << (block_index);
|
||||
// Flush the cache if we're moving onto a sector our we're writing the
|
||||
// Flush the cache if we're moving onto a sector or we're writing the
|
||||
// same block again.
|
||||
if (current_sector != this_sector || (mask & dirty_mask) > 0) {
|
||||
// Check to see if we'd write to an erased page. In that case we
|
||||
// can write directly.
|
||||
if (page_erased(address)) {
|
||||
return write_flash(address, data, FILESYSTEM_BLOCK_SIZE);
|
||||
}
|
||||
if (current_sector != NO_SECTOR_LOADED) {
|
||||
spi_flash_flush_keep_cache(true);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -0,0 +1,213 @@
|
|||
/*
|
||||
* This file is part of the Micro Python project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include "lib/utils/context_manager_helpers.h"
|
||||
#include "py/binary.h"
|
||||
#include "py/objproperty.h"
|
||||
#include "py/runtime.h"
|
||||
#include "shared-bindings/microcontroller/Pin.h"
|
||||
#include "shared-bindings/audiobusio/PDMIn.h"
|
||||
|
||||
//| .. currentmodule:: audiobusio
|
||||
//|
|
||||
//| :class:`PDMIn` -- Record an input PDM audio stream
|
||||
//| ========================================================
|
||||
//|
|
||||
//| PDMIn can be used to record an input audio signal on a given set of pins.
|
||||
//|
|
||||
//| .. class:: PDMIn(clock_pin, data_pin, \*, frequency=8000, bit_depth=8, mono=True, oversample=64)
|
||||
//|
|
||||
//| Create a PDMIn object associated with the given pins. This allows you to
|
||||
//| record audio signals from the given pins. Individual ports may put further
|
||||
//| restrictions on the recording parameters.
|
||||
//|
|
||||
//| :param ~microcontroller.Pin clock_pin: The pin to output the clock to
|
||||
//| :param ~microcontroller.Pin data_pin: The pin to read the data from
|
||||
//| :param int frequency: Target frequency of the resulting samples. Check `frequency` for real value.
|
||||
//| :param int bit_depth: Final number of bits per sample. Must be divisible by 8
|
||||
//| :param bool mono: True when capturing a single channel of audio, captures two channels otherwise
|
||||
//| :param int oversample: Number of single bit samples to decimate into a final sample. Must be divisible by 8
|
||||
//|
|
||||
//| Simple record to buffer::
|
||||
//|
|
||||
//| import audiobusio
|
||||
//| import board
|
||||
//|
|
||||
//| # Prep a buffer to record into
|
||||
//| b = bytearray(200)
|
||||
//| with audiobusio.PDMIn(board.MICROPHONE_DATA, board.MICROPHONE_CLOCK) as mic:
|
||||
//| mic.record(b, len(b))
|
||||
//|
|
||||
STATIC mp_obj_t audiobusio_pdmin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *pos_args) {
|
||||
enum { ARG_frequency, ARG_bit_depth, ARG_mono, ARG_oversample };
|
||||
mp_map_t kw_args;
|
||||
mp_map_init_fixed_table(&kw_args, n_kw, pos_args + n_args);
|
||||
static const mp_arg_t allowed_args[] = {
|
||||
{ MP_QSTR_frequency, MP_ARG_INT, {.u_int = 8000} },
|
||||
{ MP_QSTR_bit_depth, MP_ARG_INT, {.u_int = 8} },
|
||||
{ MP_QSTR_mono, MP_ARG_BOOL,{.u_bool = false} },
|
||||
{ MP_QSTR_oversample, MP_ARG_INT, {.u_int = 64} },
|
||||
};
|
||||
mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)];
|
||||
mp_arg_parse_all(n_args - 2, pos_args + 2, &kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args);
|
||||
|
||||
mp_obj_t clock_pin_obj = pos_args[0];
|
||||
assert_pin(clock_pin_obj, false);
|
||||
const mcu_pin_obj_t *clock_pin = MP_OBJ_TO_PTR(clock_pin_obj);
|
||||
assert_pin_free(clock_pin);
|
||||
|
||||
mp_obj_t data_pin_obj = pos_args[1];
|
||||
assert_pin(data_pin_obj, false);
|
||||
const mcu_pin_obj_t *data_pin = MP_OBJ_TO_PTR(data_pin_obj);
|
||||
assert_pin_free(data_pin);
|
||||
|
||||
// create PDMIn object from the given pin
|
||||
audiobusio_pdmin_obj_t *self = m_new_obj(audiobusio_pdmin_obj_t);
|
||||
self->base.type = &audiobusio_pdmin_type;
|
||||
|
||||
uint32_t frequency = args[ARG_frequency].u_int;
|
||||
uint8_t bit_depth = args[ARG_bit_depth].u_int;
|
||||
if (bit_depth % 8 != 0) {
|
||||
mp_raise_ValueError("Bit depth must be multiple of 8.");
|
||||
}
|
||||
uint8_t oversample = args[ARG_oversample].u_int;
|
||||
if (oversample % 8 != 0) {
|
||||
mp_raise_ValueError("Oversample must be multiple of 8.");
|
||||
}
|
||||
bool mono = args[ARG_mono].u_bool;
|
||||
|
||||
common_hal_audiobusio_pdmin_construct(self, clock_pin, data_pin, frequency,
|
||||
bit_depth, mono, oversample);
|
||||
|
||||
return MP_OBJ_FROM_PTR(self);
|
||||
}
|
||||
|
||||
//| .. method:: deinit()
|
||||
//|
|
||||
//| Deinitialises the PWMOut and releases any hardware resources for reuse.
|
||||
//|
|
||||
STATIC mp_obj_t audiobusio_pdmin_deinit(mp_obj_t self_in) {
|
||||
audiobusio_pdmin_obj_t *self = MP_OBJ_TO_PTR(self_in);
|
||||
common_hal_audiobusio_pdmin_deinit(self);
|
||||
return mp_const_none;
|
||||
}
|
||||
STATIC MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_pdmin_deinit_obj, audiobusio_pdmin_deinit);
|
||||
|
||||
//| .. method:: __enter__()
|
||||
//|
|
||||
//| No-op used by Context Managers.
|
||||
//|
|
||||
// Provided by context manager helper.
|
||||
|
||||
//| .. method:: __exit__()
|
||||
//|
|
||||
//| Automatically deinitializes the hardware when exiting a context.
|
||||
//|
|
||||
STATIC mp_obj_t audiobusio_pdmin_obj___exit__(size_t n_args, const mp_obj_t *args) {
|
||||
(void)n_args;
|
||||
common_hal_audiobusio_pdmin_deinit(args[0]);
|
||||
return mp_const_none;
|
||||
}
|
||||
STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(audiobusio_pdmin___exit___obj, 4, 4, audiobusio_pdmin_obj___exit__);
|
||||
|
||||
|
||||
//| .. method:: record(destination, destination_length)
|
||||
//|
|
||||
//| Records destination_length bytes of samples to destination. This is
|
||||
//| blocking.
|
||||
//|
|
||||
//| An IOError may be raised when the destination is too slow to record the
|
||||
//| audio at the given rate. For internal flash, writing all 1s to the file
|
||||
//| before recording is recommended to speed up writes.
|
||||
//|
|
||||
STATIC mp_obj_t audiobusio_pdmin_obj_record(mp_obj_t self_obj, mp_obj_t destination, mp_obj_t destination_length) {
|
||||
audiobusio_pdmin_obj_t *self = MP_OBJ_TO_PTR(self_obj);
|
||||
|
||||
if (!MP_OBJ_IS_SMALL_INT(destination_length)) {
|
||||
mp_raise_TypeError("destination_length must be int");
|
||||
}
|
||||
uint32_t length = MP_OBJ_SMALL_INT_VALUE(destination_length);
|
||||
|
||||
mp_buffer_info_t bufinfo;
|
||||
if (MP_OBJ_IS_TYPE(destination, &fatfs_type_fileio)) {
|
||||
mp_raise_NotImplementedError("");
|
||||
} else if (mp_get_buffer(destination, &bufinfo, MP_BUFFER_WRITE)) {
|
||||
if (bufinfo.len < length) {
|
||||
mp_raise_ValueError("Target buffer cannot hold destination_length bytes.");
|
||||
}
|
||||
uint8_t bit_depth = common_hal_audiobusio_pdmin_get_bit_depth(self);
|
||||
if (bufinfo.typecode != 'H' && bit_depth == 16) {
|
||||
mp_raise_ValueError("destination buffer must be an array of type 'H' for bit_depth = 16");
|
||||
} else if (bufinfo.typecode != 'B' && bufinfo.typecode != BYTEARRAY_TYPECODE && bit_depth == 8) {
|
||||
mp_raise_ValueError("destination buffer must be a bytearray or array of type 'B' for bit_depth = 8");
|
||||
}
|
||||
length *= bit_depth / 8;
|
||||
uint32_t length_written =
|
||||
common_hal_audiobusio_pdmin_record_to_buffer(self, bufinfo.buf, length);
|
||||
if (length_written != length) {
|
||||
mp_printf(&mp_plat_print, "length mismatch %d %d\n", length_written, length);
|
||||
}
|
||||
}
|
||||
return mp_const_none;
|
||||
}
|
||||
MP_DEFINE_CONST_FUN_OBJ_3(audiobusio_pdmin_record_obj, audiobusio_pdmin_obj_record);
|
||||
|
||||
//| .. attribute:: frequency
|
||||
//|
|
||||
//| The actual frequency of the recording. This may not match the constructed
|
||||
//| frequency due to internal clock limitations.
|
||||
//|
|
||||
STATIC mp_obj_t audiobusio_pdmin_obj_get_frequency(mp_obj_t self_in) {
|
||||
audiobusio_pdmin_obj_t *self = MP_OBJ_TO_PTR(self_in);
|
||||
return MP_OBJ_NEW_SMALL_INT(common_hal_audiobusio_pdmin_get_frequency(self));
|
||||
}
|
||||
MP_DEFINE_CONST_FUN_OBJ_1(audiobusio_pdmin_get_frequency_obj, audiobusio_pdmin_obj_get_frequency);
|
||||
|
||||
const mp_obj_property_t audiobusio_pdmin_frequency_obj = {
|
||||
.base.type = &mp_type_property,
|
||||
.proxy = {(mp_obj_t)&audiobusio_pdmin_get_frequency_obj,
|
||||
(mp_obj_t)&mp_const_none_obj,
|
||||
(mp_obj_t)&mp_const_none_obj},
|
||||
};
|
||||
|
||||
STATIC const mp_rom_map_elem_t audiobusio_pdmin_locals_dict_table[] = {
|
||||
// Methods
|
||||
{ MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&audiobusio_pdmin_deinit_obj) },
|
||||
{ MP_ROM_QSTR(MP_QSTR___enter__), MP_ROM_PTR(&default___enter___obj) },
|
||||
{ MP_ROM_QSTR(MP_QSTR___exit__), MP_ROM_PTR(&audiobusio_pdmin___exit___obj) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_record), MP_ROM_PTR(&audiobusio_pdmin_record_obj) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_frequency), MP_ROM_PTR(&audiobusio_pdmin_frequency_obj) }
|
||||
};
|
||||
STATIC MP_DEFINE_CONST_DICT(audiobusio_pdmin_locals_dict, audiobusio_pdmin_locals_dict_table);
|
||||
|
||||
const mp_obj_type_t audiobusio_pdmin_type = {
|
||||
{ &mp_type_type },
|
||||
.name = MP_QSTR_PDMIn,
|
||||
.make_new = audiobusio_pdmin_make_new,
|
||||
.locals_dict = (mp_obj_dict_t*)&audiobusio_pdmin_locals_dict,
|
||||
};
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
/*
|
||||
* This file is part of the Micro Python project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef __MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOBUSIO_AUDIOOUT_H__
|
||||
#define __MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOBUSIO_AUDIOOUT_H__
|
||||
|
||||
#include "common-hal/audiobusio/PDMIn.h"
|
||||
#include "common-hal/microcontroller/Pin.h"
|
||||
#include "extmod/vfs_fat_file.h"
|
||||
|
||||
extern const mp_obj_type_t audiobusio_pdmin_type;
|
||||
|
||||
void common_hal_audiobusio_pdmin_construct(audiobusio_pdmin_obj_t* self,
|
||||
const mcu_pin_obj_t* clock_pin, const mcu_pin_obj_t* data_pin,
|
||||
uint32_t frequency, uint8_t bit_depth, bool mono, uint8_t oversample);
|
||||
void common_hal_audiobusio_pdmin_deinit(audiobusio_pdmin_obj_t* self);
|
||||
uint32_t common_hal_audiobusio_pdmin_record_to_buffer(audiobusio_pdmin_obj_t* self,
|
||||
uint16_t* buffer, uint32_t length);
|
||||
uint8_t common_hal_audiobusio_pdmin_get_bit_depth(audiobusio_pdmin_obj_t* self);
|
||||
uint32_t common_hal_audiobusio_pdmin_get_frequency(audiobusio_pdmin_obj_t* self);
|
||||
// TODO(tannewt): Add record to file
|
||||
|
||||
#endif // __MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOBUSIO_AUDIOOUT_H__
|
||||
|
|
@ -0,0 +1,70 @@
|
|||
/*
|
||||
* This file is part of the MicroPython project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include "py/obj.h"
|
||||
#include "py/runtime.h"
|
||||
|
||||
#include "shared-bindings/microcontroller/Pin.h"
|
||||
#include "shared-bindings/audiobusio/__init__.h"
|
||||
#include "shared-bindings/audiobusio/PDMIn.h"
|
||||
|
||||
//| :mod:`audiobusio` --- Support for audio input and output over digital bus
|
||||
//| =================================================
|
||||
//|
|
||||
//| .. module:: audiobusio
|
||||
//| :synopsis: Support for audio input and output over digital bus
|
||||
//| :platform: SAMD21
|
||||
//|
|
||||
//| The `audiobusio` module contains classes to provide access to audio IO
|
||||
//| over digital buses. These protocols are used to communicate audio to other
|
||||
//| chips in the same circuit. It doesn't include audio interconnect protocols
|
||||
//| such as S/PDIF.
|
||||
//|
|
||||
//| Libraries
|
||||
//|
|
||||
//| .. toctree::
|
||||
//| :maxdepth: 3
|
||||
//|
|
||||
//| PDMIn
|
||||
//|
|
||||
//| All libraries change hardware state and should be deinitialized when they
|
||||
//| are no longer needed. To do so, either call :py:meth:`!deinit` or use a
|
||||
//| context manager.
|
||||
//|
|
||||
|
||||
STATIC const mp_rom_map_elem_t audiobusio_module_globals_table[] = {
|
||||
{ MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_audiobusio) },
|
||||
{ MP_ROM_QSTR(MP_QSTR_PDMIn), MP_ROM_PTR(&audiobusio_pdmin_type) },
|
||||
};
|
||||
|
||||
STATIC MP_DEFINE_CONST_DICT(audiobusio_module_globals, audiobusio_module_globals_table);
|
||||
|
||||
const mp_obj_module_t audiobusio_module = {
|
||||
.base = { &mp_type_module },
|
||||
.globals = (mp_obj_dict_t*)&audiobusio_module_globals,
|
||||
};
|
||||
|
|
@ -0,0 +1,34 @@
|
|||
/*
|
||||
* This file is part of the MicroPython project, http://micropython.org/
|
||||
*
|
||||
* The MIT License (MIT)
|
||||
*
|
||||
* Copyright (c) 2017 Scott Shawcroft for Adafruit Industries
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
||||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef __MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOBUSIO___INIT___H__
|
||||
#define __MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOBUSIO___INIT___H__
|
||||
|
||||
#include "py/obj.h"
|
||||
|
||||
// Nothing now.
|
||||
|
||||
#endif // __MICROPY_INCLUDED_SHARED_BINDINGS_AUDIOBUSIO___INIT___H__
|
||||
Loading…
Reference in New Issue