From 55784c93de618e8f7e569e2196e49c7651465d56 Mon Sep 17 00:00:00 2001 From: Dan Halbert Date: Sun, 26 Jun 2022 17:45:35 -0400 Subject: [PATCH] wip; compiles --- ports/espressif/Makefile | 18 +- .../boards/adafruit_feather_esp32_v2/board.c | 49 +++++ .../adafruit_feather_esp32_v2/mpconfigboard.h | 48 +++++ .../mpconfigboard.mk | 17 ++ .../boards/adafruit_feather_esp32_v2/pins.c | 86 +++++++++ .../adafruit_feather_esp32_v2/sdkconfig | 51 ++++++ .../boards/adafruit_feather_esp32s2/sdkconfig | 16 +- .../common-hal/alarm/touch/TouchAlarm.c | 30 ++- .../espressif/common-hal/analogio/AnalogIn.c | 6 +- .../espressif/common-hal/analogio/AnalogOut.c | 31 ++-- ports/espressif/common-hal/canio/CAN.c | 12 ++ .../common-hal/frequencyio/FrequencyIn.c | 16 +- .../common-hal/microcontroller/Pin.c | 7 +- .../common-hal/microcontroller/Processor.c | 22 ++- .../common-hal/microcontroller/__init__.c | 118 +++++++++++- ports/espressif/common-hal/touchio/TouchIn.c | 6 +- .../esp-idf-config/partitions-8MB-no-uf2.csv | 9 + .../sdkconfig-8MB-no-uf2.defaults | 18 ++ .../esp-idf-config/sdkconfig-8MB.defaults | 7 +- .../esp-idf-config/sdkconfig-ble.defaults | 156 +++++++++++++++- .../esp-idf-config/sdkconfig-esp32.defaults | 171 ++++++++++++++++++ .../esp-idf-config/sdkconfig-opt.defaults | 50 ++--- .../esp-idf-config/sdkconfig.defaults | 129 +++++-------- ports/espressif/modules/esp32_pico_mini_02.c | 37 ++++ ports/espressif/modules/esp32s2_wroom.c | 37 ++++ ports/espressif/modules/esp32s2_wrover.c | 38 ++++ ports/espressif/modules/esp32s3_wroom.c | 37 ++++ ports/espressif/modules/esp32s3_wrover.c | 38 ++++ ports/espressif/mpconfigport.h | 12 +- ports/espressif/mpconfigport.mk | 4 + ports/espressif/mphalport.c | 4 +- ports/espressif/peripherals/esp32/pins.c | 69 +++++++ ports/espressif/peripherals/esp32/pins.h | 111 ++++++++++++ ports/espressif/peripherals/esp32c3/pins.h | 22 +++ ports/espressif/peripherals/esp32s2/pins.h | 43 +++++ ports/espressif/peripherals/esp32s3/pins.h | 45 +++++ ports/espressif/peripherals/pins.h | 4 +- ports/espressif/peripherals/touch.c | 8 + ports/espressif/supervisor/port.c | 7 + ports/espressif/tools/build_memory_info.py | 9 + 40 files changed, 1450 insertions(+), 148 deletions(-) create mode 100644 ports/espressif/boards/adafruit_feather_esp32_v2/board.c create mode 100644 ports/espressif/boards/adafruit_feather_esp32_v2/mpconfigboard.h create mode 100644 ports/espressif/boards/adafruit_feather_esp32_v2/mpconfigboard.mk create mode 100644 ports/espressif/boards/adafruit_feather_esp32_v2/pins.c create mode 100644 ports/espressif/boards/adafruit_feather_esp32_v2/sdkconfig create mode 100644 ports/espressif/esp-idf-config/partitions-8MB-no-uf2.csv create mode 100644 ports/espressif/esp-idf-config/sdkconfig-8MB-no-uf2.defaults create mode 100644 ports/espressif/esp-idf-config/sdkconfig-esp32.defaults create mode 100644 ports/espressif/modules/esp32_pico_mini_02.c create mode 100644 ports/espressif/modules/esp32s2_wroom.c create mode 100644 ports/espressif/modules/esp32s2_wrover.c create mode 100644 ports/espressif/modules/esp32s3_wroom.c create mode 100644 ports/espressif/modules/esp32s3_wrover.c create mode 100644 ports/espressif/peripherals/esp32/pins.c create mode 100644 ports/espressif/peripherals/esp32/pins.h diff --git a/ports/espressif/Makefile b/ports/espressif/Makefile index acdf496edb..f713e942e6 100644 --- a/ports/espressif/Makefile +++ b/ports/espressif/Makefile @@ -194,7 +194,12 @@ LDFLAGS += \ -Wl,--build-id=none \ -fno-rtti -ifeq ($(IDF_TARGET),esp32c3) +ifeq ($(IDF_TARGET),esp32) +LDFLAGS += \ + -T$(IDF_TARGET).rom.newlib-data.ld \ + -T$(IDF_TARGET).rom.newlib-funcs.ld \ + -T$(IDF_TARGET).rom.spiflash.ld +else ifeq ($(IDF_TARGET),esp32c3) LDFLAGS += \ -Tesp32c3.rom.newlib.ld \ -Tesp32c3.rom.version.ld \ @@ -362,6 +367,9 @@ $(HEADER_BUILD)/qstr.split: | $(BUILD)/esp-idf/config/sdkconfig.h BINARY_WIFI_BLOBS = libcoexist.a libcore.a libespnow.a libmesh.a libnet80211.a libpp.a libsmartconfig.a libwapi.a BINARY_BLOBS = esp-idf/components/esp_phy/lib/$(IDF_TARGET)/libphy.a $(addprefix esp-idf/components/esp_wifi/lib/$(IDF_TARGET)/, $(BINARY_WIFI_BLOBS)) +ifeq ($(IDF_TARGET),esp32) +BINARY_BLOBS += esp-idf/components/esp_phy/lib/$(IDF_TARGET)/librtc.a +endif ESP_IDF_COMPONENTS_LINK = $(IDF_TARGET_ARCH) app_update bootloader_support driver efuse esp_adc_cal esp_common esp_event esp_hw_support esp_ipc esp_netif esp_pm esp_phy esp_ringbuf esp_rom esp_system esp_timer esp-tls esp_wifi freertos hal heap log lwip mbedtls mdns newlib nvs_flash pthread soc spi_flash vfs wpa_supplicant ifneq ($(CIRCUITPY_BLEIO),0) @@ -380,12 +388,16 @@ BINARY_BLOBS += esp-idf/components/xtensa/$(IDF_TARGET)/libxt_hal.a ESP_IDF_COMPONENTS_EXPANDED += esp-idf/components/xtensa/$(IDF_TARGET)/libxt_hal.a endif -ifeq ($(IDF_TARGET),esp32c3) +ifeq ($(IDF_TARGET),esp32) +BOOTLOADER_OFFSET = 0x0 +else ifeq ($(IDF_TARGET),esp32c3) BOOTLOADER_OFFSET = 0x0 else ifeq ($(IDF_TARGET),esp32s3) BOOTLOADER_OFFSET = 0x0 -else +else ifeq ($(IDF_TARGET),esp32s2) BOOTLOADER_OFFSET = 0x1000 +else +$(error unknown IDF_TARGET $(IDF_TARGET)) endif IDF_CMAKE_TARGETS = \ diff --git a/ports/espressif/boards/adafruit_feather_esp32_v2/board.c b/ports/espressif/boards/adafruit_feather_esp32_v2/board.c new file mode 100644 index 0000000000..4c433a9da8 --- /dev/null +++ b/ports/espressif/boards/adafruit_feather_esp32_v2/board.c @@ -0,0 +1,49 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "supervisor/board.h" +#include "mpconfigboard.h" +#include "shared-bindings/microcontroller/Pin.h" +#include "components/driver/include/driver/gpio.h" +#include "components/hal/include/hal/gpio_hal.h" +#include "common-hal/microcontroller/Pin.h" + +void board_init(void) { + reset_board(); +} + +bool board_requests_safe_mode(void) { + return false; +} + +void reset_board(void) { + // Turn on NeoPixel and I2C power by default. + gpio_set_direction(2, GPIO_MODE_DEF_OUTPUT); + gpio_set_level(2, true); +} + +void board_deinit(void) { +} diff --git a/ports/espressif/boards/adafruit_feather_esp32_v2/mpconfigboard.h b/ports/espressif/boards/adafruit_feather_esp32_v2/mpconfigboard.h new file mode 100644 index 0000000000..886963028b --- /dev/null +++ b/ports/espressif/boards/adafruit_feather_esp32_v2/mpconfigboard.h @@ -0,0 +1,48 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2022 Dan Halbert for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// Micropython setup + +#define MICROPY_HW_BOARD_NAME "Adafruit Feather ESP32 V2" +#define MICROPY_HW_MCU_NAME "ESP32" + +#define MICROPY_HW_NEOPIXEL (&pin_GPIO0) +#define CIRCUITPY_STATUS_LED_POWER (&pin_GPIO2) + +#define CIRCUITPY_BOARD_I2C (1) +#define CIRCUITPY_BOARD_I2C_PIN {{.scl = &pin_GPIO20, .sda = &pin_GPIO22}} + +#define CIRCUITPY_BOARD_SPI (1) +#define CIRCUITPY_BOARD_SPI_PIN {{.clock = &pin_GPIO5, .mosi = &pin_GPIO19, .miso = &pin_GPIO21}} + +#define CIRCUITPY_BOARD_UART (1) +#define CIRCUITPY_BOARD_UART_PIN {{.tx = &pin_GPIO8, .rx = &pin_GPIO7}} + +// For entering safe mode, use SW38 button +#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO38) + +// Explanation of how a user got into safe mode +#define BOARD_USER_SAFE_MODE_ACTION translate("pressing SW38 button at start up.\n") diff --git a/ports/espressif/boards/adafruit_feather_esp32_v2/mpconfigboard.mk b/ports/espressif/boards/adafruit_feather_esp32_v2/mpconfigboard.mk new file mode 100644 index 0000000000..9ec5919f54 --- /dev/null +++ b/ports/espressif/boards/adafruit_feather_esp32_v2/mpconfigboard.mk @@ -0,0 +1,17 @@ +CIRCUITPY_CREATOR_ID = 0x0000239A +CIRCUITPY_CREATION_ID = 0x00320001 + +IDF_TARGET = esp32 + +INTERNAL_FLASH_FILESYSTEM = 1 +LONGINT_IMPL = MPZ + +# The default queue depth of 16 overflows on release builds, +# so increase it to 32. +CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32 + +CIRCUITPY_ESP_FLASH_MODE = dio +CIRCUITPY_ESP_FLASH_FREQ = 40m +CIRCUITPY_ESP_FLASH_SIZE = 8MB + +CIRCUITPY_MODULE = esp32_pico_mini_02 diff --git a/ports/espressif/boards/adafruit_feather_esp32_v2/pins.c b/ports/espressif/boards/adafruit_feather_esp32_v2/pins.c new file mode 100644 index 0000000000..43cca6a7af --- /dev/null +++ b/ports/espressif/boards/adafruit_feather_esp32_v2/pins.c @@ -0,0 +1,86 @@ +#include "shared-bindings/board/__init__.h" + +STATIC const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + + // External pins are in silkscreen order, from top to bottom, left side, then right side + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) }, + { MP_ROM_QSTR(MP_QSTR_D26), MP_ROM_PTR(&pin_GPIO26) }, + + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO25) }, + { MP_ROM_QSTR(MP_QSTR_D25), MP_ROM_PTR(&pin_GPIO25) }, + + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO34) }, + { MP_ROM_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_GPIO34) }, + + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO39) }, + { MP_ROM_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_GPIO39) }, + + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO36) }, + + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO4) }, + + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO5) }, + + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO19) }, + { MP_ROM_QSTR(MP_QSTR_D19), MP_ROM_PTR(&pin_GPIO19) }, + + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO21) }, + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO21) }, + + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO7) }, + + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO8) }, + + { MP_ROM_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_GPIO37) }, + + { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_L), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_GPIO13) }, + + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_GPIO12) }, + + { MP_ROM_QSTR(MP_QSTR_D27), MP_ROM_PTR(&pin_GPIO27) }, + { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_GPIO27) }, + + { MP_ROM_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO33) }, + + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO15) }, + + { MP_ROM_QSTR(MP_QSTR_D32), MP_ROM_PTR(&pin_GPIO32) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO32) }, + + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO14) }, + + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO20) }, + { MP_ROM_QSTR(MP_QSTR_D20), MP_ROM_PTR(&pin_GPIO20) }, + + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO22) }, + { MP_ROM_QSTR(MP_QSTR_D22), MP_ROM_PTR(&pin_GPIO22) }, + + { MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_VOLTAGE_MONITOR), MP_ROM_PTR(&pin_GPIO35) }, + + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_SW38), MP_ROM_PTR(&pin_GPIO38) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO0) }, + + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL_I2C_POWER), MP_ROM_PTR(&pin_GPIO2) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) } +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/espressif/boards/adafruit_feather_esp32_v2/sdkconfig b/ports/espressif/boards/adafruit_feather_esp32_v2/sdkconfig new file mode 100644 index 0000000000..94333353af --- /dev/null +++ b/ports/espressif/boards/adafruit_feather_esp32_v2/sdkconfig @@ -0,0 +1,51 @@ + +# Espressif IoT Development Framework (ESP-IDF) Project Configuration +# +# Bootloader config +# +CONFIG_BOOTLOADER_LOG_LEVEL_NONE=y +# CONFIG_BOOTLOADER_LOG_LEVEL_INFO is not set +CONFIG_BOOTLOADER_LOG_LEVEL=0 +# end of Bootloader config + +# +# Serial flasher config +# +# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set +# end of Serial flasher config + +# +# Partition Table +# +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv" +CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv" +# end of Partition Table + +# +# Compiler options +# +# CONFIG_COMPILER_SAVE_RESTORE_LIBCALLS is not set +# end of Compiler options + +# +# Component config +# +# +# ESP32-specific +# +# CONFIG_ESP32_SPIRAM_SUPPORT is not set +# end of ESP32-specific + +# +# LWIP +# +CONFIG_LWIP_LOCAL_HOSTNAME="Adafruit-Feather-ESP32-V2" +# end of LWIP + +# end of Component config + +# +# Deprecated options for backward compatibility +# +# CONFIG_SPIRAM_SUPPORT is not set +# end of Deprecated options for backward compatibility diff --git a/ports/espressif/boards/adafruit_feather_esp32s2/sdkconfig b/ports/espressif/boards/adafruit_feather_esp32s2/sdkconfig index f19afafa3d..37fd534249 100644 --- a/ports/espressif/boards/adafruit_feather_esp32s2/sdkconfig +++ b/ports/espressif/boards/adafruit_feather_esp32s2/sdkconfig @@ -1,3 +1,9 @@ +# +# Component config +# +# +# ESP32S2-specific +# CONFIG_ESP32S2_SPIRAM_SUPPORT=y # # SPI RAM config @@ -7,12 +13,10 @@ CONFIG_SPIRAM_TYPE_ESPPSRAM16=y # CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set # CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set CONFIG_SPIRAM_SIZE=2097152 -# end of SPI RAM config - -CONFIG_DEFAULT_PSRAM_CLK_IO=30 # # PSRAM clock and cs IO for ESP32S2 # +CONFIG_DEFAULT_PSRAM_CLK_IO=30 CONFIG_DEFAULT_PSRAM_CS_IO=26 # end of PSRAM clock and cs IO for ESP32S2 @@ -30,8 +34,14 @@ CONFIG_SPIRAM_USE_MEMMAP=y # CONFIG_SPIRAM_USE_MALLOC is not set CONFIG_SPIRAM_MEMTEST=y # CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set +# end of SPI RAM config + +# end of ESP32S2-specific + # # LWIP # CONFIG_LWIP_LOCAL_HOSTNAME="espressif" # end of LWIP + +# end of Component config diff --git a/ports/espressif/common-hal/alarm/touch/TouchAlarm.c b/ports/espressif/common-hal/alarm/touch/TouchAlarm.c index 941b99d6fd..0caeeea915 100644 --- a/ports/espressif/common-hal/alarm/touch/TouchAlarm.c +++ b/ports/espressif/common-hal/alarm/touch/TouchAlarm.c @@ -58,10 +58,17 @@ mp_obj_t alarm_touch_touchalarm_create_wakeup_alarm(void) { alarm->base.type = &alarm_touch_touchalarm_type; alarm->pin = NULL; + #if defined(CONFIG_IDF_TARGET_ESP32) + touch_pad_t wake_channel; + if (touch_pad_get_wakeup_status(&wake_channel) != ESP_OK) { + return alarm; + } + #else touch_pad_t wake_channel = touch_pad_get_current_meas_channel(); if (wake_channel == TOUCH_PAD_MAX) { return alarm; } + #endif // Map the pin number back to a pin object. for (size_t i = 0; i < mcu_pin_globals.map.used; i++) { @@ -122,16 +129,27 @@ void alarm_touch_touchalarm_set_alarm(const bool deep_sleep, const size_t n_alar mp_hal_delay_ms(10); // configure trigger threshold + #if defined(CONFIG_IDF_TARGET_ESP32) + uint16_t touch_value; + touch_pad_read(touch_channel, &touch_value); + touch_pad_set_thresh(touch_channel, touch_value * 0.1); // 10% + #else uint32_t touch_value; touch_pad_read_benchmark(touch_channel, &touch_value); - touch_pad_set_thresh(touch_channel, touch_value * 0.1); // 10% + touch_pad_set_threshold(touch_channel, touch_value * 0.1); // 10% + #endif } } // configure touch interrupt + #if defined(CONFIG_IDF_TARGET_ESP32) + touch_pad_isr_register(touch_interrupt, NULL); + touch_pad_intr_enable(); + #else touch_pad_timeout_set(true, SOC_TOUCH_PAD_THRESHOLD_MAX); touch_pad_isr_register(touch_interrupt, NULL, TOUCH_PAD_INTR_MASK_ALL); touch_pad_intr_enable(TOUCH_PAD_INTR_MASK_ACTIVE | TOUCH_PAD_INTR_MASK_INACTIVE); + #endif } void alarm_touch_touchalarm_prepare_for_deep_sleep(void) { @@ -154,17 +172,25 @@ void alarm_touch_touchalarm_prepare_for_deep_sleep(void) { // intialize touchpad peripherals_touch_init(touch_channel); + #if !defined(CONFIG_IDF_TARGET_ESP32) // configure touchpad for sleep touch_pad_sleep_channel_enable(touch_channel, true); touch_pad_sleep_channel_enable_proximity(touch_channel, false); + #endif // wait for touch data to reset mp_hal_delay_ms(10); // configure trigger threshold + #if defined(CONFIG_IDF_TARGET_ESP32) + uint16_t touch_value; + touch_pad_read_filtered(touch_channel, &touch_value); + touch_pad_set_thresh(touch_channel, touch_value); + #else uint32_t touch_value; touch_pad_sleep_channel_read_smooth(touch_channel, &touch_value); - touch_pad_sleep_set_threshold(touch_channel, touch_value * 0.1); // 10% + touch_pad_sleep_set_threshold(touch_channel, touch_value / 10); // 10% + #endif // enable touchpad wakeup esp_sleep_enable_touchpad_wakeup(); diff --git a/ports/espressif/common-hal/analogio/AnalogIn.c b/ports/espressif/common-hal/analogio/AnalogIn.c index a81a8add22..fb2e098cb4 100644 --- a/ports/espressif/common-hal/analogio/AnalogIn.c +++ b/ports/espressif/common-hal/analogio/AnalogIn.c @@ -40,12 +40,16 @@ #define DEFAULT_VREF 1100 #define NO_OF_SAMPLES 2 #define ATTENUATION ADC_ATTEN_DB_11 -#ifdef CONFIG_IDF_TARGET_ESP32C3 +#if defined(CONFIG_IDF_TARGET_ESP32) +#define DATA_WIDTH ADC_WIDTH_BIT_12 +#elif defined(CONFIG_IDF_TARGET_ESP32C3) #define DATA_WIDTH ADC_WIDTH_BIT_12 #elif defined(CONFIG_IDF_TARGET_ESP32S2) #define DATA_WIDTH ADC_WIDTH_BIT_13 #elif defined(CONFIG_IDF_TARGET_ESP32S3) #define DATA_WIDTH ADC_WIDTH_BIT_12 +#else +#error No known CONFIG_IDF_TARGET_xxx found #endif void common_hal_analogio_analogin_construct(analogio_analogin_obj_t *self, diff --git a/ports/espressif/common-hal/analogio/AnalogOut.c b/ports/espressif/common-hal/analogio/AnalogOut.c index cc99d4faa1..8720dcf8bb 100644 --- a/ports/espressif/common-hal/analogio/AnalogOut.c +++ b/ports/espressif/common-hal/analogio/AnalogOut.c @@ -35,20 +35,29 @@ #include "shared-bindings/microcontroller/Pin.h" #include "supervisor/shared/translate/translate.h" -#ifdef CONFIG_IDF_TARGET_ESP32S2 +#if defined(CONFIG_IDF_TARGET_ESP32) || defined(CONFIG_IDF_TARGET_ESP32S2) #include "components/driver/include/driver/dac_common.h" +#define HAS_DAC 1 +#if defined(CONFIG_IDF_TARGET_ESP32) +#define pin_CHANNEL_1 pin_GPIO25 +#define pin_CHANNEL_2 pin_GPIO26 +#elif defined(CONFIG_IDF_TARGET_ESP32S2) +#define pin_CHANNEL_1 pin_GPIO17 +#define pin_CHANNEL_2 pin_GPIO18 +#endif +#else +#define HAS_DAC 0 #endif - -#include "common-hal/microcontroller/Pin.h" void common_hal_analogio_analogout_construct(analogio_analogout_obj_t *self, const mcu_pin_obj_t *pin) { - #ifdef CONFIG_IDF_TARGET_ESP32S2 - if (pin == &pin_GPIO17) { + #if HAS_DAC + if (pin == &pin_CHANNEL_1) { self->channel = DAC_CHANNEL_1; - } else if (pin == &pin_GPIO18) { + } else if (pin == &pin_CHANNEL_2) { self->channel = DAC_CHANNEL_2; - } else { + } + else { raise_ValueError_invalid_pin(); } dac_output_enable(self->channel); @@ -58,7 +67,7 @@ void common_hal_analogio_analogout_construct(analogio_analogout_obj_t *self, } bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { - #ifdef CONFIG_IDF_TARGET_ESP32S2 + #if HAS_DAC return self->channel == DAC_CHANNEL_MAX; #else return false; @@ -66,7 +75,7 @@ bool common_hal_analogio_analogout_deinited(analogio_analogout_obj_t *self) { } void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { - #ifdef CONFIG_IDF_TARGET_ESP32S2 + #if HAS_DAC dac_output_disable(self->channel); self->channel = DAC_CHANNEL_MAX; #endif @@ -74,7 +83,7 @@ void common_hal_analogio_analogout_deinit(analogio_analogout_obj_t *self) { void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, uint16_t value) { - #ifdef CONFIG_IDF_TARGET_ESP32S2 + #if HAS_DAC uint8_t dac_value = (value * 255) / 65535; dac_output_enable(self->channel); dac_output_voltage(self->channel, dac_value); @@ -82,7 +91,7 @@ void common_hal_analogio_analogout_set_value(analogio_analogout_obj_t *self, } void analogout_reset(void) { - #ifdef CONFIG_IDF_TARGET_ESP32S2 + #if HAS_DAC dac_output_disable(DAC_CHANNEL_1); dac_output_disable(DAC_CHANNEL_2); #endif diff --git a/ports/espressif/common-hal/canio/CAN.c b/ports/espressif/common-hal/canio/CAN.c index c9f585b9be..67cf7b9591 100644 --- a/ports/espressif/common-hal/canio/CAN.c +++ b/ports/espressif/common-hal/canio/CAN.c @@ -76,30 +76,42 @@ STATIC twai_timing_config_t get_t_config(int baudrate) { twai_timing_config_t t_config = TWAI_TIMING_CONFIG_25KBITS(); return t_config; } + #if defined(TWAI_TIMING_CONFIG_20KBITS) case 20000: { twai_timing_config_t t_config = TWAI_TIMING_CONFIG_20KBITS(); return t_config; } + #endif + #if defined(TWAI_TIMING_CONFIG_16KBITS) case 16000: { twai_timing_config_t t_config = TWAI_TIMING_CONFIG_16KBITS(); return t_config; } + #endif + #if defined(TWAI_TIMING_CONFIG_12_5KBITS) case 12500: { twai_timing_config_t t_config = TWAI_TIMING_CONFIG_12_5KBITS(); return t_config; } + #endif + #if defined(TWAI_TIMING_CONFIG_10KBITS) case 10000: { twai_timing_config_t t_config = TWAI_TIMING_CONFIG_10KBITS(); return t_config; } + #endif + #if defined(TWAI_TIMING_CONFIG_5KBITS) case 5000: { twai_timing_config_t t_config = TWAI_TIMING_CONFIG_5KBITS(); return t_config; } + #endif + #if defined(TWAI_TIMING_CONFIG_1KBITS) case 1000: { twai_timing_config_t t_config = TWAI_TIMING_CONFIG_1KBITS(); return t_config; } + #endif default: mp_raise_ValueError(translate("Baudrate not supported by peripheral")); } diff --git a/ports/espressif/common-hal/frequencyio/FrequencyIn.c b/ports/espressif/common-hal/frequencyio/FrequencyIn.c index 9a7e8e812f..d35614ea19 100644 --- a/ports/espressif/common-hal/frequencyio/FrequencyIn.c +++ b/ports/espressif/common-hal/frequencyio/FrequencyIn.c @@ -55,15 +55,29 @@ static void IRAM_ATTR timer_interrupt_handler(void *self_in) { // reset interrupt timg_dev_t *device = self->timer.group ? &(TIMERG1) : &(TIMERG0); + + #if defined(CONFIG_IDF_TARGET_ESP32) + if (self->timer.idx) { + device->int_clr_timers.t1 = 1; + } else { + device->int_clr_timers.t0 = 1; + } + #else if (self->timer.idx) { device->int_clr_timers.t1_int_clr = 1; } else { device->int_clr_timers.t0_int_clr = 1; } - #ifdef CONFIG_IDF_TARGET_ESP32S2 + #endif + + #if defined(CONFIG_IDF_TARGET_ESP32) + device->hw_timer[self->timer.idx].config.alarm_en = 1; + #elif defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32C2) device->hw_timer[self->timer.idx].config.tx_alarm_en = 1; #elif defined(CONFIG_IDF_TARGET_ESP32S3) device->hw_timer[self->timer.idx].config.tn_alarm_en = 1; + #else + #error No known CONFIG_IDF_TARGET_xxx found #endif } diff --git a/ports/espressif/common-hal/microcontroller/Pin.c b/ports/espressif/common-hal/microcontroller/Pin.c index 1323c9ae5d..957ddd3492 100644 --- a/ports/espressif/common-hal/microcontroller/Pin.c +++ b/ports/espressif/common-hal/microcontroller/Pin.c @@ -55,7 +55,12 @@ MP_WEAK bool espressif_board_reset_pin_number(gpio_num_t pin_number) { } STATIC void _reset_pin(gpio_num_t pin_number) { - #if defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) + // Never ever reset pins used for flash and RAM. + #if defined(CONFIG_IDF_TARGET_ESP32) + if (pin_number == 6 || pin_number == 11 || pin_number == 9 || pin_number == 10) { + return; + } + #elif defined(CONFIG_IDF_TARGET_ESP32S2) || defined(CONFIG_IDF_TARGET_ESP32S3) // Never ever reset pins used for flash and RAM. if (26 <= pin_number && pin_number <= 32) { return; diff --git a/ports/espressif/common-hal/microcontroller/Processor.c b/ports/espressif/common-hal/microcontroller/Processor.c index 5ceefa411f..9b97b98cbd 100644 --- a/ports/espressif/common-hal/microcontroller/Processor.c +++ b/ports/espressif/common-hal/microcontroller/Processor.c @@ -39,11 +39,14 @@ #include "esp_system.h" #include "soc/efuse_reg.h" + +#if !defined(CONFIG_IDF_TARGET_ESP32) && !defined(CONFIG_IDF_TARGET_ESP32S3) #include "driver/temp_sensor.h" +#endif float common_hal_mcu_processor_get_temperature(void) { float tsens_out; - #ifdef CONFIG_IDF_TARGET_ESP32S3 + #if defined(CONFIG_IDF_TARGET_ESP32S3) || defined(CONFIG_IDF_TARGET_ESP32) mp_raise_NotImplementedError(NULL); #else temp_sensor_config_t temp_sensor = TSENS_CONFIG_DEFAULT(); // DEFAULT: range:-10℃ ~ 80℃, error < 1℃. @@ -60,12 +63,16 @@ float common_hal_mcu_processor_get_voltage(void) { } uint32_t common_hal_mcu_processor_get_frequency(void) { - #ifdef CONFIG_IDF_TARGET_ESP32C3 + #if defined(CONFIG_IDF_TARGET_ESP32) + return CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ * 100000; + #elif defined(CONFIG_IDF_TARGET_ESP32C3) return CONFIG_ESP32C3_DEFAULT_CPU_FREQ_MHZ * 1000000; #elif defined(CONFIG_IDF_TARGET_ESP32S2) return CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ * 1000000; #elif defined(CONFIG_IDF_TARGET_ESP32S3) return CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ * 1000000; + #else + #error No known CONFIG_IDF_TARGET_xxx found #endif } @@ -78,7 +85,13 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { uint8_t *ptr = &raw_id[COMMON_HAL_MCU_PROCESSOR_UID_LENGTH - 1]; // MAC address contains 48 bits (6 bytes), 32 in the low order word + + #if defined(CONFIG_IDF_TARGET_ESP32) + uint32_t mac_address_part = REG_READ(EFUSE_BLK0_RDATA1_REG); + #else uint32_t mac_address_part = REG_READ(EFUSE_RD_MAC_SPI_SYS_0_REG); + #endif + *ptr-- = swap_nibbles(mac_address_part & 0xff); mac_address_part >>= 8; *ptr-- = swap_nibbles(mac_address_part & 0xff); @@ -88,7 +101,12 @@ void common_hal_mcu_processor_get_uid(uint8_t raw_id[]) { *ptr-- = swap_nibbles(mac_address_part & 0xff); // and 16 in the high order word + #if defined(CONFIG_IDF_TARGET_ESP32) + mac_address_part = REG_READ(EFUSE_BLK0_RDATA2_REG); + #else mac_address_part = REG_READ(EFUSE_RD_MAC_SPI_SYS_1_REG); + #endif + *ptr-- = swap_nibbles(mac_address_part & 0xff); mac_address_part >>= 8; *ptr-- = swap_nibbles(mac_address_part & 0xff); diff --git a/ports/espressif/common-hal/microcontroller/__init__.c b/ports/espressif/common-hal/microcontroller/__init__.c index 3cf41ba7f0..4af5ddba86 100644 --- a/ports/espressif/common-hal/microcontroller/__init__.c +++ b/ports/espressif/common-hal/microcontroller/__init__.c @@ -45,7 +45,9 @@ #include "soc/rtc_cntl_reg.h" #include "esp_private/system_internal.h" -#ifdef CONFIG_IDF_TARGET_ESP32C3 +#if defined(CONFIG_IDF_TARGET_ESP32) +#include "esp32/rom/rtc.h" +#elif defined(CONFIG_IDF_TARGET_ESP32C3) #include "esp32c3/rom/rtc.h" #elif defined(CONFIG_IDF_TARGET_ESP32S2) #include "esp32s2/rom/rtc.h" @@ -55,6 +57,8 @@ #include "esp32s3/rom/rtc.h" #include "esp32s3/rom/usb/usb_persist.h" #include "esp32s3/rom/usb/chip_usb_dw_wrapper.h" +#else +#error No known CONFIG_IDF_TARGET_xxx found #endif void common_hal_mcu_delay_us(uint32_t delay) { @@ -85,16 +89,22 @@ void common_hal_mcu_enable_interrupts(void) { void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { switch (runmode) { case RUNMODE_UF2: - #ifndef CONFIG_IDF_TARGET_ESP32C3 + #if defined(CONFIG_IDF_TARGET_ESP32) ||defined(CONFIG_IDF_TARGET_ESP32C3) + mp_arg_error_invalid(MP_QSTR_run_mode); + #else // 0x11F2 is APP_REQUEST_UF2_RESET_HINT & is defined by TinyUF2 esp_reset_reason_set_hint(0x11F2); #endif break; case RUNMODE_NORMAL: + #if defined(CONFIG_IDF_TARGET_ESP32) + safe_mode_on_next_reset(NO_SAFE_MODE); + #else // revert back to normal boot REG_WRITE(RTC_RESET_CAUSE_REG, 0); // reset uf2 REG_WRITE(RTC_CNTL_STORE0_REG, 0); // reset safe mode REG_WRITE(RTC_CNTL_OPTION1_REG, 0); // reset bootloader + #endif break; case RUNMODE_SAFE_MODE: // enter safe mode on next boot @@ -102,10 +112,12 @@ void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) { break; case RUNMODE_BOOTLOADER: // DFU download - #ifndef CONFIG_IDF_TARGET_ESP32C3 + #if defined(CONFIG_IDF_TARGET_ESP32) ||defined(CONFIG_IDF_TARGET_ESP32C3) + mp_arg_error_invalid(MP_QSTR_run_mode); + #else chip_usb_set_persist_flags(USBDC_BOOT_DFU); - #endif REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT); + #endif break; default: break; @@ -149,49 +161,145 @@ watchdog_watchdogtimer_obj_t common_hal_mcu_watchdogtimer_obj = { // This maps MCU pin names to pin objects. STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = { + #ifdef GPIO0_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO0), MP_ROM_PTR(&pin_GPIO0) }, + #endif + #ifdef GPIO1_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO1), MP_ROM_PTR(&pin_GPIO1) }, + #endif + #ifdef GPIO2_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO2), MP_ROM_PTR(&pin_GPIO2) }, + #endif + #ifdef GPIO3_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO3), MP_ROM_PTR(&pin_GPIO3) }, + #endif + #ifdef GPIO4_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO4), MP_ROM_PTR(&pin_GPIO4) }, + #endif + #ifdef GPIO5_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO5), MP_ROM_PTR(&pin_GPIO5) }, + #endif + #ifdef GPIO6_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO6), MP_ROM_PTR(&pin_GPIO6) }, + #endif + #ifdef GPIO7_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO7), MP_ROM_PTR(&pin_GPIO7) }, + #endif + #ifdef GPIO8_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO8), MP_ROM_PTR(&pin_GPIO8) }, + #endif + #ifdef GPIO9_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO9), MP_ROM_PTR(&pin_GPIO9) }, + #endif + #ifdef GPIO10_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO10), MP_ROM_PTR(&pin_GPIO10) }, + #endif + #ifdef GPIO11_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO11), MP_ROM_PTR(&pin_GPIO11) }, + #endif + #ifdef GPIO12_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO12), MP_ROM_PTR(&pin_GPIO12) }, + #endif + #ifdef GPIO13_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO13), MP_ROM_PTR(&pin_GPIO13) }, + #endif + #ifdef GPIO14_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO14), MP_ROM_PTR(&pin_GPIO14) }, + #endif + #ifdef GPIO15_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO15), MP_ROM_PTR(&pin_GPIO15) }, + #endif + #ifdef GPIO16_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO16), MP_ROM_PTR(&pin_GPIO16) }, + #endif + #ifdef GPIO17_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO17), MP_ROM_PTR(&pin_GPIO17) }, + #endif + #ifdef GPIO18_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO18), MP_ROM_PTR(&pin_GPIO18) }, + #endif + #ifdef GPIO19_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO19), MP_ROM_PTR(&pin_GPIO19) }, + #endif + #ifdef GPIO20_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO20), MP_ROM_PTR(&pin_GPIO20) }, + #endif + #ifdef GPIO21_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO21), MP_ROM_PTR(&pin_GPIO21) }, - #ifndef CONFIG_IDF_TARGET_ESP32C3 + #endif + #ifdef GPIO22_EXISTS + { MP_ROM_QSTR(MP_QSTR_GPIO22), MP_ROM_PTR(&pin_GPIO22) }, + #endif + #ifdef GPIO23_EXISTS + { MP_ROM_QSTR(MP_QSTR_GPIO23), MP_ROM_PTR(&pin_GPIO23) }, + #endif + #ifdef GPIO24_EXISTS + { MP_ROM_QSTR(MP_QSTR_GPIO24), MP_ROM_PTR(&pin_GPIO24) }, + #endif + #ifdef GPIO25_EXISTS + { MP_ROM_QSTR(MP_QSTR_GPIO25), MP_ROM_PTR(&pin_GPIO25) }, + #endif + #ifdef GPIO26_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO26), MP_ROM_PTR(&pin_GPIO26) }, + #endif + #ifdef GPIO27_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO27), MP_ROM_PTR(&pin_GPIO27) }, + #endif + #ifdef GPIO28_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO28), MP_ROM_PTR(&pin_GPIO28) }, + #endif + #ifdef GPIO29_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO29), MP_ROM_PTR(&pin_GPIO29) }, + #endif + #ifdef GPIO30_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO30), MP_ROM_PTR(&pin_GPIO30) }, + #endif + #ifdef GPIO31_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO31), MP_ROM_PTR(&pin_GPIO31) }, + #endif + #ifdef GPIO32_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO32), MP_ROM_PTR(&pin_GPIO32) }, + #endif + #ifdef GPIO33_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO33), MP_ROM_PTR(&pin_GPIO33) }, + #endif + #ifdef GPIO34_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO34), MP_ROM_PTR(&pin_GPIO34) }, + #endif + #ifdef GPIO35_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO35), MP_ROM_PTR(&pin_GPIO35) }, + #endif + #ifdef GPIO36_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO36), MP_ROM_PTR(&pin_GPIO36) }, + #endif + #ifdef GPIO37_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO37), MP_ROM_PTR(&pin_GPIO37) }, + #endif + #ifdef GPIO38_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO38), MP_ROM_PTR(&pin_GPIO38) }, + #endif + #ifdef GPIO39_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO39), MP_ROM_PTR(&pin_GPIO39) }, + #endif + #ifdef GPIO40_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO40), MP_ROM_PTR(&pin_GPIO40) }, + #endif + #ifdef GPIO41_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO41), MP_ROM_PTR(&pin_GPIO41) }, + #endif + #ifdef GPIO42_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO42), MP_ROM_PTR(&pin_GPIO42) }, + #endif + #ifdef GPIO43_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO43), MP_ROM_PTR(&pin_GPIO43) }, + #endif + #ifdef GPIO44_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO44), MP_ROM_PTR(&pin_GPIO44) }, + #endif + #ifdef GPIO45_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO45), MP_ROM_PTR(&pin_GPIO45) }, + #endif + #ifdef GPIO46_EXISTS { MP_ROM_QSTR(MP_QSTR_GPIO46), MP_ROM_PTR(&pin_GPIO46) }, #endif }; diff --git a/ports/espressif/common-hal/touchio/TouchIn.c b/ports/espressif/common-hal/touchio/TouchIn.c index 14a27637c8..523245f359 100644 --- a/ports/espressif/common-hal/touchio/TouchIn.c +++ b/ports/espressif/common-hal/touchio/TouchIn.c @@ -31,12 +31,16 @@ #include "shared-bindings/microcontroller/Pin.h" static uint16_t get_raw_reading(touchio_touchin_obj_t *self) { + #if defined(CONFIG_IDF_TARGET_ESP32) + uint16_t touch_value; + #else uint32_t touch_value; + #endif; touch_pad_read_raw_data(self->pin->touch_channel, &touch_value); if (touch_value > UINT16_MAX) { return UINT16_MAX; } - return touch_value; + return (uint16_t)touch_value; } void common_hal_touchio_touchin_construct(touchio_touchin_obj_t *self, diff --git a/ports/espressif/esp-idf-config/partitions-8MB-no-uf2.csv b/ports/espressif/esp-idf-config/partitions-8MB-no-uf2.csv new file mode 100644 index 0000000000..e7bfe0c51f --- /dev/null +++ b/ports/espressif/esp-idf-config/partitions-8MB-no-uf2.csv @@ -0,0 +1,9 @@ +# ESP-IDF Partition Table +# Name, Type, SubType, Offset, Size, Flags +# bootloader.bin,, 0x1000, 32K +# partition table,, 0x8000, 4K +nvs, data, nvs, 0x9000, 20K, +otadata, data, ota, 0xe000, 8K, +ota_0, 0, ota_0, 0x10000, 2048K, +ota_1, 0, ota_1, 0x210000, 2048K, +user_fs, data, fat, 0x410000, 4032K, diff --git a/ports/espressif/esp-idf-config/sdkconfig-8MB-no-uf2.defaults b/ports/espressif/esp-idf-config/sdkconfig-8MB-no-uf2.defaults new file mode 100644 index 0000000000..2a2548ba04 --- /dev/null +++ b/ports/espressif/esp-idf-config/sdkconfig-8MB-no-uf2.defaults @@ -0,0 +1,18 @@ +# +# Serial flasher config +# +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE="8MB" +CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y +# end of Serial flasher config + +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv" +# +# Partition Table +# +CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv" +# end of Partition Table diff --git a/ports/espressif/esp-idf-config/sdkconfig-8MB.defaults b/ports/espressif/esp-idf-config/sdkconfig-8MB.defaults index ba91195364..1ecb1b4c16 100644 --- a/ports/espressif/esp-idf-config/sdkconfig-8MB.defaults +++ b/ports/espressif/esp-idf-config/sdkconfig-8MB.defaults @@ -6,9 +6,6 @@ # CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set CONFIG_ESPTOOLPY_FLASHSIZE_8MB=y # CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set CONFIG_ESPTOOLPY_FLASHSIZE="8MB" CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y # end of Serial flasher config @@ -16,6 +13,6 @@ CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y # # Partition Table # -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB.csv" +CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB.csv" # end of Partition Table diff --git a/ports/espressif/esp-idf-config/sdkconfig-ble.defaults b/ports/espressif/esp-idf-config/sdkconfig-ble.defaults index 0260d9f53f..8180786fbf 100644 --- a/ports/espressif/esp-idf-config/sdkconfig-ble.defaults +++ b/ports/espressif/esp-idf-config/sdkconfig-ble.defaults @@ -4,7 +4,161 @@ # # Bluetooth # -# CONFIG_BT_ENABLED is not set +CONFIG_BT_ENABLED=y +# +# Bluetooth controller +# +CONFIG_BT_CTRL_MODE_EFF=1 +CONFIG_BT_CTRL_BLE_MAX_ACT=10 +CONFIG_BT_CTRL_BLE_MAX_ACT_EFF=10 +CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB=0 +CONFIG_BT_CTRL_PINNED_TO_CORE=0 +CONFIG_BT_CTRL_HCI_MODE_VHCI=y +# CONFIG_BT_CTRL_HCI_MODE_UART_H4 is not set +CONFIG_BT_CTRL_HCI_TL=1 +CONFIG_BT_CTRL_ADV_DUP_FILT_MAX=30 +# CONFIG_BT_CTRL_HW_CCA is not set +CONFIG_BT_CTRL_HW_CCA_VAL=20 +CONFIG_BT_CTRL_HW_CCA_EFF=0 +CONFIG_BT_CTRL_CE_LENGTH_TYPE_ORIG=y +# CONFIG_BT_CTRL_CE_LENGTH_TYPE_CE is not set +# CONFIG_BT_CTRL_CE_LENGTH_TYPE_SD is not set +CONFIG_BT_CTRL_CE_LENGTH_TYPE_EFF=0 +CONFIG_BT_CTRL_TX_ANTENNA_INDEX_0=y +# CONFIG_BT_CTRL_TX_ANTENNA_INDEX_1 is not set +CONFIG_BT_CTRL_TX_ANTENNA_INDEX_EFF=0 +CONFIG_BT_CTRL_RX_ANTENNA_INDEX_0=y +# CONFIG_BT_CTRL_RX_ANTENNA_INDEX_1 is not set +CONFIG_BT_CTRL_RX_ANTENNA_INDEX_EFF=0 +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N27 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N24 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N21 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N18 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N15 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N12 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N9 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N6 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N3 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_N0 is not set +CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P3=y +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P6 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P9 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P12 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P15 is not set +# CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_P18 is not set +CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF=10 +CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP=y +CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM=100 +CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD=20 +# CONFIG_BT_CTRL_BLE_SCAN_DUPL is not set +# CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EN is not set +CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_DIS=y +CONFIG_BT_CTRL_COEX_PHY_CODED_TX_RX_TLIM_EFF=0 +# +# MODEM SLEEP Options +# +# CONFIG_BT_CTRL_MODEM_SLEEP is not set +# end of MODEM SLEEP Options + +CONFIG_BT_CTRL_SLEEP_MODE_EFF=0 +CONFIG_BT_CTRL_SLEEP_CLOCK_EFF=0 +CONFIG_BT_CTRL_HCI_TL_EFF=1 +# CONFIG_BT_CTRL_AGC_RECORRECT_EN is not set +# end of Bluetooth controller + +# CONFIG_BT_BLUEDROID_ENABLED is not set +CONFIG_BT_NIMBLE_ENABLED=y +# CONFIG_BT_CONTROLLER_ONLY is not set +# +# NimBLE Options +# +CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y +# CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_DEFAULT is not set +# CONFIG_BT_NIMBLE_LOG_LEVEL_NONE is not set +# CONFIG_BT_NIMBLE_LOG_LEVEL_ERROR is not set +# CONFIG_BT_NIMBLE_LOG_LEVEL_WARNING is not set +CONFIG_BT_NIMBLE_LOG_LEVEL_INFO=y +# CONFIG_BT_NIMBLE_LOG_LEVEL_DEBUG is not set +CONFIG_BT_NIMBLE_LOG_LEVEL=1 +CONFIG_BT_NIMBLE_MAX_CONNECTIONS=3 +CONFIG_BT_NIMBLE_MAX_BONDS=3 +CONFIG_BT_NIMBLE_MAX_CCCDS=8 +CONFIG_BT_NIMBLE_L2CAP_COC_MAX_NUM=0 +CONFIG_BT_NIMBLE_TASK_STACK_SIZE=4096 +CONFIG_BT_NIMBLE_ROLE_CENTRAL=y +CONFIG_BT_NIMBLE_ROLE_PERIPHERAL=y +CONFIG_BT_NIMBLE_ROLE_BROADCASTER=y +CONFIG_BT_NIMBLE_ROLE_OBSERVER=y +CONFIG_BT_NIMBLE_NVS_PERSIST=y +CONFIG_BT_NIMBLE_SM_LEGACY=y +CONFIG_BT_NIMBLE_SM_SC=y +# CONFIG_BT_NIMBLE_DEBUG is not set +# CONFIG_BT_NIMBLE_SM_SC_DEBUG_KEYS is not set +CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME="nimble" +CONFIG_BT_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31 +CONFIG_BT_NIMBLE_ATT_PREFERRED_MTU=256 +CONFIG_BT_NIMBLE_SVC_GAP_APPEARANCE=0 +CONFIG_BT_NIMBLE_ACL_BUF_COUNT=20 +CONFIG_BT_NIMBLE_ACL_BUF_SIZE=255 +CONFIG_BT_NIMBLE_HCI_EVT_BUF_SIZE=70 +CONFIG_BT_NIMBLE_HCI_EVT_HI_BUF_COUNT=30 +CONFIG_BT_NIMBLE_HCI_EVT_LO_BUF_COUNT=8 +CONFIG_BT_NIMBLE_MSYS1_BLOCK_COUNT=12 +# CONFIG_BT_NIMBLE_HS_FLOW_CTRL is not set +CONFIG_BT_NIMBLE_RPA_TIMEOUT=900 +# CONFIG_BT_NIMBLE_MESH is not set +CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS=y +CONFIG_BT_NIMBLE_HS_STOP_TIMEOUT_MS=2000 +# CONFIG_BT_NIMBLE_HOST_BASED_PRIVACY is not set +CONFIG_BT_NIMBLE_ENABLE_CONN_REATTEMPT=y +CONFIG_BT_NIMBLE_MAX_CONN_REATTEMPT=3 +CONFIG_BT_NIMBLE_EXT_ADV=y +CONFIG_BT_NIMBLE_MAX_EXT_ADV_INSTANCES=1 +CONFIG_BT_NIMBLE_MAX_EXT_ADV_DATA_LEN=1650 +CONFIG_BT_NIMBLE_ENABLE_PERIODIC_ADV=y +CONFIG_BT_NIMBLE_MAX_PERIODIC_SYNCS=1 +# CONFIG_BT_NIMBLE_BLUFI_ENABLE is not set +CONFIG_BT_NIMBLE_USE_ESP_TIMER=y +# end of NimBLE Options + # end of Bluetooth # end of Component config + +# +# Deprecated options for backward compatibility +# +# CONFIG_BLUEDROID_ENABLED is not set +CONFIG_NIMBLE_ENABLED=y +CONFIG_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y +# CONFIG_NIMBLE_MEM_ALLOC_MODE_DEFAULT is not set +CONFIG_NIMBLE_MAX_CONNECTIONS=3 +CONFIG_NIMBLE_MAX_BONDS=3 +CONFIG_NIMBLE_MAX_CCCDS=8 +CONFIG_NIMBLE_L2CAP_COC_MAX_NUM=0 +CONFIG_NIMBLE_TASK_STACK_SIZE=4096 +CONFIG_NIMBLE_ROLE_CENTRAL=y +CONFIG_NIMBLE_ROLE_PERIPHERAL=y +CONFIG_NIMBLE_ROLE_BROADCASTER=y +CONFIG_NIMBLE_ROLE_OBSERVER=y +CONFIG_NIMBLE_NVS_PERSIST=y +CONFIG_NIMBLE_SM_LEGACY=y +CONFIG_NIMBLE_SM_SC=y +# CONFIG_NIMBLE_DEBUG is not set +# CONFIG_NIMBLE_SM_SC_DEBUG_KEYS is not set +CONFIG_NIMBLE_SVC_GAP_DEVICE_NAME="nimble" +CONFIG_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31 +CONFIG_NIMBLE_ATT_PREFERRED_MTU=256 +CONFIG_NIMBLE_SVC_GAP_APPEARANCE=0 +CONFIG_NIMBLE_ACL_BUF_COUNT=20 +CONFIG_NIMBLE_ACL_BUF_SIZE=255 +CONFIG_NIMBLE_HCI_EVT_BUF_SIZE=70 +CONFIG_NIMBLE_HCI_EVT_HI_BUF_COUNT=30 +CONFIG_NIMBLE_HCI_EVT_LO_BUF_COUNT=8 +CONFIG_NIMBLE_MSYS1_BLOCK_COUNT=12 +# CONFIG_NIMBLE_HS_FLOW_CTRL is not set +CONFIG_NIMBLE_RPA_TIMEOUT=900 +# CONFIG_NIMBLE_MESH is not set +CONFIG_NIMBLE_CRYPTO_STACK_MBEDTLS=y +CONFIG_SW_COEXIST_ENABLE=y +# end of Deprecated options for backward compatibility diff --git a/ports/espressif/esp-idf-config/sdkconfig-esp32.defaults b/ports/espressif/esp-idf-config/sdkconfig-esp32.defaults new file mode 100644 index 0000000000..6d949c2898 --- /dev/null +++ b/ports/espressif/esp-idf-config/sdkconfig-esp32.defaults @@ -0,0 +1,171 @@ +CONFIG_IDF_TARGET_ARCH_XTENSA=y +CONFIG_IDF_TARGET="esp32" +CONFIG_IDF_TARGET_ESP32=y +CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000 +# +# SDK tool configuration +# +CONFIG_SDK_TOOLPREFIX="xtensa-esp32-elf-" +# end of SDK tool configuration + +# +# Bootloader config +# +CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000 +# end of Bootloader config + +# +# Component config +# +# +# ESP32-specific +# +CONFIG_ESP32_REV_MIN_0=y +# CONFIG_ESP32_REV_MIN_1 is not set +# CONFIG_ESP32_REV_MIN_2 is not set +# CONFIG_ESP32_REV_MIN_3 is not set +CONFIG_ESP32_REV_MIN=0 +CONFIG_ESP32_DPORT_WORKAROUND=y +# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set +CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y +# CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set +CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160 +# CONFIG_ESP32_TRAX is not set +CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0 +# CONFIG_ESP32_ULP_COPROC_ENABLED is not set +CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0 +CONFIG_ESP32_DEBUG_OCDAWARE=y +CONFIG_ESP32_BROWNOUT_DET=y +CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_1 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_2 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_3 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_4 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_5 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set +CONFIG_ESP32_BROWNOUT_DET_LVL=0 +CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y +# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set +# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set +# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set +CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y +# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set +# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set +# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set +CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 +CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 +CONFIG_ESP32_XTAL_FREQ_40=y +# CONFIG_ESP32_XTAL_FREQ_26 is not set +# CONFIG_ESP32_XTAL_FREQ_AUTO is not set +CONFIG_ESP32_XTAL_FREQ=40 +# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set +# CONFIG_ESP32_NO_BLOBS is not set +# CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set +# CONFIG_ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set +# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set +CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL=5 +# end of ESP32-specific + +# +# Hardware Settings +# +# +# MAC Config +# +# CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set +CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y +CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4 +# end of MAC Config + +# +# Sleep Config +# +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y +# CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND is not set +# end of Sleep Config + +# end of Hardware Settings + +# +# ESP System Settings +# +CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y +# CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set +# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set +CONFIG_ESP_MAIN_TASK_AFFINITY=0x0 +# end of ESP System Settings + +# +# Ethernet +# +CONFIG_ETH_USE_ESP32_EMAC=n + +# +# Wi-Fi +# +CONFIG_ESP32_WIFI_ENABLED=y +CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 +CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 +# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set +CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y +CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 +CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 +# CONFIG_ESP32_WIFI_CSI_ENABLED is not set +CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y +CONFIG_ESP32_WIFI_TX_BA_WIN=6 +CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y +CONFIG_ESP32_WIFI_RX_BA_WIN=6 +CONFIG_ESP32_WIFI_NVS_ENABLED=y +CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y +# CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 is not set +CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 +CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 +CONFIG_ESP32_WIFI_IRAM_OPT=y +CONFIG_ESP32_WIFI_RX_IRAM_OPT=y +CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y +# end of Wi-Fi + +# +# FreeRTOS +# +# CONFIG_FREERTOS_UNICORE is not set +CONFIG_FREERTOS_TICK_SUPPORT_CORETIMER=y +CONFIG_FREERTOS_CORETIMER_0=y +# CONFIG_FREERTOS_CORETIMER_1 is not set +CONFIG_FREERTOS_SYSTICK_USES_CCOUNT=y +# end of FreeRTOS + +# end of Component config + +# +# Deprecated options for backward compatibility +# +CONFIG_TOOLPREFIX="xtensa-esp32-elf-" +# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set +CONFIG_ESP32_APPTRACE_DEST_NONE=y +CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y +CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y +# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set +# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set +# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set +CONFIG_ESP_SYSTEM_PD_FLASH=y +# CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND is not set +CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set +CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP32_REDUCE_PHY_TX_POWER=y +# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set +# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set +# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set +CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y +CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 +CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +CONFIG_ESP32_PTHREAD_STACK_MIN=768 +CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set +CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 +CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" +# end of Deprecated options for backward compatibility diff --git a/ports/espressif/esp-idf-config/sdkconfig-opt.defaults b/ports/espressif/esp-idf-config/sdkconfig-opt.defaults index b00d04770f..e9b91113d5 100644 --- a/ports/espressif/esp-idf-config/sdkconfig-opt.defaults +++ b/ports/espressif/esp-idf-config/sdkconfig-opt.defaults @@ -14,36 +14,44 @@ CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y CONFIG_COMPILER_OPTIMIZATION_SIZE=y # CONFIG_COMPILER_OPTIMIZATION_PERF is not set # CONFIG_COMPILER_OPTIMIZATION_NONE is not set -CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y -# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE is not set +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set -CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2 +CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=1 # CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set # end of Compiler options # # Component config # +# +# ESP32S3-Specific +# +CONFIG_ESP32S3_DEBUG_OCDAWARE=y +# end of ESP32S3-Specific + # # Common ESP-related # -CONFIG_ESP_ERR_TO_NAME_LOOKUP=y +# CONFIG_ESP_ERR_TO_NAME_LOOKUP is not set # end of Common ESP-related # # ESP System Settings # -CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y +# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set # CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT is not set -# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set +CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT=y # CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set -CONFIG_ESP_CONSOLE_UART_DEFAULT=y +# CONFIG_ESP_CONSOLE_UART_DEFAULT is not set +# CONFIG_ESP_CONSOLE_USB_CDC is not set +# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG is not set # CONFIG_ESP_CONSOLE_UART_CUSTOM is not set -# CONFIG_ESP_CONSOLE_NONE is not set -CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_NONE=y +# CONFIG_ESP_CONSOLE_SECONDARY_NONE is not set +CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG=y CONFIG_ESP_CONSOLE_MULTIPLE_UART=y -CONFIG_ESP_CONSOLE_UART_NUM=0 -CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 +CONFIG_ESP_CONSOLE_UART_NUM=-1 # end of ESP System Settings # @@ -62,8 +70,7 @@ CONFIG_FREERTOS_DEBUG_OCDAWARE=y CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y # CONFIG_HAL_ASSERTION_DISABLE is not set # CONFIG_HAL_ASSERTION_SILIENT is not set -# CONFIG_HAL_ASSERTION_ENABLE is not set -CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2 +CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=1 # end of Hardware Abstraction Layer (HAL) and Low Level (LL) # @@ -79,17 +86,16 @@ CONFIG_LWIP_ESP_LWIP_ASSERT=y # # CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y -CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y -# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set +# CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED is not set +CONFIG_OPTIMIZATION_ASSERTIONS_SILENT=y # CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set -CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2 -CONFIG_ESP32S2_PANIC_PRINT_HALT=y +CONFIG_OPTIMIZATION_ASSERTION_LEVEL=1 +# CONFIG_ESP32S2_PANIC_PRINT_HALT is not set # CONFIG_ESP32S2_PANIC_PRINT_REBOOT is not set -# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set +CONFIG_ESP32S2_PANIC_SILENT_REBOOT=y # CONFIG_ESP32S2_PANIC_GDBSTUB is not set -CONFIG_CONSOLE_UART_DEFAULT=y +# CONFIG_CONSOLE_UART_DEFAULT is not set # CONFIG_CONSOLE_UART_CUSTOM is not set -# CONFIG_ESP_CONSOLE_UART_NONE is not set -CONFIG_CONSOLE_UART_NUM=0 -CONFIG_CONSOLE_UART_BAUDRATE=115200 +CONFIG_ESP_CONSOLE_UART_NONE=y +CONFIG_CONSOLE_UART_NUM=-1 # end of Deprecated options for backward compatibility diff --git a/ports/espressif/esp-idf-config/sdkconfig.defaults b/ports/espressif/esp-idf-config/sdkconfig.defaults index 9ad89d4811..5fb49faa82 100644 --- a/ports/espressif/esp-idf-config/sdkconfig.defaults +++ b/ports/espressif/esp-idf-config/sdkconfig.defaults @@ -54,25 +54,37 @@ CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y # # Security features # +CONFIG_SECURE_BOOT_SUPPORTS_RSA=y +CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE=y # CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set # CONFIG_SECURE_BOOT is not set # CONFIG_SECURE_FLASH_ENC_ENABLED is not set # end of Security features +# +# Boot ROM Behavior +# +CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y +# CONFIG_BOOT_ROM_LOG_ALWAYS_OFF is not set +# CONFIG_BOOT_ROM_LOG_ON_GPIO_HIGH is not set +# CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW is not set +# end of Boot ROM Behavior + # # Serial flasher config # CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200 # CONFIG_ESPTOOLPY_NO_STUB is not set +# CONFIG_ESPTOOLPY_OCT_FLASH is not set # CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set # CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set CONFIG_ESPTOOLPY_FLASHMODE_DIO=y # CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y CONFIG_ESPTOOLPY_FLASHMODE="dio" +# CONFIG_ESPTOOLPY_FLASHFREQ_120M is not set # CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set CONFIG_ESPTOOLPY_FLASHFREQ_40M=y -# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set CONFIG_ESPTOOLPY_FLASHFREQ="40m" CONFIG_ESPTOOLPY_BEFORE_RESET=y @@ -96,10 +108,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 # # Partition Table # -CONFIG_PARTITION_TABLE_SINGLE_APP=y +# CONFIG_PARTITION_TABLE_SINGLE_APP is not set # CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set +CONFIG_PARTITION_TABLE_CUSTOM=y CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -130,6 +142,7 @@ CONFIG_APPTRACE_DEST_NONE=y CONFIG_APPTRACE_LOCK_ENABLE=y # end of Application Level Tracing +# CONFIG_BLE_MESH is not set # # Driver configurations # @@ -159,10 +172,6 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y # TWAI configuration # # CONFIG_TWAI_ISR_IN_IRAM is not set -# CONFIG_TWAI_ERRATA_FIX_BUS_OFF_REC is not set -# CONFIG_TWAI_ERRATA_FIX_TX_INTR_LOST is not set -# CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID is not set -# CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT is not set # end of TWAI configuration # @@ -171,18 +180,6 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y # CONFIG_UART_ISR_IN_IRAM is not set # end of UART configuration -# -# RTCIO configuration -# -# CONFIG_RTCIO_SUPPORT_RTC_GPIO_DESC is not set -# end of RTCIO configuration - -# -# GPIO Configuration -# -# CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL is not set -# end of GPIO Configuration - # # GDMA Configuration # @@ -197,45 +194,24 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y # # CONFIG_EFUSE_CUSTOM_TABLE is not set # CONFIG_EFUSE_VIRTUAL is not set -# CONFIG_EFUSE_CODE_SCHEME_COMPAT_NONE is not set -CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4=y -# CONFIG_EFUSE_CODE_SCHEME_COMPAT_REPEAT is not set -CONFIG_EFUSE_MAX_BLK_LEN=192 +CONFIG_EFUSE_MAX_BLK_LEN=256 # end of eFuse Bit Manager # # ESP-TLS # CONFIG_ESP_TLS_USING_MBEDTLS=y -# CONFIG_ESP_TLS_USE_SECURE_ELEMENT is not set -# CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS is not set +CONFIG_ESP_TLS_USE_DS_PERIPHERAL=y CONFIG_ESP_TLS_SERVER=y +# CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS is not set # CONFIG_ESP_TLS_SERVER_SESSION_TICKETS is not set -# CONFIG_ESP_TLS_SERVER_MIN_AUTH_MODE_OPTIONAL is not set # CONFIG_ESP_TLS_PSK_VERIFICATION is not set # CONFIG_ESP_TLS_INSECURE is not set # end of ESP-TLS -# -# ADC-Calibration -# -CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y -CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y -CONFIG_ADC_CAL_LUT_ENABLE=y -# end of ADC-Calibration - # # Ethernet # -CONFIG_ETH_ENABLED=y -CONFIG_ETH_USE_ESP32_EMAC=y -CONFIG_ETH_PHY_INTERFACE_RMII=y -CONFIG_ETH_RMII_CLK_INPUT=y -# CONFIG_ETH_RMII_CLK_OUTPUT is not set -CONFIG_ETH_RMII_CLK_IN_GPIO=0 -CONFIG_ETH_DMA_BUFFER_SIZE=512 -CONFIG_ETH_DMA_RX_BUFFER_NUM=10 -CONFIG_ETH_DMA_TX_BUFFER_NUM=10 # CONFIG_ETH_USE_SPI_ETHERNET is not set # CONFIG_ETH_USE_OPENETH is not set # end of Ethernet @@ -264,9 +240,16 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y # Sleep Config # CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y +# CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND is not set # CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND is not set # end of Sleep Config +# +# RTC Clock Config +# +CONFIG_RTC_CLOCK_BBPLL_POWER_ON_WITH_USB=y +# end of RTC Clock Config + # end of Hardware Settings # @@ -283,7 +266,7 @@ CONFIG_ESP_IPC_ISR_ENABLE=y CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 CONFIG_ESP_NETIF_TCPIP_LWIP=y # CONFIG_ESP_NETIF_LOOPBACK is not set -CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER=y +# CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER is not set # end of ESP NETIF Adapter # @@ -293,34 +276,32 @@ CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 CONFIG_ESP_PHY_MAX_TX_POWER=20 -CONFIG_ESP_PHY_REDUCE_TX_POWER=y # end of PHY # # Power Management # # CONFIG_PM_ENABLE is not set +CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y +CONFIG_PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP=y # end of Power Management # # ESP System Settings # # CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME is not set +CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y +CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 -CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 +CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192 CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 CONFIG_ESP_INT_WDT=y CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 CONFIG_ESP_INT_WDT_CHECK_CPU1=y -CONFIG_ESP_TASK_WDT=y -# CONFIG_ESP_TASK_WDT_PANIC is not set -CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 -CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y -CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y +# CONFIG_ESP_TASK_WDT is not set # CONFIG_ESP_PANIC_HANDLER_IRAM is not set # CONFIG_ESP_DEBUG_STUBS_ENABLE is not set -# CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y # end of ESP System Settings @@ -333,15 +314,16 @@ CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1 # CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set -# CONFIG_ESP_TIMER_IMPL_FRC2 is not set -CONFIG_ESP_TIMER_IMPL_TG0_LAC=y +CONFIG_ESP_TIMER_IMPL_SYSTIMER=y # end of High resolution timer (esp_timer) # # Wi-Fi # # CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set +# CONFIG_ESP_WIFI_FTM_ENABLE is not set # CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set +# CONFIG_ESP_WIFI_GCMP_SUPPORT is not set # CONFIG_ESP_WIFI_GMAC_SUPPORT is not set CONFIG_ESP_WIFI_SOFTAP_SUPPORT=y # end of Wi-Fi @@ -358,6 +340,10 @@ CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y # FreeRTOS # CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF +CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER=y +CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y +# CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set +CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER=y CONFIG_FREERTOS_HZ=100 # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set @@ -380,7 +366,6 @@ CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y # CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set # CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set -# CONFIG_FREERTOS_FPU_IN_ISR is not set CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y # CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH is not set # end of FreeRTOS @@ -593,6 +578,7 @@ CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE_PATH="certificates/nina-fw/data/roots.p CONFIG_MBEDTLS_ECP_RESTARTABLE=y CONFIG_MBEDTLS_CMAC_C=y CONFIG_MBEDTLS_HARDWARE_AES=y +CONFIG_MBEDTLS_AES_USE_INTERRUPT=y CONFIG_MBEDTLS_HARDWARE_MPI=y CONFIG_MBEDTLS_HARDWARE_SHA=y CONFIG_MBEDTLS_ROM_MD5=y @@ -743,6 +729,7 @@ CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" # CONFIG_SPI_FLASH_VERIFY_WRITE is not set # CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y +# CONFIG_SPI_FLASH_ROM_IMPL is not set CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y # CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set # CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set @@ -763,6 +750,7 @@ CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP=y CONFIG_SPI_FLASH_SUPPORT_TH_CHIP=y +CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP=y # end of Auto-detect flash chips CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y @@ -795,8 +783,6 @@ CONFIG_WPA_MBEDTLS_CRYPTO=y # CONFIG_WPA_TESTING_OPTIONS is not set # CONFIG_WPA_WPS_STRICT is not set # CONFIG_WPA_11KV_SUPPORT is not set -# CONFIG_WPA_MBO_SUPPORT is not set -# CONFIG_WPA_DPP_SUPPORT is not set # end of Supplicant # end of Component config @@ -840,41 +826,18 @@ CONFIG_STACK_CHECK_NONE=y # CONFIG_WARN_WRITE_STRINGS is not set # CONFIG_DISABLE_GCC8_WARNINGS is not set CONFIG_ADC2_DISABLE_DAC=y -CONFIG_TRACEMEM_RESERVE_DRAM=0x0 -# CONFIG_ULP_COPROC_ENABLED is not set -CONFIG_ULP_COPROC_RESERVE_MEM=0 -CONFIG_BROWNOUT_DET=y -CONFIG_BROWNOUT_DET_LVL_SEL_0=y -# CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set -# CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set -# CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set -# CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set -# CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set -# CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set -# CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set -CONFIG_BROWNOUT_DET_LVL=0 -# CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set -# CONFIG_NO_BLOBS is not set -# CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_EVENT_LOOP_PROFILING is not set CONFIG_POST_EVENTS_FROM_ISR=y CONFIG_POST_EVENTS_FROM_IRAM_ISR=y -# CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set -CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y -CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 CONFIG_IPC_TASK_STACK_SIZE=1536 +CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU=y CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 -CONFIG_MAIN_TASK_STACK_SIZE=3584 -CONFIG_CONSOLE_UART=y +CONFIG_MAIN_TASK_STACK_SIZE=8192 CONFIG_INT_WDT=y CONFIG_INT_WDT_TIMEOUT_MS=300 CONFIG_INT_WDT_CHECK_CPU1=y -CONFIG_TASK_WDT=y -# CONFIG_TASK_WDT_PANIC is not set -CONFIG_TASK_WDT_TIMEOUT_S=5 -CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y -CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y +# CONFIG_TASK_WDT is not set CONFIG_TIMER_TASK_STACK_SIZE=3584 # CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set CONFIG_TIMER_TASK_PRIORITY=1 diff --git a/ports/espressif/modules/esp32_pico_mini_02.c b/ports/espressif/modules/esp32_pico_mini_02.c new file mode 100644 index 0000000000..e115ca27e0 --- /dev/null +++ b/ports/espressif/modules/esp32_pico_mini_02.c @@ -0,0 +1,37 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "modules/module.h" + +void never_reset_module_internal_pins(void) { + // SPI Flash + common_hal_never_reset_pin(&pin_GPIO6); + common_hal_never_reset_pin(&pin_GPIO11); + + // PSRAM + common_hal_never_reset_pin(&pin_GPIO9); + common_hal_never_reset_pin(&pin_GPIO10); +} diff --git a/ports/espressif/modules/esp32s2_wroom.c b/ports/espressif/modules/esp32s2_wroom.c new file mode 100644 index 0000000000..5e530701bf --- /dev/null +++ b/ports/espressif/modules/esp32s2_wroom.c @@ -0,0 +1,37 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "modules/module.h" + +void never_reset_module_internal_pins(void) { + // SPI Flash + common_hal_never_reset_pin(&pin_GPIO27); + common_hal_never_reset_pin(&pin_GPIO28); + common_hal_never_reset_pin(&pin_GPIO29); + common_hal_never_reset_pin(&pin_GPIO30); + common_hal_never_reset_pin(&pin_GPIO31); + common_hal_never_reset_pin(&pin_GPIO32); +} diff --git a/ports/espressif/modules/esp32s2_wrover.c b/ports/espressif/modules/esp32s2_wrover.c new file mode 100644 index 0000000000..23fa7ee5ca --- /dev/null +++ b/ports/espressif/modules/esp32s2_wrover.c @@ -0,0 +1,38 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "modules/module.h" + +void never_reset_module_internal_pins(void) { + // SPI Flash and RAM + common_hal_never_reset_pin(&pin_GPIO26); + common_hal_never_reset_pin(&pin_GPIO27); + common_hal_never_reset_pin(&pin_GPIO28); + common_hal_never_reset_pin(&pin_GPIO29); + common_hal_never_reset_pin(&pin_GPIO30); + common_hal_never_reset_pin(&pin_GPIO31); + common_hal_never_reset_pin(&pin_GPIO32); +} diff --git a/ports/espressif/modules/esp32s3_wroom.c b/ports/espressif/modules/esp32s3_wroom.c new file mode 100644 index 0000000000..5e530701bf --- /dev/null +++ b/ports/espressif/modules/esp32s3_wroom.c @@ -0,0 +1,37 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "modules/module.h" + +void never_reset_module_internal_pins(void) { + // SPI Flash + common_hal_never_reset_pin(&pin_GPIO27); + common_hal_never_reset_pin(&pin_GPIO28); + common_hal_never_reset_pin(&pin_GPIO29); + common_hal_never_reset_pin(&pin_GPIO30); + common_hal_never_reset_pin(&pin_GPIO31); + common_hal_never_reset_pin(&pin_GPIO32); +} diff --git a/ports/espressif/modules/esp32s3_wrover.c b/ports/espressif/modules/esp32s3_wrover.c new file mode 100644 index 0000000000..23fa7ee5ca --- /dev/null +++ b/ports/espressif/modules/esp32s3_wrover.c @@ -0,0 +1,38 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "modules/module.h" + +void never_reset_module_internal_pins(void) { + // SPI Flash and RAM + common_hal_never_reset_pin(&pin_GPIO26); + common_hal_never_reset_pin(&pin_GPIO27); + common_hal_never_reset_pin(&pin_GPIO28); + common_hal_never_reset_pin(&pin_GPIO29); + common_hal_never_reset_pin(&pin_GPIO30); + common_hal_never_reset_pin(&pin_GPIO31); + common_hal_never_reset_pin(&pin_GPIO32); +} diff --git a/ports/espressif/mpconfigport.h b/ports/espressif/mpconfigport.h index f390112387..72a9b32478 100644 --- a/ports/espressif/mpconfigport.h +++ b/ports/espressif/mpconfigport.h @@ -53,11 +53,13 @@ // Nearly all boards have this because it is used to enter the ROM bootloader. #ifndef CIRCUITPY_BOOT_BUTTON -#ifdef CONFIG_IDF_TARGET_ESP32C3 -#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO9) -#else -#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) -#endif + #ifdef CONFIG_IDF_TARGET_ESP32C3 + #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO9) + #else + #ifndef CONFIG_IDF_TARGET_ESP32 + #define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0) + #endif + #endif #endif #define CIRCUITPY_INTERNAL_NVM_START_ADDR (0x9000) diff --git a/ports/espressif/mpconfigport.mk b/ports/espressif/mpconfigport.mk index 69b732e097..834bd3c248 100644 --- a/ports/espressif/mpconfigport.mk +++ b/ports/espressif/mpconfigport.mk @@ -36,6 +36,10 @@ CIRCUITPY_MODULE ?= none ifeq ($(IDF_TARGET),esp32) CIRCUITPY_BLEIO = 0 CIRCUITPY_BLEIO_HCI = 0 +CIRCUITPY_IMAGECAPTURE = 0 +CIRCUITPY_PARALLELDISPLAY = 0 +# Protomatter needs to support ESP32. +CIRCUITPY_RGBMATRIX = 0 CIRCUITPY_USB = 0 else ifeq ($(IDF_TARGET),esp32c3) diff --git a/ports/espressif/mphalport.c b/ports/espressif/mphalport.c index 39b080fba3..76d2c05cc3 100644 --- a/ports/espressif/mphalport.c +++ b/ports/espressif/mphalport.c @@ -28,7 +28,9 @@ #include "py/mphal.h" #include "supervisor/cpu.h" -#ifdef CONFIG_IDF_TARGET_ESP32C3 +#if defined(CONFIG_IDF_TARGET_ESP32) +#include "components/esp_rom/include/esp32/rom/ets_sys.h" +#elif defined(CONFIG_IDF_TARGET_ESP32C3) #include "components/esp_rom/include/esp32c3/rom/ets_sys.h" #elif defined(CONFIG_IDF_TARGET_ESP32S2) #include "components/esp_rom/include/esp32s2/rom/ets_sys.h" diff --git a/ports/espressif/peripherals/esp32/pins.c b/ports/espressif/peripherals/esp32/pins.c new file mode 100644 index 0000000000..9bf00a0e56 --- /dev/null +++ b/ports/espressif/peripherals/esp32/pins.c @@ -0,0 +1,69 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "peripherals/pins.h" + +const mcu_pin_obj_t pin_GPIO0 = PIN(0, ADC_UNIT_2, ADC_CHANNEL_1, TOUCH_PAD_NUM1); +const mcu_pin_obj_t pin_GPIO1 = PIN(1, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO2 = PIN(2, ADC_UNIT_2, ADC_CHANNEL_2, TOUCH_PAD_NUM2); +const mcu_pin_obj_t pin_GPIO3 = PIN(3, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO4 = PIN(4, ADC_UNIT_2, ADC_CHANNEL_0, TOUCH_PAD_NUM0); +const mcu_pin_obj_t pin_GPIO5 = PIN(5, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO6 = PIN(6, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO7 = PIN(7, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO8 = PIN(8, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO9 = PIN(9, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO10 = PIN(10, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO11 = PIN(11, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO12 = PIN(12, ADC_UNIT_2, ADC_CHANNEL_5, TOUCH_PAD_NUM5); +const mcu_pin_obj_t pin_GPIO13 = PIN(13, ADC_UNIT_2, ADC_CHANNEL_4, TOUCH_PAD_NUM4); +const mcu_pin_obj_t pin_GPIO14 = PIN(14, ADC_UNIT_2, ADC_CHANNEL_6, TOUCH_PAD_NUM6); +const mcu_pin_obj_t pin_GPIO15 = PIN(15, ADC_UNIT_2, ADC_CHANNEL_3, TOUCH_PAD_NUM3); +const mcu_pin_obj_t pin_GPIO16 = PIN(16, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO17 = PIN(17, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO18 = PIN(18, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO19 = PIN(19, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +// GPIO20 not exposed on some packages, but available in some modules +const mcu_pin_obj_t pin_GPIO20 = PIN(20, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO21 = PIN(21, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO22 = PIN(22, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO23 = PIN(23, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL); +// no GPIO24 +const mcu_pin_obj_t pin_GPIO25 = PIN(25, ADC_UNIT_2, ADC_CHANNEL_8, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO26 = PIN(26, ADC_UNIT_2, ADC_CHANNEL_9, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO27 = PIN(27, ADC_UNIT_2, ADC_CHANNEL_7, TOUCH_PAD_NUM7); +// no GPIO28 +// no GPIO29 +// no GPIO30 +// no GPIO31 +const mcu_pin_obj_t pin_GPIO32 = PIN(32, ADC_UNIT_1, ADC_CHANNEL_1, TOUCH_PAD_NUM9); +const mcu_pin_obj_t pin_GPIO33 = PIN(33, ADC_UNIT_1, ADC_CHANNEL_5, TOUCH_PAD_NUM8); +const mcu_pin_obj_t pin_GPIO34 = PIN(34, ADC_UNIT_1, ADC_CHANNEL_6, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO35 = PIN(35, ADC_UNIT_1, ADC_CHANNEL_7, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO36 = PIN(36, ADC_UNIT_1, ADC_CHANNEL_0, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO37 = PIN(37, ADC_UNIT_1, ADC_CHANNEL_1, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO38 = PIN(38, ADC_UNIT_1, ADC_CHANNEL_2, NO_TOUCH_CHANNEL); +const mcu_pin_obj_t pin_GPIO39 = PIN(39, ADC_UNIT_1, ADC_CHANNEL_3, NO_TOUCH_CHANNEL); diff --git a/ports/espressif/peripherals/esp32/pins.h b/ports/espressif/peripherals/esp32/pins.h new file mode 100644 index 0000000000..6ec7c624a0 --- /dev/null +++ b/ports/espressif/peripherals/esp32/pins.h @@ -0,0 +1,111 @@ +/* + * This file is part of the Micro Python project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2020 Scott Shawcroft for Adafruit Industries + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +// DO NOT include this file directly. +// Use shared-bindings/microcontroller/Pin.h instead. +// This ensures that all necessary includes are already included. + +#ifndef MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32_PINS_H +#define MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32_PINS_H + +#define GPIO0_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO0; +#define GPIO1_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO1; +#define GPIO2_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO2; +#define GPIO3_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO3; +#define GPIO4_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO4; +#define GPIO5_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO5; +#define GPIO6_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO6; +#define GPIO7_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO7; +#define GPIO8_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO8; +#define GPIO9_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO9; +#define GPIO10_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO10; +#define GPIO11_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO11; +#define GPIO12_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO12; +#define GPIO13_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO13; +#define GPIO14_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO14; +#define GPIO15_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO15; +#define GPIO16_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO16; +#define GPIO17_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO17; +#define GPIO18_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO18; +#define GPIO19_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO19; +// GPIO20 not exposed on some packages, but available in some modules +#define GPIO20_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO20; +#define GPIO21_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO21; +#define GPIO22_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO22; +#define GPIO23_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO23; +// no GPIO24 +#define GPIO25_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO25; +#define GPIO26_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO26; +#define GPIO27_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO27; +// no GPIO28 +// no GPIO29 +// no GPIO30 +// no GPIO31 +#define GPIO32_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO32; +#define GPIO33_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO33; +#define GPIO34_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO34; +#define GPIO35_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO35; +#define GPIO36_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO36; +#define GPIO37_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO37; +#define GPIO38_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO38; +#define GPIO39_EXISTS 1 +extern const mcu_pin_obj_t pin_GPIO39; + +#endif // MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32_PINS_H diff --git a/ports/espressif/peripherals/esp32c3/pins.h b/ports/espressif/peripherals/esp32c3/pins.h index 3cce2763c6..9f55768825 100644 --- a/ports/espressif/peripherals/esp32c3/pins.h +++ b/ports/espressif/peripherals/esp32c3/pins.h @@ -31,27 +31,49 @@ #ifndef MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32C3_PINS_H #define MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32C3_PINS_H +#define GPIO0_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO0; +#define GPIO1_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO1; +#define GPIO2_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO2; +#define GPIO3_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO3; +#define GPIO4_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO4; +#define GPIO5_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO5; +#define GPIO6_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO6; +#define GPIO7_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO7; +#define GPIO8_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO8; +#define GPIO9_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO9; +#define GPIO10_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO10; +#define GPIO11_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO11; +#define GPIO12_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO12; +#define GPIO13_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO13; +#define GPIO14_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO14; +#define GPIO15_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO15; +#define GPIO16_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO16; +#define GPIO17_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO17; +#define GPIO18_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO18; +#define GPIO19_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO19; +#define GPIO20_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO20; +#define GPIO21_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO21; #endif // MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32C3_PINS_H diff --git a/ports/espressif/peripherals/esp32s2/pins.h b/ports/espressif/peripherals/esp32s2/pins.h index b66db79861..cff6fea7cb 100644 --- a/ports/espressif/peripherals/esp32s2/pins.h +++ b/ports/espressif/peripherals/esp32s2/pins.h @@ -31,48 +31,91 @@ #ifndef MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32S2_PINS_H #define MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32S2_PINS_H +#define GPIO0_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO0; +#define GPIO1_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO1; +#define GPIO2_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO2; +#define GPIO3_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO3; +#define GPIO4_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO4; +#define GPIO5_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO5; +#define GPIO6_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO6; +#define GPIO7_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO7; +#define GPIO8_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO8; +#define GPIO9_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO9; +#define GPIO10_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO10; +#define GPIO11_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO11; +#define GPIO12_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO12; +#define GPIO13_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO13; +#define GPIO14_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO14; +#define GPIO15_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO15; +#define GPIO16_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO16; +#define GPIO17_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO17; +#define GPIO18_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO18; +#define GPIO19_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO19; +#define GPIO20_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO20; +#define GPIO21_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO21; +#define GPIO26_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO26; +#define GPIO27_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO27; +#define GPIO28_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO28; +#define GPIO29_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO29; +#define GPIO30_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO30; +#define GPIO31_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO31; +#define GPIO32_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO32; +#define GPIO33_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO33; +#define GPIO34_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO34; +#define GPIO35_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO35; +#define GPIO36_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO36; +#define GPIO37_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO37; +#define GPIO38_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO38; +#define GPIO39_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO39; +#define GPIO40_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO40; +#define GPIO41_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO41; +#define GPIO42_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO42; +#define GPIO43_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO43; +#define GPIO44_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO44; +#define GPIO45_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO45; +#define GPIO46_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO46; #endif // MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32S2_PINS_H diff --git a/ports/espressif/peripherals/esp32s3/pins.h b/ports/espressif/peripherals/esp32s3/pins.h index c2a932f572..7c0b8edd64 100644 --- a/ports/espressif/peripherals/esp32s3/pins.h +++ b/ports/espressif/peripherals/esp32s3/pins.h @@ -31,50 +31,95 @@ #ifndef MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32S3_PINS_H #define MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32S3_PINS_H +#define GPIO0_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO0; +#define GPIO1_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO1; +#define GPIO2_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO2; +#define GPIO3_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO3; +#define GPIO4_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO4; +#define GPIO5_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO5; +#define GPIO6_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO6; +#define GPIO7_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO7; +#define GPIO8_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO8; +#define GPIO9_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO9; +#define GPIO10_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO10; +#define GPIO11_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO11; +#define GPIO12_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO12; +#define GPIO13_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO13; +#define GPIO14_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO14; +#define GPIO15_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO15; +#define GPIO16_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO16; +#define GPIO17_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO17; +#define GPIO18_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO18; +#define GPIO19_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO19; +#define GPIO20_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO20; +#define GPIO21_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO21; +#define GPIO26_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO26; +#define GPIO27_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO27; +#define GPIO28_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO28; +#define GPIO29_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO29; +#define GPIO30_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO30; +#define GPIO31_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO31; +#define GPIO32_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO32; +#define GPIO33_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO33; +#define GPIO34_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO34; +#define GPIO35_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO35; +#define GPIO36_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO36; +#define GPIO37_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO37; +#define GPIO38_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO38; +#define GPIO39_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO39; +#define GPIO40_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO40; +#define GPIO41_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO41; +#define GPIO42_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO42; +#define GPIO43_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO43; +#define GPIO44_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO44; +#define GPIO45_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO45; +#define GPIO46_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO46; +#define GPIO47_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO47; +#define GPIO48_EXISTS 1 extern const mcu_pin_obj_t pin_GPIO48; #endif // MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32S3_PINS_H diff --git a/ports/espressif/peripherals/pins.h b/ports/espressif/peripherals/pins.h index 4958c46410..9edad560c8 100644 --- a/ports/espressif/peripherals/pins.h +++ b/ports/espressif/peripherals/pins.h @@ -65,7 +65,9 @@ extern const mp_obj_type_t mcu_pin_type; } // Choose based on chip -#ifdef CONFIG_IDF_TARGET_ESP32C3 +#if defined(CONFIG_IDF_TARGET_ESP32) +#include "esp32/pins.h" +#elif defined(CONFIG_IDF_TARGET_ESP32C3) #include "esp32c3/pins.h" #elif defined(CONFIG_IDF_TARGET_ESP32S2) #include "esp32s2/pins.h" diff --git a/ports/espressif/peripherals/touch.c b/ports/espressif/peripherals/touch.c index eeba49c683..e656bbddf1 100644 --- a/ports/espressif/peripherals/touch.c +++ b/ports/espressif/peripherals/touch.c @@ -48,9 +48,17 @@ void peripherals_touch_init(const touch_pad_t touchpad) { // touch_pad_config() must be done before touch_pad_fsm_start() the first time. // Otherwise the calibration is wrong and we get maximum raw values if there is // a trace of any significant length on the pin. + #if defined(CONFIG_IDF_TARGET_ESP32) + touch_pad_config(touchpad, 0); + #else touch_pad_config(touchpad); + #endif if (!touch_inited) { + #if defined(CONFIG_IDF_TARGET_ESP32) + touch_pad_sw_start(); + #else touch_pad_fsm_start(); + #endif touch_inited = true; } } diff --git a/ports/espressif/supervisor/port.c b/ports/espressif/supervisor/port.c index 7ecdd140a2..b90e9d5712 100644 --- a/ports/espressif/supervisor/port.c +++ b/ports/espressif/supervisor/port.c @@ -78,7 +78,10 @@ #include "cam.h" #endif +#ifndef CONFIG_IDF_TARGET_ESP32 #include "soc/cache_memory.h" +#endif + #include "soc/rtc_cntl_reg.h" #include "esp_debug_helpers.h" @@ -91,6 +94,10 @@ // Heap sizes for when there is no external RAM for CircuitPython to use // exclusively. +#ifdef CONFIG_IDF_TARGET_ESP32 +// TODO: Determine better: 520kB of internal RAM; similar to 512kB for ESP32-S3. +#define HEAP_SIZE (176 * 1024) +#endif #ifdef CONFIG_IDF_TARGET_ESP32S2 #define HEAP_SIZE (48 * 1024) #endif diff --git a/ports/espressif/tools/build_memory_info.py b/ports/espressif/tools/build_memory_info.py index b26c007741..4f5304a288 100644 --- a/ports/espressif/tools/build_memory_info.py +++ b/ports/espressif/tools/build_memory_info.py @@ -15,6 +15,15 @@ from elftools.elf.elffile import ELFFile print() internal_memory = { + "esp32": [ + # Name, Start, Length + ("RTC Fast Memory", (0x3FF8_0000, 0x400C_0000), 8 * 1024), + ("RTC Slow Memory", (0x5000_0000,), 8 * 1024), + # First 64kB of Internal SRAM 0 can be configured as cached, and starts at 0x4007_0000 + ("Internal SRAM 0", (0x4008_0000,), 128 * 1024), + ("Internal SRAM 1", (0x3FFE_0000, 0x400A_0000), 128 * 1024), + ("Internal SRAM 2", (0x3FFA_E000,), 200 * 1024), + ], "esp32s2": [ # Name, Start, Length ("RTC Fast Memory", (0x3FF9_E000, 0x4007_0000), 8 * 1024),