samd/samd_spiflash: Add SPI flash driver and configure it accordingly.
The SPI flash driver includes the block device for being used as a filesystem. It provides the same methods as the driver for the internal flash. Signed-off-by: robert-hh <robert@hammelrath.com>
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#define MICROPY_HW_MCU_NAME "SAMD21G18A"
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#define MICROPY_HW_XOSC32K (1)
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#define MICROPY_HW_SPIFLASH (1)
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#define MICROPY_HW_SPIFLASH_ID (2)
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#define MICROPY_HW_MCU_NAME "SAMD21G18A"
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#define MICROPY_HW_DFLL_USB_SYNC (1)
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#define MICROPY_HW_SPIFLASH (1)
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#define MICROPY_HW_SPIFLASH_ID (5)
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299
ports/samd/samd_spiflash.c
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299
ports/samd/samd_spiflash.c
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019-2020 Peter Hinch
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* Copyright (c) 2023 Robert Hammelrath
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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*/
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#include <stdint.h>
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#include "py/obj.h"
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#include "py/runtime.h"
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#include "py/mphal.h"
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#include "extmod/machine_spi.h"
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#include "extmod/vfs.h"
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#include "modmachine.h"
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#include "pin_af.h"
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#if MICROPY_HW_SPIFLASH
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#define _READ_INDEX (0)
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#define _PROGRAM_PAGE_INDEX (1)
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#define _SECTOR_ERASE_INDEX (2)
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const uint8_t _COMMANDS_24BIT[] = {0x03, 0x02, 0x20}; // READ, PROGRAM_PAGE, ERASE_4K
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const uint8_t _COMMANDS_32BIT[] = {0x13, 0x12, 0x21}; // READ, PROGRAM_PAGE, ERASE_4K
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#define COMMAND_JEDEC_ID (0x9F)
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#define COMMAND_READ_STATUS (0x05)
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#define COMMAND_WRITE_ENABLE (0x06)
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#define COMMAND_READ_SFDP (0x5A)
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#define PAGE_SIZE (256)
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#define SECTOR_SIZE (4096)
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typedef struct _spiflash_obj_t {
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mp_obj_base_t base;
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mp_obj_base_t *spi;
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mp_hal_pin_obj_t cs;
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bool addr_is_32bit;
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uint16_t pagesize;
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uint16_t sectorsize;
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const uint8_t *commands;
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uint32_t size;
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} spiflash_obj_t;
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extern const mp_obj_type_t samd_spiflash_type;
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// The SPIflash object is a singleton
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static spiflash_obj_t spiflash_obj = {
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{ &samd_spiflash_type }, NULL, 0, false, PAGE_SIZE, SECTOR_SIZE, NULL, 0
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};
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static void spi_transfer(mp_obj_base_t *spi, size_t len, const uint8_t *src, uint8_t *dest) {
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mp_machine_spi_p_t *spi_p = (mp_machine_spi_p_t *)MP_OBJ_TYPE_GET_SLOT(spi->type, protocol);
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spi_p->transfer(spi, len, src, dest);
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}
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static void wait(spiflash_obj_t *self) {
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uint8_t msg[2];
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uint32_t timeout = 100000;
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// each loop takes at least about 5us @ 120Mhz. So a timeout of
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// 100000 wait 500ms max. at 120Mhz. Sector erase lasts about
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// 100ms worst case, page write is < 1ms.
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do {
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msg[0] = COMMAND_READ_STATUS;
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mp_hal_pin_write(self->cs, 0);
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spi_transfer((mp_obj_base_t *)self->spi, 2, msg, msg);
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mp_hal_pin_write(self->cs, 1);
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} while (msg[1] != 0 && timeout-- > 0);
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}
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static void get_id(spiflash_obj_t *self, uint8_t id[3]) {
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uint8_t msg[1];
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msg[0] = COMMAND_JEDEC_ID;
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mp_hal_pin_write(self->cs, 0);
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spi_transfer(self->spi, 1, msg, NULL);
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spi_transfer(self->spi, 3, id, id);
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mp_hal_pin_write(self->cs, 1);
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}
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static void write_addr(spiflash_obj_t *self, uint8_t cmd, uint32_t addr) {
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uint8_t msg[5];
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uint8_t index = 1;
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msg[0] = cmd;
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if (self->addr_is_32bit) {
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msg[index++] = addr >> 24;
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}
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msg[index++] = (addr >> 16) & 0xff;
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msg[index++] = (addr >> 8) & 0xff;
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msg[index++] = addr & 0xff;
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mp_hal_pin_write(self->cs, 0);
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spi_transfer(self->spi, self->addr_is_32bit ? 5 : 4, msg, msg);
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}
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static void write_enable(spiflash_obj_t *self) {
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uint8_t msg[1];
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msg[0] = COMMAND_WRITE_ENABLE;
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mp_hal_pin_write(self->cs, 0);
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spi_transfer(self->spi, 1, msg, NULL);
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mp_hal_pin_write(self->cs, 1);
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}
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static void get_sfdp(spiflash_obj_t *self, uint32_t addr, uint8_t *buffer, int size) {
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uint8_t dummy[1];
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write_addr(self, COMMAND_READ_SFDP, addr);
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spi_transfer(self->spi, 1, dummy, NULL);
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spi_transfer(self->spi, size, buffer, buffer);
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mp_hal_pin_write(self->cs, 1);
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}
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STATIC mp_obj_t spiflash_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
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mp_arg_check_num(n_args, n_kw, 0, 0, false);
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// Set up the object
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spiflash_obj_t *self = &spiflash_obj;
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mp_obj_t spi_args[] = {
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MP_OBJ_NEW_SMALL_INT(MICROPY_HW_SPIFLASH_ID),
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MP_OBJ_NEW_SMALL_INT(24000000), // baudrate
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MP_OBJ_NEW_QSTR(MP_QSTR_mosi), MP_OBJ_NEW_QSTR(MP_QSTR_FLASH_MOSI),
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MP_OBJ_NEW_QSTR(MP_QSTR_miso), MP_OBJ_NEW_QSTR(MP_QSTR_FLASH_MISO),
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MP_OBJ_NEW_QSTR(MP_QSTR_sck), MP_OBJ_NEW_QSTR(MP_QSTR_FLASH_SCK),
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};
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self->spi = MP_OBJ_TYPE_GET_SLOT(&machine_spi_type, make_new)((mp_obj_t)&machine_spi_type, 2, 3, spi_args);
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mp_obj_t pin_args[] = {
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MP_OBJ_NEW_QSTR(MP_QSTR_FLASH_CS),
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MP_ROM_INT(1),
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};
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machine_pin_obj_t *cs = MP_OBJ_TYPE_GET_SLOT(&machine_pin_type, make_new)((mp_obj_t)&machine_pin_type, 2, 0, pin_args);
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self->cs = cs->pin_id;
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mp_hal_pin_write(self->cs, 1);
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wait(self);
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// Get the flash size from the device ID (default)
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uint8_t id[3];
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get_id(self, id);
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if (id[1] == 0x84 && id[2] == 1) { // Adesto
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self->size = 512 * 1024;
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} else if (id[1] == 0x1f && id[2] == 1) { // Atmel / Renesas
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self->size = 1024 * 1024;
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} else {
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self->size = 1 << id[2];
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}
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// Get the addr_is_32bit flag and the sector size
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uint8_t buffer[128];
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get_sfdp(self, 0, buffer, 16); // get the header
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int len = MIN(buffer[11] * 4, sizeof(buffer));
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if (len >= 29) {
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int addr = buffer[12] + (buffer[13] << 8) + (buffer[14] << 16);
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get_sfdp(self, addr, buffer, len); // Get the JEDEC mandatory table
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self->sectorsize = 1 << buffer[28];
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self->addr_is_32bit = ((buffer[2] >> 1) & 0x03) != 0;
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}
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self->commands = self->addr_is_32bit ? _COMMANDS_32BIT : _COMMANDS_24BIT;
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return self;
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}
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STATIC mp_obj_t spiflash_read(spiflash_obj_t *self, uint32_t addr, uint8_t *dest, uint32_t len) {
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if (len > 0) {
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write_addr(self, self->commands[_READ_INDEX], addr);
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spi_transfer(self->spi, len, dest, dest);
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mp_hal_pin_write(self->cs, 1);
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}
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return mp_const_none;
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}
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STATIC mp_obj_t spiflash_write(spiflash_obj_t *self, uint32_t addr, uint8_t *src, uint32_t len) {
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uint32_t length = len;
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uint32_t pos = 0;
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uint8_t *buf = src;
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while (pos < length) {
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uint16_t maxsize = self->pagesize - pos % self->pagesize;
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uint16_t size = (length - pos) > maxsize ? maxsize : length - pos;
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write_enable(self);
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write_addr(self, self->commands[_PROGRAM_PAGE_INDEX], addr);
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spi_transfer(self->spi, size, buf + pos, NULL);
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mp_hal_pin_write(self->cs, 1);
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wait(self);
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addr += size;
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pos += size;
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}
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return mp_const_none;
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}
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STATIC mp_obj_t spiflash_erase(spiflash_obj_t *self, uint32_t addr) {
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write_enable(self);
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write_addr(self, self->commands[_SECTOR_ERASE_INDEX], addr);
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mp_hal_pin_write(self->cs, 1);
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wait(self);
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return mp_const_none;
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}
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STATIC mp_obj_t spiflash_readblocks(size_t n_args, const mp_obj_t *args) {
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spiflash_obj_t *self = MP_OBJ_TO_PTR(args[0]);
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uint32_t offset = (mp_obj_get_int(args[1]) * self->sectorsize);
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mp_buffer_info_t bufinfo;
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mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_WRITE);
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if (n_args == 4) {
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offset += mp_obj_get_int(args[3]);
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}
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// Read data to flash (adf4 API)
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spiflash_read(self, offset, bufinfo.buf, bufinfo.len);
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(spiflash_readblocks_obj, 3, 4, spiflash_readblocks);
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STATIC mp_obj_t spiflash_writeblocks(size_t n_args, const mp_obj_t *args) {
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spiflash_obj_t *self = MP_OBJ_TO_PTR(args[0]);
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uint32_t offset = (mp_obj_get_int(args[1]) * self->sectorsize);
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mp_buffer_info_t bufinfo;
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mp_get_buffer_raise(args[2], &bufinfo, MP_BUFFER_READ);
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if (n_args == 3) {
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spiflash_erase(self, offset);
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// TODO check return value
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} else {
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offset += mp_obj_get_int(args[3]);
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}
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// Write data to flash (adf4 API)
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spiflash_write(self, offset, bufinfo.buf, bufinfo.len);
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// TODO check return value
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return mp_const_none;
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(spiflash_writeblocks_obj, 3, 4, spiflash_writeblocks);
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STATIC mp_obj_t spiflash_ioctl(mp_obj_t self_in, mp_obj_t cmd_in, mp_obj_t arg_in) {
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spiflash_obj_t *self = MP_OBJ_TO_PTR(self_in);
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mp_int_t cmd = mp_obj_get_int(cmd_in);
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switch (cmd) {
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case MP_BLOCKDEV_IOCTL_INIT:
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return MP_OBJ_NEW_SMALL_INT(0);
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case MP_BLOCKDEV_IOCTL_DEINIT:
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return MP_OBJ_NEW_SMALL_INT(0);
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case MP_BLOCKDEV_IOCTL_SYNC:
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return MP_OBJ_NEW_SMALL_INT(0);
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case MP_BLOCKDEV_IOCTL_BLOCK_COUNT:
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return MP_OBJ_NEW_SMALL_INT(self->size / self->sectorsize);
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case MP_BLOCKDEV_IOCTL_BLOCK_SIZE:
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return MP_OBJ_NEW_SMALL_INT(self->sectorsize);
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case MP_BLOCKDEV_IOCTL_BLOCK_ERASE: {
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spiflash_erase(self, mp_obj_get_int(arg_in) * self->sectorsize);
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// TODO check return value
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return MP_OBJ_NEW_SMALL_INT(0);
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}
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default:
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return mp_const_none;
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}
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}
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STATIC MP_DEFINE_CONST_FUN_OBJ_3(spiflash_ioctl_obj, spiflash_ioctl);
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STATIC const mp_rom_map_elem_t spiflash_locals_dict_table[] = {
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{ MP_ROM_QSTR(MP_QSTR_readblocks), MP_ROM_PTR(&spiflash_readblocks_obj) },
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{ MP_ROM_QSTR(MP_QSTR_writeblocks), MP_ROM_PTR(&spiflash_writeblocks_obj) },
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{ MP_ROM_QSTR(MP_QSTR_ioctl), MP_ROM_PTR(&spiflash_ioctl_obj) },
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};
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STATIC MP_DEFINE_CONST_DICT(spiflash_locals_dict, spiflash_locals_dict_table);
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MP_DEFINE_CONST_OBJ_TYPE(
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samd_spiflash_type,
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MP_QSTR_Flash,
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MP_TYPE_FLAG_NONE,
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make_new, spiflash_make_new,
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locals_dict, &spiflash_locals_dict
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);
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#endif // #if MICROPY_HW_SPIFLASH
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