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nrf: Add a nrfx submodule and prepare for using the new drivers

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This commit is contained in:
arturo182 2018-06-20 20:43:59 +02:00
parent 7cd34f2a94
commit 5509f394dc
20 changed files with 63 additions and 142 deletions
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3
.gitmodules vendored
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@ -70,3 +70,6 @@
[submodule "ports/atmel-samd/peripherals"]
path = ports/atmel-samd/peripherals
url = https://github.com/adafruit/samd-peripherals.git
[submodule "ports/nrf/nrfx"]
path = ports/nrf/nrfx
url = https://github.com/NordicSemiconductor/nrfx.git

6
ports/nrf/Makefile
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@ -42,8 +42,6 @@ FATFS_DIR = lib/oofatfs
CROSS_COMPILE = arm-none-eabi-
MCU_VARIANT_UPPER = $(shell echo $(MCU_VARIANT) | tr '[:lower:]' '[:upper:]')
INC += -I.
INC += -I../..
INC += -I$(BUILD)
@ -63,7 +61,6 @@ INC += -I../../lib/mp-readline
INC += -I./drivers/bluetooth
INC += -I./drivers
NRF_DEFINES += -D$(MCU_VARIANT_UPPER)
NRF_DEFINES += -DCONFIG_GPIO_AS_PINRESET
CFLAGS += -mthumb -mabi=aapcs -fsingle-precision-constant -Wdouble-promotion
@ -73,6 +70,7 @@ CFLAGS += -fno-strict-aliasing
CFLAGS += -fstack-usage
CFLAGS += -fdata-sections -ffunction-sections
CFLAGS += -DNRF5_HAL_H='<$(MCU_VARIANT)_hal.h>'
CFLAGS += -D__START=main
LDFLAGS = $(CFLAGS)
LDFLAGS += -Xlinker -Map=$(@:.elf=.map)
@ -125,7 +123,7 @@ SRC_C += \
drivers/bluetooth/ble_drv.c \
drivers/bluetooth/ble_uart.c \
boards/$(BOARD)/board.c \
device/$(MCU_VARIANT)/system_$(MCU_SUB_VARIANT).c \
nrfx/mdk/system_$(MCU_SUB_VARIANT).c \
device/$(MCU_VARIANT)/startup_$(MCU_SUB_VARIANT).c \
lib/oofatfs/ff.c \
lib/oofatfs/option/ccsbcs.c \

2
ports/nrf/boards/feather52832/mpconfigboard.mk
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@ -1,6 +1,6 @@
MCU_SERIES = m4
MCU_VARIANT = nrf52
MCU_SUB_VARIANT = nrf52832
MCU_SUB_VARIANT = nrf52
SOFTDEV_VERSION ?= 2.0.1
LD_FILE = boards/feather52832/custom_nrf52832_dfu_app_$(SOFTDEV_VERSION).ld

2
ports/nrf/boards/pca10040/mpconfigboard.mk
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@ -1,6 +1,6 @@
MCU_SERIES = m4
MCU_VARIANT = nrf52
MCU_SUB_VARIANT = nrf52832
MCU_SUB_VARIANT = nrf52
LD_FILE = boards/nrf52832_512k_64k.ld
NRF_DEFINES += -DNRF52832_XXAA

2
ports/nrf/boards/pca10040/mpconfigboard_s132.mk
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@ -1,6 +1,6 @@
MCU_SERIES = m4
MCU_VARIANT = nrf52
MCU_SUB_VARIANT = nrf52832
MCU_SUB_VARIANT = nrf52
SOFTDEV_VERSION = 5.0.0
LD_FILE = boards/nrf52832_512k_64k_s132_$(SOFTDEV_VERSION).ld

0
ports/nrf/device/nrf52/startup_nrf52832.c → ports/nrf/device/nrf52/startup_nrf52.c
View File

2
ports/nrf/drivers/bluetooth/ble_drv.c
View File

@ -30,6 +30,8 @@
#include <string.h>
#include <stdbool.h>
#define NRF52 // Needed for SD132 v2
#include "py/runtime.h"
#include "ble_drv.h"
#include "mpconfigport.h"

3
ports/nrf/hal/hal_gpio.c
View File

@ -94,7 +94,7 @@ void GPIOTE_IRQHandler(void) {
GPIOTE_BASE->EVENTS_IN[3] = 0;
m_callback(HAL_GPIO_EVENT_CHANNEL_3);
}
#if NRF52
if (GPIOTE_BASE->EVENTS_IN[4]) {
GPIOTE_BASE->EVENTS_IN[4] = 0;
m_callback(HAL_GPIO_EVENT_CHANNEL_4);
@ -111,7 +111,6 @@ void GPIOTE_IRQHandler(void) {
GPIOTE_BASE->EVENTS_IN[7] = 0;
m_callback(HAL_GPIO_EVENT_CHANNEL_7);
}
#endif
}
#endif // if 0

14
ports/nrf/hal/hal_gpio.h
View File

@ -29,18 +29,12 @@
#include "nrf.h"
#if NRF51
#define POINTERS (const uint32_t[]){NRF_GPIO_BASE}
#ifdef NRF52832_XXAA
#define POINTERS (const uint32_t[]){NRF_P0_BASE}
#endif
#if NRF52
#ifdef NRF52832_XXAA
#define POINTERS (const uint32_t[]){NRF_P0_BASE}
#endif
#ifdef NRF52840_XXAA
#ifdef NRF52840_XXAA
#define POINTERS (const uint32_t[]){NRF_P0_BASE, NRF_P1_BASE}
#endif
#endif
#define GPIO_BASE(x) ((NRF_GPIO_Type *)POINTERS[x])
@ -133,12 +127,10 @@ typedef enum {
HAL_GPIO_EVENT_CHANNEL_1,
HAL_GPIO_EVENT_CHANNEL_2,
HAL_GPIO_EVENT_CHANNEL_3,
#if NRF52
HAL_GPIO_EVENT_CHANNEL_4,
HAL_GPIO_EVENT_CHANNEL_5,
HAL_GPIO_EVENT_CHANNEL_6,
HAL_GPIO_EVENT_CHANNEL_7
#endif
} hal_gpio_event_channel_t;
typedef struct {

7
ports/nrf/hal/hal_irq.h
View File

@ -37,11 +37,8 @@
#define BLUETOOTH_STACK_ENABLED() (ble_drv_stack_enabled())
#ifdef NRF51
#include "nrf_soc.h"
#elif defined(NRF52)
#include "nrf_nvic.h"
#endif
#define NRF52
#include "nrf_nvic.h"
#endif // BLUETOOTH_SD
static inline void hal_irq_clear(uint32_t irq_num) {

10
ports/nrf/hal/hal_pwm.h
View File

@ -31,10 +31,6 @@
#include "nrf.h"
// TODO: nrf51 series need Soft PWM. Not part of HAL.
#if NRF52
#define PWM0 ((NRF_PWM_Type *)NRF_PWM0_BASE)
#define PWM0_IRQ_NUM PWM1_IRQn
#define PWM1 ((NRF_PWM_Type *)NRF_PWM1_BASE)
@ -42,15 +38,11 @@
#define PWM2 ((NRF_PWM_Type *)NRF_PWM2_BASE)
#define PWM2_IRQ_NUM PWM2_IRQn
#if 0 // TODO: nrf52840
#ifdef NRF52840_XXAA
#define PWM3 ((NRF_PWM_Type *)NRF_PWM3_BASE)
#define PWM3_IRQ_NUM PWM3_IRQn
#endif
#else
#error "Device not supported."
#endif
/**
* @brief PWM frequency type definition
*/

4
ports/nrf/hal/hal_rtc.c
View File

@ -110,14 +110,10 @@ void RTC1_IRQHandler(void)
common_irq_handler(1);
}
#if NRF52
void RTC2_IRQHandler(void)
{
common_irq_handler(2);
}
#endif // NRF52
#endif // HAL_RTC_MODULE_ENABLED

13
ports/nrf/hal/hal_rtc.h
View File

@ -29,21 +29,12 @@
#include "nrf.h"
#if NRF51
#define RTC_BASE_POINTERS (const uint32_t[]){NRF_RTC0_BASE, \
NRF_RTC1_BASE}
#define RTC_IRQ_VALUES (const uint32_t[]){RTC0_IRQn, \
RTC1_IRQn}
#endif
#if NRF52
#define RTC_BASE_POINTERS (const uint32_t[]){NRF_RTC0_BASE, \
#define RTC_BASE_POINTERS (const uint32_t[]){NRF_RTC0_BASE, \
NRF_RTC1_BASE, \
NRF_RTC2_BASE}
#define RTC_IRQ_VALUES (const uint32_t[]){RTC0_IRQn, \
#define RTC_IRQ_VALUES (const uint32_t[]){RTC0_IRQn, \
RTC1_IRQn, \
RTC2_IRQn}
#endif
#define RTC_BASE(x) ((NRF_RTC_Type *)RTC_BASE_POINTERS[x])
#define RTC_IRQ_NUM(x) (RTC_IRQ_VALUES[x])

13
ports/nrf/hal/hal_spi.h
View File

@ -30,22 +30,16 @@
#include <stdbool.h>
#include "nrf.h"
#if NRF51
#define SPI_BASE_POINTERS (const uint32_t[]){NRF_SPI0_BASE, NRF_SPI1_BASE}
#define SPI_IRQ_VALUES (const uint32_t[]){SPI0_TWI0_IRQn, SPI1_TWI1_IRQn}
#endif
#if NRF52
#ifdef NRF52832_XXAA
#ifdef NRF52832_XXAA
#define SPI_BASE_POINTERS (const uint32_t[]){NRF_SPI0_BASE, \
NRF_SPI1_BASE, \
NRF_SPI2_BASE}
#define SPI_IRQ_VALUES (const uint32_t[]){SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, \
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, \
SPIM2_SPIS2_SPI2_IRQn}
#endif
#endif
#ifdef NRF52840_XXAA
#ifdef NRF52840_XXAA
#define SPI_BASE_POINTERS (const uint32_t[]){NRF_SPI0_BASE, \
NRF_SPI1_BASE, \
NRF_SPI2_BASE, \
@ -54,7 +48,6 @@
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, \
SPIM2_SPIS2_SPI2_IRQn, \
SPIM3_IRQn}
#endif
#endif
#define SPI_BASE(x) ((NRF_SPI_Type *)SPI_BASE_POINTERS[x])

4
ports/nrf/hal/hal_timer.c
View File

@ -88,8 +88,6 @@ void TIMER2_IRQHandler(void) {
common_irq_handler(2);
}
#if NRF52
void TIMER3_IRQHandler(void) {
common_irq_handler(3);
}
@ -98,6 +96,4 @@ void TIMER4_IRQHandler(void) {
common_irq_handler(4);
}
#endif
#endif // HAL_TIMER_MODULE_ENABLED

15
ports/nrf/hal/hal_timer.h
View File

@ -29,27 +29,16 @@
#include "nrf.h"
#if NRF51
#define TIMER_BASE_POINTERS (const uint32_t[]){NRF_TIMER0_BASE, \
NRF_TIMER1_BASE, \
NRF_TIMER2_BASE}
#define TIMER_IRQ_VALUES (const uint32_t[]){TIMER0_IRQn, \
TIMER1_IRQn, \
TIMER2_IRQn}
#endif
#if NRF52
#define TIMER_BASE_POINTERS (const uint32_t[]){NRF_TIMER0_BASE, \
#define TIMER_BASE_POINTERS (const uint32_t[]){NRF_TIMER0_BASE, \
NRF_TIMER1_BASE, \
NRF_TIMER1_BASE, \
NRF_TIMER1_BASE, \
NRF_TIMER2_BASE}
#define TIMER_IRQ_VALUES (const uint32_t[]){TIMER0_IRQn, \
#define TIMER_IRQ_VALUES (const uint32_t[]){TIMER0_IRQn, \
TIMER1_IRQn, \
TIMER2_IRQn, \
TIMER3_IRQn, \
TIMER4_IRQn}
#endif
#define TIMER_BASE(x) ((NRF_TIMER_Type *)TIMER_BASE_POINTERS[x])
#define TIMER_IRQ_NUM(x) (TIMER_IRQ_VALUES[x])

13
ports/nrf/hal/hal_twi.h
View File

@ -32,20 +32,9 @@
#define TWI_BASE_POINTERS (const uint32_t[]){NRF_TWI0_BASE, NRF_TWI1_BASE}
#define TWI_BASE(x) ((NRF_TWI_Type *)TWI_BASE_POINTERS[x])
#if NRF51
#define TWI_IRQ_VALUES (const uint32_t[]){SPI0_TWI0_IRQn, SPI1_TWI1_IRQn}
#elif NRF52
#define TWI_IRQ_VALUES (const uint32_t[]){SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, \
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn}
#endif
#if NRF52
/**
* @brief TWIM Configuration Structure definition
*/
@ -58,8 +47,6 @@ typedef struct {
typedef struct {
} hal_twis_init_t;
#endif
/**
* @brief TWI clock frequency type definition
*/

23
ports/nrf/hal/hal_uart.h
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@ -32,25 +32,15 @@
#include "nrf.h"
#if NRF51
#define UART_HWCONTROL_NONE ((uint32_t)UART_CONFIG_HWFC_Disabled << UART_CONFIG_HWFC_Pos)
#define UART_HWCONTROL_RTS_CTS ((uint32_t)(UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos)
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
#define UART_HWCONTROL_NONE ((uint32_t)UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos)
#define UART_HWCONTROL_RTS_CTS ((uint32_t)(UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos)
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
(((CONTROL) == UART_HWCONTROL_NONE) || \
((CONTROL) == UART_HWCONTROL_RTS_CTS))
#define UART_BASE_POINTERS (const uint32_t[]){NRF_UART0_BASE}
#define UART_IRQ_VALUES (const uint32_t[]){UART0_IRQn}
#elif NRF52
#define UART_HWCONTROL_NONE ((uint32_t)UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos)
#define UART_HWCONTROL_RTS_CTS ((uint32_t)(UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos)
#define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
(((CONTROL) == UART_HWCONTROL_NONE) || \
((CONTROL) == UART_HWCONTROL_RTS_CTS))
#ifdef HAL_UART_MODULE_ENABLED
#ifdef HAL_UART_MODULE_ENABLED
#define UART_BASE_POINTERS (const uint32_t[]){NRF_UART0_BASE}
#define UART_IRQ_VALUES (const uint32_t[]){UARTE0_UART0_IRQn}
#else // HAL_UARTE_MODULE_ENABLED
#else // HAL_UARTE_MODULE_ENABLED
#ifdef NRF52832_XXAA
#define UART_BASE_POINTERS (const uint32_t[]){NRF_UARTE0_BASE}
#define UART_IRQ_VALUES (const uint32_t[]){UARTE0_UART0_IRQn}
@ -60,9 +50,6 @@
#define UART_IRQ_VALUES (const uint32_t[]){UARTE0_UART0_IRQn, \
UARTE1_IRQn}
#endif // HAL_UARTE_MODULE_ENABLED
#endif
#else
#error "Device not supported."
#endif
#define UART_BASE(x) ((NRF_UART_Type *)UART_BASE_POINTERS[x])

1
ports/nrf/nrfx Submodule

@ -0,0 +1 @@
Subproject commit 293f553ed9551c1fdfd05eac48e75bbdeb4e7290

2
ports/nrf/supervisor/port.c
View File

@ -67,7 +67,6 @@ void reset_port(void) {
void HardFault_Handler(void)
{
#if NRF52
// static volatile uint32_t reg;
// static volatile uint32_t reg2;
// static volatile uint32_t bfar;
@ -80,6 +79,5 @@ void HardFault_Handler(void)
// (void)reg2;
// (void)bfar;
// }
#endif
}