Merge pull request #6685 from tannewt/esp32_ww

Enable Web Workflow on Feather ESP32 V2
This commit is contained in:
Dan Halbert 2022-08-02 21:30:23 -04:00 committed by GitHub
commit 524cc5e274
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GPG Key ID: 4AEE18F83AFDEB23
20 changed files with 696 additions and 27 deletions

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@ -958,10 +958,6 @@ msgstr ""
msgid "Failed to connect: timeout"
msgstr ""
#: ports/espressif/common-hal/wifi/__init__.c
msgid "Failed to init wifi"
msgstr ""
#: shared-module/audiomp3/MP3Decoder.c
msgid "Failed to parse MP3 file"
msgstr ""
@ -1548,7 +1544,7 @@ msgstr ""
msgid "Only IPv4 addresses supported"
msgstr ""
#: ports/espressif/common-hal/socketpool/SocketPool.c
#: ports/espressif/common-hal/socketpool/Socket.c
msgid "Only IPv4 sockets supported"
msgstr ""
@ -1616,7 +1612,7 @@ msgstr ""
msgid "Out of memory"
msgstr ""
#: ports/espressif/common-hal/socketpool/SocketPool.c
#: ports/espressif/common-hal/socketpool/Socket.c
msgid "Out of sockets"
msgstr ""
@ -3759,11 +3755,20 @@ msgstr ""
msgid "pow() with 3 arguments requires integers"
msgstr ""
#: ports/espressif/boards/adafruit_qtpy_esp32_pico/mpconfigboard.h
msgid "pressing BOOT button at start up.\n"
msgstr ""
#: ports/espressif/boards/adafruit_feather_esp32_v2/mpconfigboard.h
msgid "pressing SW38 button at start up.\n"
msgstr ""
#: ports/espressif/boards/hardkernel_odroid_go/mpconfigboard.h
msgid "pressing VOLUME button at start up.\n"
msgstr ""
#: ports/espressif/boards/adafruit_qtpy_esp32c3/mpconfigboard.h
#: ports/espressif/boards/beetle-esp32-c3/mpconfigboard.h
#: ports/espressif/boards/lolin_c3_mini/mpconfigboard.h
#: supervisor/shared/safe_mode.c
msgid "pressing boot button at start up.\n"

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@ -33,8 +33,6 @@
#include "shared-module/displayio/mipi_constants.h"
#include "supervisor/shared/board.h"
displayio_fourwire_obj_t board_display_obj;
#define DELAY 0x80
uint8_t display_init_sequence[] = {

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@ -98,6 +98,8 @@ INC += \
-isystem esp-idf/components/bt/host/nimble/port/include \
-isystem esp-idf/components/driver/include \
-isystem esp-idf/components/driver/$(IDF_TARGET)/include \
-isystem esp-idf/components/efuse/include \
-isystem esp-idf/components/efuse/$(IDF_TARGET)/include \
-isystem esp-idf/components/$(IDF_TARGET)/include \
-isystem esp-idf/components/esp_adc_cal/include \
-isystem esp-idf/components/esp_common/include \

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@ -47,3 +47,19 @@ void reset_board(void) {
void board_deinit(void) {
}
bool espressif_board_reset_pin_number(gpio_num_t pin_number) {
// Pull LED down on reset rather than the default up
if (pin_number == 13) {
gpio_config_t cfg = {
.pin_bit_mask = BIT64(pin_number),
.mode = GPIO_MODE_DISABLE,
.pull_up_en = false,
.pull_down_en = true,
.intr_type = GPIO_INTR_DISABLE,
};
gpio_config(&cfg);
return true;
}
return false;
}

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@ -10,9 +10,6 @@ LONGINT_IMPL = MPZ
# so increase it to 32.
CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
CIRCUITPY_STATUS_BAR = 0
CIRCUITPY_WEB_WORKFLOW = 0
CIRCUITPY_ESP_FLASH_MODE = dio
CIRCUITPY_ESP_FLASH_FREQ = 40m
CIRCUITPY_ESP_FLASH_SIZE = 8MB

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@ -0,0 +1,52 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "supervisor/board.h"
#include "mpconfigboard.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "components/driver/include/driver/gpio.h"
#include "components/hal/include/hal/gpio_hal.h"
#include "common-hal/microcontroller/Pin.h"
void board_init(void) {
reset_board();
}
bool board_requests_safe_mode(void) {
return false;
}
void reset_board(void) {
// Turn on NeoPixel power by default.
gpio_set_direction(8, GPIO_MODE_DEF_OUTPUT);
gpio_set_level(8, true);
}
void board_deinit(void) {
// Turn off NeoPixel
gpio_set_direction(8, GPIO_MODE_DEF_OUTPUT);
gpio_set_level(8, false);
}

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@ -0,0 +1,49 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2022 Dan Halbert for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define MICROPY_HW_BOARD_NAME "Adafruit QT Py ESP32 PICO"
#define MICROPY_HW_MCU_NAME "ESP32"
#define MICROPY_HW_NEOPIXEL (&pin_GPIO5)
#define CIRCUITPY_BOARD_I2C (2)
#define CIRCUITPY_BOARD_I2C_PIN {{.scl = &pin_GPIO33, .sda = &pin_GPIO4}, \
{.scl = &pin_GPIO19, .sda = &pin_GPIO22}}
#define CIRCUITPY_BOARD_SPI (1)
#define CIRCUITPY_BOARD_SPI_PIN {{.clock = &pin_GPIO14, .mosi = &pin_GPIO13, .miso = &pin_GPIO12}}
#define CIRCUITPY_BOARD_UART (1)
#define CIRCUITPY_BOARD_UART_PIN {{.tx = &pin_GPIO32, .rx = &pin_GPIO7}}
#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
// Explanation of how a user got into safe mode
#define BOARD_USER_SAFE_MODE_ACTION translate("pressing BOOT button at start up.\n")
// UART pins attached to the USB-serial converter chip
#define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO1)
#define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO3)

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@ -0,0 +1,15 @@
CIRCUITPY_CREATOR_ID = 0x0000239A
CIRCUITPY_CREATION_ID = 0x00320003
IDF_TARGET = esp32
INTERNAL_FLASH_FILESYSTEM = 1
LONGINT_IMPL = MPZ
# The default queue depth of 16 overflows on release builds,
# so increase it to 32.
CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
CIRCUITPY_ESP_FLASH_MODE = dio
CIRCUITPY_ESP_FLASH_FREQ = 40m
CIRCUITPY_ESP_FLASH_SIZE = 8MB

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@ -0,0 +1,63 @@
#include "shared-bindings/board/__init__.h"
CIRCUITPY_BOARD_BUS_SINGLETON(stemma_i2c, i2c, 1)
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
{ MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_BOOT0), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO26) },
{ MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO26) },
{ MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO25) },
{ MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO25) },
{ MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO27) },
{ MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO27) },
{ MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO15) },
{ MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO15) },
{ MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO4) },
{ MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO4) },
{ MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO4) },
{ MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO33) },
{ MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO33) },
{ MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO33) },
{ MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO32) },
{ MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO32) },
{ MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO32) },
{ MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO7) },
{ MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO7) },
{ MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO7) },
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO13) },
{ MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO13) },
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO14) },
{ MP_ROM_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO14) },
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO12) },
{ MP_ROM_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_GPIO12) },
{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL_POWER), MP_ROM_PTR(&pin_GPIO8) },
{ MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO5) },
{ MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_GPIO19) },
{ MP_ROM_QSTR(MP_QSTR_D40), MP_ROM_PTR(&pin_GPIO19) },
{ MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_GPIO22) },
{ MP_ROM_QSTR(MP_QSTR_D41), MP_ROM_PTR(&pin_GPIO22) },
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_STEMMA_I2C), MP_ROM_PTR(&board_stemma_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
};
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

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@ -0,0 +1,52 @@
#
# Partition Table
#
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
# end of Partition Table
#
# SPI RAM config
#
# CONFIG_SPIRAM_TYPE_AUTO is not set
CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
CONFIG_SPIRAM_SIZE=2097152
CONFIG_SPIRAM_SPEED_40M=y
CONFIG_SPIRAM=y
CONFIG_SPIRAM_BOOT_INIT=y
CONFIG_SPIRAM_IGNORE_NOTFOUND=y
CONFIG_SPIRAM_USE_MEMMAP=y
# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
# CONFIG_SPIRAM_USE_MALLOC is not set
CONFIG_SPIRAM_MEMTEST=y
# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set
CONFIG_SPIRAM_CACHE_WORKAROUND=y
#
# SPI RAM config
#
CONFIG_ESP32_SPIRAM_SUPPORT=y
# CONFIG_SPIRAM_TYPE_AUTO is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
### # Uncomment to send log output to TX/RX pins on Feather ESP32V2
### #
### # ESP System Settings
### #
### CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
### CONFIG_ESP_CONSOLE_UART_CUSTOM=y
### # CONFIG_ESP_CONSOLE_NONE is not set
### CONFIG_ESP_CONSOLE_UART=y
### CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
### CONFIG_ESP_CONSOLE_UART_NUM=0
### CONFIG_ESP_CONSOLE_UART_TX_GPIO=8
### CONFIG_ESP_CONSOLE_UART_RX_GPIO=7
### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
### # end of ESP System Settings

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@ -0,0 +1,138 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2020 Scott Shawcroft for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "supervisor/board.h"
#include "mpconfigboard.h"
#include "shared-bindings/busio/SPI.h"
#include "shared-bindings/displayio/FourWire.h"
#include "shared-module/displayio/__init__.h"
#include "shared-module/displayio/mipi_constants.h"
#include "common-hal/microcontroller/Pin.h"
#define DELAY 0x80
// ILI9341 init sequence from:
// https://github.com/hardkernel/ODROID-GO-MicroPython/blob/loboris/odroid_go/utils/lcd/lcd.py#L55
uint8_t display_init_sequence[] = {
0x0f, 3, 0x03, 0x80, 0x02, // RDDSDR
0xcf, 3, 0x00, 0xcf, 0x30, // PWCRTLB
0xed, 4, 0x64, 0x03, 0x12, 0x81, // PWRONCTRL
0xe8, 3, 0x85, 0x00, 0x78, // DTCTRLA
0xcb, 5, 0x39, 0x2c, 0x00, 0x34, 0x02, // PWCTRLA
0xf7, 1, 0x20, // PRCTRL
0xea, 2, 0x00, 0x00, // DTCTRLB
0xc0, 1, 0x1b, // PWCTRL1
0xc1, 1, 0x12, // PWCTRL2
0xc5, 2, 0x3e, 0x3c, // VMCTRL1
0xc7, 1, 0x91, // VMCTRL2
0x36, 1, 0xa8, // MADCTL
0x3a, 1, 0x55, // PIXSET
0xb1, 2, 0x00, 0x1b, // FRMCTR1
0xb6, 3, 0x0a, 0xa2, 0x27, // DISCTRL
0xf6, 2, 0x01, 0x30, // INTFACE
0xf2, 1, 0x00, // ENA3G
0x26, 1, 0x01, // GAMSET
0xe0, 15, 0x0f, 0x31, 0x2b, 0x0c, 0x0e, 0x08, 0x4e, 0xf1, 0x37, 0x07, 0x10, 0x03, 0x0e, 0x09, 0x00, // PGAMCTRL
0xe1, 15, 0x00, 0x0e, 0x14, 0x03, 0x11, 0x07, 0x31, 0xc1, 0x48, 0x08, 0x0f, 0x0c, 0x31, 0x36, 0x0f, // NGAMCTRL
0x11, 0 | DELAY, 10, // SLPOUT
0x29, 0 | DELAY, 100, // DISPON
};
void board_init(void) {
busio_spi_obj_t *spi = &displays[0].fourwire_bus.inline_bus;
common_hal_busio_spi_construct(spi, &pin_GPIO18, &pin_GPIO23, NULL, false);
common_hal_busio_spi_never_reset(spi);
displayio_fourwire_obj_t *bus = &displays[0].fourwire_bus;
bus->base.type = &displayio_fourwire_type;
common_hal_displayio_fourwire_construct(bus,
spi,
&pin_GPIO21, // TFT_DC Command or data
&pin_GPIO5, // TFT_CS Chip select
NULL, // TFT_RST Reset
40000000, // Baudrate
0, // Polarity
0); // Phase
displayio_display_obj_t *display = &displays[0].display;
display->base.type = &displayio_display_type;
common_hal_displayio_display_construct(display,
bus,
320, // Width (after rotation)
240, // Height (after rotation)
0, // column start
0, // row start
0, // rotation
16, // Color depth
false, // grayscale
false, // pixels in byte share row. only used for depth < 8
1, // bytes per cell. Only valid for depths < 8
false, // reverse_pixels_in_byte. Only valid for depths < 8
true, // reverse_pixels_in_word
MIPI_COMMAND_SET_COLUMN_ADDRESS, // Set column command
MIPI_COMMAND_SET_PAGE_ADDRESS, // Set row command
MIPI_COMMAND_WRITE_MEMORY_START, // Write memory command
display_init_sequence,
sizeof(display_init_sequence),
&pin_GPIO14, // backlight pin
NO_BRIGHTNESS_COMMAND,
1.0f, // brightness (ignored)
true, // auto_brightness
false, // single_byte_bounds
false, // data_as_commands
true, // auto_refresh
60, // native_frames_per_second
true, // backlight_on_high
false, // SH1107_addressing
50000); // backlight pwm frequency
}
bool board_requests_safe_mode(void) {
return false;
}
void reset_board(void) {
}
void board_deinit(void) {
}
bool espressif_board_reset_pin_number(gpio_num_t pin_number) {
// Pull LED down on reset rather than the default up
if (pin_number == 2) {
gpio_config_t cfg = {
.pin_bit_mask = BIT64(pin_number),
.mode = GPIO_MODE_DISABLE,
.pull_up_en = false,
.pull_down_en = true,
.intr_type = GPIO_INTR_DISABLE,
};
gpio_config(&cfg);
return true;
}
return false;
}

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@ -0,0 +1,42 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2022 Dan Halbert for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#define MICROPY_HW_BOARD_NAME "Hardkernel Odroid Go"
#define MICROPY_HW_MCU_NAME "ESP32"
#define MICROPY_HW_LED_STATUS (&pin_GPIO2)
#define CIRCUITPY_BOARD_SPI (1)
#define CIRCUITPY_BOARD_SPI_PIN {{.clock = &pin_GPIO18, .mosi = &pin_GPIO23, .miso = &pin_GPIO19}}
#define CIRCUITPY_BOOT_BUTTON (&pin_GPIO0)
// Explanation of how a user got into safe mode
#define BOARD_USER_SAFE_MODE_ACTION translate("pressing VOLUME button at start up.\n")
// UART pins attached to the USB-serial converter chip
#define CIRCUITPY_CONSOLE_UART_TX (&pin_GPIO1)
#define CIRCUITPY_CONSOLE_UART_RX (&pin_GPIO3)

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@ -0,0 +1,15 @@
CIRCUITPY_CREATOR_ID = 0x0D10D000
CIRCUITPY_CREATION_ID = 0x00320060
IDF_TARGET = esp32
INTERNAL_FLASH_FILESYSTEM = 1
LONGINT_IMPL = MPZ
# The default queue depth of 16 overflows on release builds,
# so increase it to 32.
CFLAGS += -DCFG_TUD_TASK_QUEUE_SZ=32
CIRCUITPY_ESP_FLASH_MODE = dio
CIRCUITPY_ESP_FLASH_FREQ = 40m
CIRCUITPY_ESP_FLASH_SIZE = 16MB

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@ -0,0 +1,57 @@
#include "shared-bindings/board/__init__.h"
// Pin names from: https://wiki.odroid.com/odroid_go/odroid_go
STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS
// Left side
{ MP_ROM_QSTR(MP_QSTR_BATTERY), MP_ROM_PTR(&pin_GPIO36) },
{ MP_ROM_QSTR(MP_QSTR_BTN_START), MP_ROM_PTR(&pin_GPIO39) },
{ MP_ROM_QSTR(MP_QSTR_BTN_AXIS_X), MP_ROM_PTR(&pin_GPIO34) },
{ MP_ROM_QSTR(MP_QSTR_BTN_AXIS_Y), MP_ROM_PTR(&pin_GPIO35) },
{ MP_ROM_QSTR(MP_QSTR_BTN_A), MP_ROM_PTR(&pin_GPIO32) },
{ MP_ROM_QSTR(MP_QSTR_BTN_B), MP_ROM_PTR(&pin_GPIO33) },
{ MP_ROM_QSTR(MP_QSTR_SPEAKER_IN_M), MP_ROM_PTR(&pin_GPIO25) },
{ MP_ROM_QSTR(MP_QSTR_SPEAKER_IN_P), MP_ROM_PTR(&pin_GPIO26) },
{ MP_ROM_QSTR(MP_QSTR_BTN_SELECT), MP_ROM_PTR(&pin_GPIO27) },
{ MP_ROM_QSTR(MP_QSTR_BACKLIGHT_PWM), MP_ROM_PTR(&pin_GPIO14) },
{ MP_ROM_QSTR(MP_QSTR_EXT3), MP_ROM_PTR(&pin_GPIO12) },
{ MP_ROM_QSTR(MP_QSTR_BTN_MENU), MP_ROM_PTR(&pin_GPIO13) },
// Right side.
{ MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO23) },
{ MP_ROM_QSTR(MP_QSTR_EXT8), MP_ROM_PTR(&pin_GPIO23) },
{ MP_ROM_QSTR(MP_QSTR_SD_CS), MP_ROM_PTR(&pin_GPIO22) },
{ MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO19) },
{ MP_ROM_QSTR(MP_QSTR_EXT7), MP_ROM_PTR(&pin_GPIO19) },
{ MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO18) },
{ MP_ROM_QSTR(MP_QSTR_EXT2), MP_ROM_PTR(&pin_GPIO18) },
{ MP_ROM_QSTR(MP_QSTR_LCD_CS), MP_ROM_PTR(&pin_GPIO5) },
{ MP_ROM_QSTR(MP_QSTR_EXT5), MP_ROM_PTR(&pin_GPIO4) },
{ MP_ROM_QSTR(MP_QSTR_BTN_VOLUME), MP_ROM_PTR(&pin_GPIO0) },
{ MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&pin_GPIO2) },
{ MP_ROM_QSTR(MP_QSTR_EXT4), MP_ROM_PTR(&pin_GPIO15) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
};
MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);

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@ -0,0 +1,54 @@
#
# Partition Table
#
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-16MB-no-uf2.csv"
CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-16MB-no-uf2.csv"
# end of Partition Table
CONFIG_ESP_INT_WDT_TIMEOUT_MS=3000
#
# SPI RAM config
#
# CONFIG_SPIRAM_TYPE_AUTO is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM16 is not set
CONFIG_SPIRAM_TYPE_ESPPSRAM32=y
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
CONFIG_SPIRAM_SIZE=4194304
CONFIG_SPIRAM_SPEED_40M=y
CONFIG_SPIRAM=y
CONFIG_SPIRAM_BOOT_INIT=y
CONFIG_SPIRAM_IGNORE_NOTFOUND=y
CONFIG_SPIRAM_USE_MEMMAP=y
# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
# CONFIG_SPIRAM_USE_MALLOC is not set
CONFIG_SPIRAM_MEMTEST=y
# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set
CONFIG_SPIRAM_CACHE_WORKAROUND=y
#
# SPI RAM config
#
CONFIG_ESP32_SPIRAM_SUPPORT=y
# CONFIG_SPIRAM_TYPE_AUTO is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
### # Uncomment to send log output to TX/RX pins on Feather ESP32V2
### #
### # ESP System Settings
### #
CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
CONFIG_ESP_CONSOLE_UART_CUSTOM=y
### # CONFIG_ESP_CONSOLE_NONE is not set
CONFIG_ESP_CONSOLE_UART=y
CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
CONFIG_ESP_CONSOLE_UART_NUM=0
CONFIG_ESP_CONSOLE_UART_TX_GPIO=12
CONFIG_ESP_CONSOLE_UART_RX_GPIO=15
CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
### # end of ESP System Settings

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@ -46,15 +46,7 @@ static const uint64_t pin_mask_reset_forbidden =
// Never ever reset serial pins for bootloader and possibly USB-serial converter.
GPIO_SEL_1 | // TXD0
GPIO_SEL_3 | // RXD0
// Never ever reset pins used to communicate with SPI flash and PSRAM.
GPIO_SEL_6 | // CLK
GPIO_SEL_9 | // (PSRAM) SD2
GPIO_SEL_10 | // (PSRAM) SD3
GPIO_SEL_11 | // CMD
GPIO_SEL_16 | // SPIHD
GPIO_SEL_17 | // SPIDO
GPIO_SEL_18 | // SPIWP
GPIO_SEL_23 | // SPIDI
// SPI flash and PSRAM pins are protected at runtime in supervisor/port.c.
#endif // ESP32
#if defined(CONFIG_IDF_TARGET_ESP32C3)

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@ -0,0 +1,9 @@
# ESP-IDF Partition Table
# Name, Type, SubType, Offset, Size, Flags
# bootloader.bin,, 0x1000, 32K
# partition table,, 0x8000, 4K
nvs, data, nvs, 0x9000, 20K,
otadata, data, ota, 0xe000, 8K,
ota_0, 0, ota_0, 0x10000, 2048K,
ota_1, 0, ota_1, 0x210000, 2048K,
user_fs, data, fat, 0x410000, 12224K,
1 # ESP-IDF Partition Table
2 # Name, Type, SubType, Offset, Size, Flags
3 # bootloader.bin,, 0x1000, 32K
4 # partition table,, 0x8000, 4K
5 nvs, data, nvs, 0x9000, 20K,
6 otadata, data, ota, 0xe000, 8K,
7 ota_0, 0, ota_0, 0x10000, 2048K,
8 ota_1, 0, ota_1, 0x210000, 2048K,
9 user_fs, data, fat, 0x410000, 12224K,

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@ -0,0 +1,18 @@
#
# Serial flasher config
#
# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set
# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set
# CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set
# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set
CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y
CONFIG_ESPTOOLPY_FLASHSIZE="16MB"
CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y
# end of Serial flasher config
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-16MB-no-uf2.csv"
#
# Partition Table
#
CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-16MB-no-uf2.csv"
# end of Partition Table

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@ -81,11 +81,19 @@
#include "soc/cache_memory.h"
#endif
#include "soc/efuse_reg.h"
#include "soc/rtc_cntl_reg.h"
#include "esp_debug_helpers.h"
#include "bootloader_flash_config.h"
#include "esp_efuse.h"
#include "esp_ipc.h"
#include "esp_rom_efuse.h"
#ifdef CONFIG_IDF_TARGET_ESP32
#include "esp32/rom/efuse.h"
#endif
#ifdef CONFIG_SPIRAM
#include "esp32/spiram.h"
@ -134,6 +142,93 @@ STATIC void tick_timer_cb(void *arg) {
void sleep_timer_cb(void *arg);
// The ESP-IDF determines these pins at runtime so we do too. This code is based on:
// https://github.com/espressif/esp-idf/blob/6d85d53ceec30c818a92c2fff8f5437d21c4720f/components/esp_hw_support/port/esp32/spiram_psram.c#L810
// IO-pins for PSRAM.
// WARNING: PSRAM shares all but the CS and CLK pins with the flash, so these defines
// hardcode the flash pins as well, making this code incompatible with either a setup
// that has the flash on non-standard pins or ESP32s with built-in flash.
#define PSRAM_SPIQ_SD0_IO 7
#define PSRAM_SPID_SD1_IO 8
#define PSRAM_SPIWP_SD3_IO 10
#define PSRAM_SPIHD_SD2_IO 9
#define FLASH_HSPI_CLK_IO 14
#define FLASH_HSPI_CS_IO 15
#define PSRAM_HSPI_SPIQ_SD0_IO 12
#define PSRAM_HSPI_SPID_SD1_IO 13
#define PSRAM_HSPI_SPIWP_SD3_IO 2
#define PSRAM_HSPI_SPIHD_SD2_IO 4
// PSRAM clock and cs IO should be configured based on hardware design.
// For ESP32-WROVER or ESP32-WROVER-B module, the clock IO is IO17, the cs IO is IO16,
// they are the default value for these two configs.
#define D0WD_PSRAM_CLK_IO CONFIG_D0WD_PSRAM_CLK_IO // Default value is 17
#define D0WD_PSRAM_CS_IO CONFIG_D0WD_PSRAM_CS_IO // Default value is 16
#define D2WD_PSRAM_CLK_IO CONFIG_D2WD_PSRAM_CLK_IO // Default value is 9
#define D2WD_PSRAM_CS_IO CONFIG_D2WD_PSRAM_CS_IO // Default value is 10
// There is no reason to change the pin of an embedded psram.
// So define the number of pin directly, instead of configurable.
#define D0WDR2_V3_PSRAM_CLK_IO 6
#define D0WDR2_V3_PSRAM_CS_IO 16
// For ESP32-PICO chip, the psram share clock with flash. The flash clock pin is fixed, which is IO6.
#define PICO_PSRAM_CLK_IO 6
#define PICO_PSRAM_CS_IO CONFIG_PICO_PSRAM_CS_IO // Default value is 10
#define PICO_V3_02_PSRAM_CLK_IO 10
#define PICO_V3_02_PSRAM_CS_IO 9
static void _never_reset_spi_ram_flash(void) {
#if defined(CONFIG_IDF_TARGET_ESP32)
uint32_t pkg_ver = esp_efuse_get_pkg_ver();
if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
never_reset_pin_number(D2WD_PSRAM_CLK_IO);
never_reset_pin_number(D2WD_PSRAM_CS_IO);
} else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4 && esp_efuse_get_chip_ver() >= 3) {
// This chip is ESP32-PICO-V3 and doesn't have PSRAM.
} else if ((pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2) || (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4)) {
never_reset_pin_number(PICO_PSRAM_CLK_IO);
never_reset_pin_number(PICO_PSRAM_CS_IO);
} else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOV302) {
never_reset_pin_number(PICO_V3_02_PSRAM_CLK_IO);
never_reset_pin_number(PICO_V3_02_PSRAM_CS_IO);
} else if ((pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ6) || (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ5)) {
never_reset_pin_number(D0WD_PSRAM_CLK_IO);
never_reset_pin_number(D0WD_PSRAM_CS_IO);
} else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D0WDR2V3) {
never_reset_pin_number(D0WDR2_V3_PSRAM_CLK_IO);
never_reset_pin_number(D0WDR2_V3_PSRAM_CS_IO);
}
const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info();
if (spiconfig == ESP_ROM_EFUSE_FLASH_DEFAULT_SPI) {
never_reset_pin_number(SPI_IOMUX_PIN_NUM_CLK);
never_reset_pin_number(SPI_IOMUX_PIN_NUM_CS);
never_reset_pin_number(PSRAM_SPIQ_SD0_IO);
never_reset_pin_number(PSRAM_SPID_SD1_IO);
never_reset_pin_number(PSRAM_SPIWP_SD3_IO);
never_reset_pin_number(PSRAM_SPIHD_SD2_IO);
} else if (spiconfig == ESP_ROM_EFUSE_FLASH_DEFAULT_HSPI) {
never_reset_pin_number(FLASH_HSPI_CLK_IO);
never_reset_pin_number(FLASH_HSPI_CS_IO);
never_reset_pin_number(PSRAM_HSPI_SPIQ_SD0_IO);
never_reset_pin_number(PSRAM_HSPI_SPID_SD1_IO);
never_reset_pin_number(PSRAM_HSPI_SPIWP_SD3_IO);
never_reset_pin_number(PSRAM_HSPI_SPIHD_SD2_IO);
} else {
never_reset_pin_number(EFUSE_SPICONFIG_RET_SPICLK(spiconfig));
never_reset_pin_number(EFUSE_SPICONFIG_RET_SPICS0(spiconfig));
never_reset_pin_number(EFUSE_SPICONFIG_RET_SPIQ(spiconfig));
never_reset_pin_number(EFUSE_SPICONFIG_RET_SPID(spiconfig));
never_reset_pin_number(EFUSE_SPICONFIG_RET_SPIHD(spiconfig));
never_reset_pin_number(bootloader_flash_get_wp_pin());
}
#endif
}
safe_mode_t port_init(void) {
esp_timer_create_args_t args;
args.callback = &tick_timer_cb;
@ -214,6 +309,8 @@ safe_mode_t port_init(void) {
}
#endif
_never_reset_spi_ram_flash();
if (heap == NULL) {
size_t heap_total = heap_caps_get_total_size(MALLOC_CAP_8BIT);
heap_size = MIN(heap_caps_get_largest_free_block(MALLOC_CAP_8BIT), heap_total / 2);

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@ -622,18 +622,16 @@ static void _reply_directory_json(socketpool_socket_obj_t *socket, _request *req
// LittleFS.
_send_chunk(socket, ", ");
uint64_t truncated_time = timeutils_mktime(1980 + (file_info.fdate >> 9),
uint32_t truncated_time = timeutils_mktime(1980 + (file_info.fdate >> 9),
(file_info.fdate >> 5) & 0xf,
file_info.fdate & 0x1f,
file_info.ftime >> 11,
(file_info.ftime >> 5) & 0x1f,
(file_info.ftime & 0x1f) * 2) * 1000000000ULL;
(file_info.ftime & 0x1f) * 2);
// Use snprintf because mp_printf doesn't support 64 bit numbers by
// default.
char encoded_time[32];
snprintf(encoded_time, sizeof(encoded_time), "%llu", truncated_time);
mp_printf(&_socket_print, "\"modified_ns\": %s, ", encoded_time);
// Manually append zeros to make the time nanoseconds. Support for printing 64 bit numbers
// varies across chipsets.
mp_printf(&_socket_print, "\"modified_ns\": %lu000000000, ", truncated_time);
size_t file_size = 0;
if ((file_info.fattrib & AM_DIR) == 0) {
file_size = file_info.fsize;