Merge pull request #1358 from tannewt/fix_840_qspi
Fix QSPI on Feather nRF52840
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commit
4e8531f4a2
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@ -20,6 +20,6 @@ endif
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NRF_DEFINES += -DNRF52840_XXAA -DNRF52840
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NRF_DEFINES += -DNRF52840_XXAA -DNRF52840
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SPI_FLASH_FILESYSTEM = 1
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QSPI_FLASH_FILESYSTEM = 1
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EXTERNAL_FLASH_DEVICE_COUNT = 1
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EXTERNAL_FLASH_DEVICE_COUNT = 1
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EXTERNAL_FLASH_DEVICES = "GD25Q16C"
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EXTERNAL_FLASH_DEVICES = "GD25Q16C"
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@ -115,7 +115,7 @@ void spi_flash_init(void) {
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.dpmconfig = false
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.dpmconfig = false
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},
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},
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.phy_if = {
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.phy_if = {
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.sck_freq = NRF_QSPI_FREQ_32MDIV16,
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.sck_freq = NRF_QSPI_FREQ_32MDIV16, // Start at a slow 2mhz and speed up once we know what we're talking to.
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.sck_delay = 10, // min time CS must stay high before going low again. in unit of 62.5 ns
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.sck_delay = 10, // min time CS must stay high before going low again. in unit of 62.5 ns
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.spi_mode = NRF_QSPI_MODE_0,
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.spi_mode = NRF_QSPI_MODE_0,
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.dpmen = false
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.dpmen = false
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@ -132,7 +132,7 @@ void spi_flash_init(void) {
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qspi_cfg.pins.io2_pin = MICROPY_QSPI_DATA2;
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qspi_cfg.pins.io2_pin = MICROPY_QSPI_DATA2;
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qspi_cfg.pins.io3_pin = MICROPY_QSPI_DATA3;
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qspi_cfg.pins.io3_pin = MICROPY_QSPI_DATA3;
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qspi_cfg.prot_if.readoc = NRF_QSPI_READOC_READ4IO;
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qspi_cfg.prot_if.readoc = NRF_QSPI_READOC_READ4IO;
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qspi_cfg.prot_if.writeoc = NRF_QSPI_WRITEOC_PP4IO;
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qspi_cfg.prot_if.writeoc = NRF_QSPI_WRITEOC_PP4O;
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#endif
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#endif
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// No callback for blocking API
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// No callback for blocking API
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@ -142,5 +142,17 @@ void spi_flash_init(void) {
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void spi_flash_init_device(const external_flash_device* device) {
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void spi_flash_init_device(const external_flash_device* device) {
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check_quad_enable(device);
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check_quad_enable(device);
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// TODO(tannewt): Adjust the speed for the found device.
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// Switch to single output line if the device doesn't support quad programs.
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if (!device->supports_qspi_writes) {
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NRF_QSPI->IFCONFIG0 &= ~QSPI_IFCONFIG0_WRITEOC_Msk;
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NRF_QSPI->IFCONFIG0 |= QSPI_IFCONFIG0_WRITEOC_PP;
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}
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// Speed up as much as we can.
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uint8_t sckfreq = 0;
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while (32000000 / (sckfreq + 1) > device->max_clock_speed_mhz * 1000000 && sckfreq < 16) {
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sckfreq += 1;
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}
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NRF_QSPI->IFCONFIG1 &= ~QSPI_IFCONFIG1_SCKFREQ_Msk;
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NRF_QSPI->IFCONFIG1 |= sckfreq << QSPI_IFCONFIG1_SCKDELAY_Pos;
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}
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}
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@ -86,7 +86,7 @@ typedef struct {
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}
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}
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// Settings for the Gigadevice GD25Q16C 2MiB SPI flash.
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// Settings for the Gigadevice GD25Q16C 2MiB SPI flash.
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// Datasheet: http://www.gigadevice.com/wp-content/uploads/2017/12/DS-00086-GD25Q16C-Rev2.6.pdf
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// Datasheet: http://www.gigadevice.com/datasheet/gd25q16c/
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#define GD25Q16C {\
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#define GD25Q16C {\
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.total_size = (1 << 21), /* 2 MiB */ \
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.total_size = (1 << 21), /* 2 MiB */ \
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.start_up_time_us = 5000, \
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.start_up_time_us = 5000, \
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