diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h
index f9548737f3..7980ca93d6 100644
--- a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h
+++ b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.h
@@ -27,26 +27,21 @@
 //Micropython setup
 
 #define MICROPY_HW_BOARD_NAME       "PYB LR Nano V2"
-#define MICROPY_HW_MCU_NAME         "STM32F405RG"
+#define MICROPY_HW_MCU_NAME         "STM32F411CE"
 
-#define FLASH_SIZE                  (0x100000)
+#define FLASH_SIZE                  (0x80000)
 #define FLASH_PAGE_SIZE             (0x4000)
 
-#define AUTORESET_DELAY_MS 500
-#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)
+#define BOARD_OSC_DIV 8
 
 // On-board flash
-#define SPI_FLASH_MOSI_PIN          &pin_PB05
-#define SPI_FLASH_MISO_PIN          &pin_PB04
-#define SPI_FLASH_SCK_PIN           &pin_PB03
-#define SPI_FLASH_CS_PIN            &pin_PA15
+#define SPI_FLASH_MOSI_PIN          (&pin_PB15)
+#define SPI_FLASH_MISO_PIN          (&pin_PB14)
+#define SPI_FLASH_SCK_PIN           (&pin_PB13)
+#define SPI_FLASH_CS_PIN            (&pin_PB12)
 
-#define DEFAULT_I2C_BUS_SCL (&pin_PB06)
-#define DEFAULT_I2C_BUS_SDA (&pin_PB07)
+#define CIRCUITPY_AUTORELOAD_DELAY_MS 500
 
-#define DEFAULT_SPI_BUS_SCK (&pin_PB13)
-#define DEFAULT_SPI_BUS_MOSI (&pin_PB15)
-#define DEFAULT_SPI_BUS_MISO (&pin_PB14)
+#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x2000 - 0xC000)
 
-#define DEFAULT_UART_BUS_RX (&pin_PB11)
-#define DEFAULT_UART_BUS_TX (&pin_PB10)
+#define AUTORESET_DELAY_MS 500
diff --git a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk
index 5bad4e81f3..918f79f96e 100644
--- a/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk
+++ b/ports/stm32f4/boards/pyb_nano_v2/mpconfigboard.mk
@@ -1,19 +1,19 @@
 USB_VID = 0x239A
 USB_PID = 0x805A
-USB_PRODUCT = "Feather STM32F405 Express"
-USB_MANUFACTURER = "Adafruit Industries LLC"
+USB_PRODUCT = "PYB LR Nano V2"
+USB_MANUFACTURER = "MicroPython Chinese Community"
 USB_DEVICES = "CDC,MSC"
 
 SPI_FLASH_FILESYSTEM = 1
 EXTERNAL_FLASH_DEVICE_COUNT = 1
-EXTERNAL_FLASH_DEVICES = GD25Q16C
+EXTERNAL_FLASH_DEVICES = W25Q64JV_IQ
 LONGINT_IMPL = MPZ
 
 MCU_SERIES = m4
 MCU_VARIANT = stm32f4
-MCU_SUB_VARIANT = stm32f405xx
-MCU_PACKAGE = 64
-CMSIS_MCU = STM32F405xx
-LD_FILE = boards/STM32F405.ld
+MCU_SUB_VARIANT = stm32f411xe
+MCU_PACKAGE = 48
+CMSIS_MCU = STM32F411xE
+LD_FILE = boards/STM32F411VETx_FLASH.ld
 TEXT0_ADDR = 0x08000000
-TEXT1_ADDR = 0x08010000
\ No newline at end of file
+TEXT1_ADDR = 0x08020000
\ No newline at end of file
diff --git a/ports/stm32f4/boards/pyb_nano_v2/pins.c b/ports/stm32f4/boards/pyb_nano_v2/pins.c
index 566ae0f1a4..e10124f6af 100644
--- a/ports/stm32f4/boards/pyb_nano_v2/pins.c
+++ b/ports/stm32f4/boards/pyb_nano_v2/pins.c
@@ -30,18 +30,30 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
     { MP_ROM_QSTR(MP_QSTR_X1), MP_ROM_PTR(&pin_PA01) },
     { MP_ROM_QSTR(MP_QSTR_X0), MP_ROM_PTR(&pin_PA00) },
 
-    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) },
-    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) },
+    { MP_ROM_QSTR(MP_QSTR_SDA1), MP_ROM_PTR(&pin_PB09) },
+    { MP_ROM_QSTR(MP_QSTR_SCL1), MP_ROM_PTR(&pin_PB08) },
+    { MP_ROM_QSTR(MP_QSTR_SDA2), MP_ROM_PTR(&pin_PB03) },
+    { MP_ROM_QSTR(MP_QSTR_SCL2), MP_ROM_PTR(&pin_PB10) },
+    { MP_ROM_QSTR(MP_QSTR_SDA3), MP_ROM_PTR(&pin_PB04) },
+    { MP_ROM_QSTR(MP_QSTR_SCL3), MP_ROM_PTR(&pin_PA08) },
 
-    { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) },
-    { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) },
-    { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB15) },
+    { MP_ROM_QSTR(MP_QSTR_SCK1), MP_ROM_PTR(&pin_PA05) },
+    { MP_ROM_QSTR(MP_QSTR_MISO1), MP_ROM_PTR(&pin_PA06) },
+    { MP_ROM_QSTR(MP_QSTR_MOSI1), MP_ROM_PTR(&pin_PA07) },
+    { MP_ROM_QSTR(MP_QSTR_SCK2), MP_ROM_PTR(&pin_PB13) },
+    { MP_ROM_QSTR(MP_QSTR_MISO2), MP_ROM_PTR(&pin_PB14) },
+    { MP_ROM_QSTR(MP_QSTR_MOSI2), MP_ROM_PTR(&pin_PB15) },
 
-    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB10) },
-    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB11) },
+    { MP_ROM_QSTR(MP_QSTR_TX1), MP_ROM_PTR(&pin_PB07) },
+    { MP_ROM_QSTR(MP_QSTR_RX1), MP_ROM_PTR(&pin_PB06) },
+    { MP_ROM_QSTR(MP_QSTR_TX2), MP_ROM_PTR(&pin_PA02) },
+    { MP_ROM_QSTR(MP_QSTR_RX2), MP_ROM_PTR(&pin_PA03) },
 
-    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
-    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
-    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+    { MP_ROM_QSTR(MP_QSTR_LED_RED), MP_ROM_PTR(&pin_PA00) },
+    { MP_ROM_QSTR(MP_QSTR_LED_GREEN), MP_ROM_PTR(&pin_PA01) },
+    { MP_ROM_QSTR(MP_QSTR_LED_YELLOW), MP_ROM_PTR(&pin_PA02) },
+    { MP_ROM_QSTR(MP_QSTR_LED_BLUE), MP_ROM_PTR(&pin_PA03) },
+
+    { MP_ROM_QSTR(MP_QSTR_SW), MP_ROM_PTR(&pin_PC13) },
 };
 MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
diff --git a/ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h
index 68a49b4ba8..ab04df3182 100644
--- a/ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h
+++ b/ports/stm32f4/boards/pyb_nano_v2/stm32f4xx_hal_conf.h
@@ -93,7 +93,7 @@
   *        (when HSE is used as system clock source, directly or through the PLL).  
   */
 #if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */
+  #define HSE_VALUE    ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h
index 67ddc885ae..8a482ce7dc 100644
--- a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h
+++ b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.h
@@ -26,27 +26,16 @@
 
 //Micropython setup
 
-#define MICROPY_HW_BOARD_NAME       "Feather STM32F405 Express"
-#define MICROPY_HW_MCU_NAME         "STM32F405RG"
+#define MICROPY_HW_BOARD_NAME       "stm32f411ce-blackpill"
+#define MICROPY_HW_MCU_NAME         "STM32F411CE"
 
-#define FLASH_SIZE                  (0x100000)
+#define FLASH_SIZE                  (0x80000)
 #define FLASH_PAGE_SIZE             (0x4000)
 
+#define BOARD_OSC_DIV 25
+
+#define CIRCUITPY_AUTORELOAD_DELAY_MS 500
+
+#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x2000 - 0xC000)
+
 #define AUTORESET_DELAY_MS 500
-#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)
-
-// On-board flash
-#define SPI_FLASH_MOSI_PIN          &pin_PB05
-#define SPI_FLASH_MISO_PIN          &pin_PB04
-#define SPI_FLASH_SCK_PIN           &pin_PB03
-#define SPI_FLASH_CS_PIN            &pin_PA15
-
-#define DEFAULT_I2C_BUS_SCL (&pin_PB06)
-#define DEFAULT_I2C_BUS_SDA (&pin_PB07)
-
-#define DEFAULT_SPI_BUS_SCK (&pin_PB13)
-#define DEFAULT_SPI_BUS_MOSI (&pin_PB15)
-#define DEFAULT_SPI_BUS_MISO (&pin_PB14)
-
-#define DEFAULT_UART_BUS_RX (&pin_PB11)
-#define DEFAULT_UART_BUS_TX (&pin_PB10)
diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk
index 5bad4e81f3..4d3644d4f6 100644
--- a/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk
+++ b/ports/stm32f4/boards/stm32f411ce_blackpill/mpconfigboard.mk
@@ -1,19 +1,17 @@
 USB_VID = 0x239A
 USB_PID = 0x805A
-USB_PRODUCT = "Feather STM32F405 Express"
-USB_MANUFACTURER = "Adafruit Industries LLC"
+USB_PRODUCT = "stm32f411ce-blackpill"
+USB_MANUFACTURER = "Unknown"
 USB_DEVICES = "CDC,MSC"
 
-SPI_FLASH_FILESYSTEM = 1
-EXTERNAL_FLASH_DEVICE_COUNT = 1
-EXTERNAL_FLASH_DEVICES = GD25Q16C
-LONGINT_IMPL = MPZ
+INTERNAL_FLASH_FILESYSTEM = 1
+LONGINT_IMPL = NONE
 
 MCU_SERIES = m4
 MCU_VARIANT = stm32f4
-MCU_SUB_VARIANT = stm32f405xx
-MCU_PACKAGE = 64
-CMSIS_MCU = STM32F405xx
-LD_FILE = boards/STM32F405.ld
+MCU_SUB_VARIANT = stm32f411xe
+MCU_PACKAGE = 48
+CMSIS_MCU = STM32F411xE
+LD_FILE = boards/STM32F411VETx_FLASH.ld
 TEXT0_ADDR = 0x08000000
-TEXT1_ADDR = 0x08010000
\ No newline at end of file
+TEXT1_ADDR = 0x08020000
\ No newline at end of file
diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c b/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c
index 4aa1f362ad..0846cee673 100644
--- a/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c
+++ b/ports/stm32f4/boards/stm32f411ce_blackpill/pins.c
@@ -1,33 +1,38 @@
 #include "shared-bindings/board/__init__.h"
 
 STATIC const mp_rom_map_elem_t board_module_globals_table[] = {
-    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA04) },
-    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA05) },
-    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA06) },
-    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA07) },
-    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PC04) },
-    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PC05) },
+    { MP_ROM_QSTR(MP_QSTR_B12), MP_ROM_PTR(&pin_PB12) },
+    { MP_ROM_QSTR(MP_QSTR_B13), MP_ROM_PTR(&pin_PB13) },
+    { MP_ROM_QSTR(MP_QSTR_B14), MP_ROM_PTR(&pin_PB14) },
+    { MP_ROM_QSTR(MP_QSTR_B15), MP_ROM_PTR(&pin_PB15) },
+    { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_PA08) },
+    { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_PA09) },
+    { MP_ROM_QSTR(MP_QSTR_A10), MP_ROM_PTR(&pin_PA10) },
+    { MP_ROM_QSTR(MP_QSTR_A11), MP_ROM_PTR(&pin_PA11) },
+    { MP_ROM_QSTR(MP_QSTR_A12), MP_ROM_PTR(&pin_PA12) },
+    { MP_ROM_QSTR(MP_QSTR_A15), MP_ROM_PTR(&pin_PA15) },
+    { MP_ROM_QSTR(MP_QSTR_B3), MP_ROM_PTR(&pin_PB03) },
+    { MP_ROM_QSTR(MP_QSTR_B4), MP_ROM_PTR(&pin_PB04) },
+    { MP_ROM_QSTR(MP_QSTR_B5), MP_ROM_PTR(&pin_PB05) },
+    { MP_ROM_QSTR(MP_QSTR_B6), MP_ROM_PTR(&pin_PB06) },
+    { MP_ROM_QSTR(MP_QSTR_B7), MP_ROM_PTR(&pin_PB07) },
+    { MP_ROM_QSTR(MP_QSTR_B8), MP_ROM_PTR(&pin_PB08) },
+    { MP_ROM_QSTR(MP_QSTR_B9), MP_ROM_PTR(&pin_PB09) },
 
-    { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_PC07) },
-    { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_PC06) },
-    { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_PB08) },
-    { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_PB09) },
-    { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_PC03) },
-    { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_PC02) },
-    { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_PC01) },
-
-    { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_PB07) },
-    { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_PB06) },
-
-    { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_PB13) },
-    { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_PB14) },
-    { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_PB15) },
-
-    { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_PB10) },
-    { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_PB11) },
-
-    { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
-    { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
-    { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
+    { MP_ROM_QSTR(MP_QSTR_B10), MP_ROM_PTR(&pin_PB10) },
+    { MP_ROM_QSTR(MP_QSTR_B2), MP_ROM_PTR(&pin_PB02) },
+    { MP_ROM_QSTR(MP_QSTR_B1), MP_ROM_PTR(&pin_PB01) },
+    { MP_ROM_QSTR(MP_QSTR_B0), MP_ROM_PTR(&pin_PB00) },
+    { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_PA07) },
+    { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_PA06) },
+    { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_PA05) },
+    { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_PA05) },
+    { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_PA03) },
+    { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PA02) },
+    { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PA01) },
+    { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA00) },
+    { MP_ROM_QSTR(MP_QSTR_C15), MP_ROM_PTR(&pin_PC15) },
+    { MP_ROM_QSTR(MP_QSTR_C14), MP_ROM_PTR(&pin_PC14) },
+    { MP_ROM_QSTR(MP_QSTR_C13), MP_ROM_PTR(&pin_PC13) },    
 };
 MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table);
diff --git a/ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h
index 68a49b4ba8..81d29f2420 100644
--- a/ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h
+++ b/ports/stm32f4/boards/stm32f411ce_blackpill/stm32f4xx_hal_conf.h
@@ -67,7 +67,7 @@
 /* #define HAL_IRDA_MODULE_ENABLED   */
 /* #define HAL_SMARTCARD_MODULE_ENABLED   */
 /* #define HAL_WWDG_MODULE_ENABLED   */
-#define HAL_PCD_MODULE_ENABLED
+/* #define HAL_PCD_MODULE_ENABLED */
 /* #define HAL_HCD_MODULE_ENABLED   */
 /* #define HAL_DSI_MODULE_ENABLED   */
 /* #define HAL_QSPI_MODULE_ENABLED   */
@@ -93,7 +93,7 @@
   *        (when HSE is used as system clock source, directly or through the PLL).  
   */
 #if !defined  (HSE_VALUE) 
-  #define HSE_VALUE    ((uint32_t)12000000) /*!< Value of the External oscillator in Hz */
+  #define HSE_VALUE    ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
diff --git a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.h b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.h
index d7898ba0b8..0c6f537f87 100644
--- a/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.h
+++ b/ports/stm32f4/boards/stm32f411ve_discovery/mpconfigboard.h
@@ -32,6 +32,8 @@
 #define FLASH_SIZE                  (0x80000) //512K
 #define FLASH_PAGE_SIZE             (0x4000)  //16K
 
+#define BOARD_OSC_DIV 8
+
 #define CIRCUITPY_AUTORELOAD_DELAY_MS 500
 
 #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x2000 - 0xC000)
diff --git a/ports/stm32f4/common-hal/microcontroller/Pin.c b/ports/stm32f4/common-hal/microcontroller/Pin.c
index 21290e03c9..615e483585 100644
--- a/ports/stm32f4/common-hal/microcontroller/Pin.c
+++ b/ports/stm32f4/common-hal/microcontroller/Pin.c
@@ -46,8 +46,12 @@ bool neopixel_in_use;
 #elif MCU_PACKAGE == 64
     #define GPIO_PORT_COUNT 3
     GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC};
+#elif MCU_PACKAGE == 48
+    #define GPIO_PORT_COUNT 3
+    GPIO_TypeDef * ports[GPIO_PORT_COUNT] = {GPIOA, GPIOB, GPIOC};
 #endif
 
+
 STATIC uint16_t claimed_pins[GPIO_PORT_COUNT];
 STATIC uint16_t never_reset_pins[GPIO_PORT_COUNT];
 
diff --git a/ports/stm32f4/common-hal/microcontroller/__init__.c b/ports/stm32f4/common-hal/microcontroller/__init__.c
index c7493a4d60..7e45e8ed8b 100644
--- a/ports/stm32f4/common-hal/microcontroller/__init__.c
+++ b/ports/stm32f4/common-hal/microcontroller/__init__.c
@@ -169,7 +169,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_globals_table[] = {
   { MP_ROM_QSTR(MP_QSTR_PE15), MP_ROM_PTR(&pin_PE15) },
 #endif
   { MP_ROM_QSTR(MP_QSTR_PB10), MP_ROM_PTR(&pin_PB10) },
-#if MCU_PACKAGE != 100
+#if MCU_PACKAGE == 144
   { MP_ROM_QSTR(MP_QSTR_PB11), MP_ROM_PTR(&pin_PB11) },
 #endif  
   { MP_ROM_QSTR(MP_QSTR_PB12), MP_ROM_PTR(&pin_PB12) },
diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/clocks.c b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/clocks.c
index 883c252d51..53810af263 100644
--- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/clocks.c
+++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/clocks.c
@@ -25,6 +25,7 @@
  * THE SOFTWARE.
  */
 #include "stm32f4xx_hal.h"
+#include "py/mpconfig.h"
 
 void stm32f4_peripherals_clocks_init(void) {
     //System clock init
@@ -44,7 +45,7 @@ void stm32f4_peripherals_clocks_init(void) {
     RCC_OscInitStruct.HSEState = RCC_HSE_ON;
     RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
     RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-    RCC_OscInitStruct.PLL.PLLM = 8;
+    RCC_OscInitStruct.PLL.PLLM = BOARD_OSC_DIV;
     RCC_OscInitStruct.PLL.PLLN = 336;
     RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
     RCC_OscInitStruct.PLL.PLLQ = 7;