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Merge pull request #3320 from hierophect/stm32-meowbit-fix

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STM32: Fix Meowbit startup and associated bugs
This commit is contained in:
Jeff Epler 2020-08-27 13:05:56 -05:00 committed by GitHub
commit 49a22b0c55
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GPG Key ID: 4AEE18F83AFDEB23
7 changed files with 14 additions and 47 deletions
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2
ports/stm/boards/meowbit_v121/board.c
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@ -106,7 +106,7 @@ void board_init(void) {
&pin_PB03, &pin_PB03,
NO_BRIGHTNESS_COMMAND, NO_BRIGHTNESS_COMMAND,
1.0f, // brightness (ignored) 1.0f, // brightness (ignored)
true, // auto_brightness false, // auto_brightness
false, // single_byte_bounds false, // single_byte_bounds
false, // data_as_commands false, // data_as_commands
true, // auto_refresh true, // auto_refresh

3
ports/stm/boards/meowbit_v121/mpconfigboard.h
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@ -36,8 +36,7 @@
#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000) #define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)
#define HSE_VALUE ((uint32_t)12000000U) #define HSE_VALUE ((uint32_t)12000000U)
#define LSE_VALUE ((uint32_t)32000U) #define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
#define BOARD_NO_VBUS_SENSE (1) #define BOARD_NO_VBUS_SENSE (1)
#define BOARD_VTOR_DEFER (1) //Leave VTOR relocation to bootloader #define BOARD_VTOR_DEFER (1) //Leave VTOR relocation to bootloader

2
ports/stm/boards/meowbit_v121/mpconfigboard.mk
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@ -18,5 +18,5 @@ OPTIMIZATION_FLAGS = -Os
LD_COMMON = boards/common_default.ld LD_COMMON = boards/common_default.ld
LD_FILE = boards/STM32F401xe_boot.ld LD_FILE = boards/STM32F401xe_boot.ld
# use for internal flash # For debugging - also comment BOOTLOADER_OFFSET and BOARD_VTOR_DEFER
# LD_FILE = boards/STM32F401xe_fs.ld # LD_FILE = boards/STM32F401xe_fs.ld

3
ports/stm/common-hal/pwmio/PWMOut.c
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@ -239,13 +239,14 @@ void common_hal_pwmio_pwmout_deinit(pwmio_pwmout_obj_t* self) {
HAL_TIM_PWM_Stop(&self->handle, self->channel); HAL_TIM_PWM_Stop(&self->handle, self->channel);
} }
reset_pin_number(self->tim->pin->port,self->tim->pin->number); reset_pin_number(self->tim->pin->port,self->tim->pin->number);
self->tim = NULL;
//if reserved timer has no active channels, we can disable it //if reserved timer has no active channels, we can disable it
if (!reserved_tim[self->tim->tim_index - 1]) { if (!reserved_tim[self->tim->tim_index - 1]) {
tim_frequencies[self->tim->tim_index - 1] = 0x00; tim_frequencies[self->tim->tim_index - 1] = 0x00;
stm_peripherals_timer_free(self->handle.Instance); stm_peripherals_timer_free(self->handle.Instance);
} }
self->tim = NULL;
} }
void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t* self, uint16_t duty) { void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t* self, uint16_t duty) {

15
ports/stm/peripherals/stm32f4/clocks.c
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@ -49,7 +49,6 @@ void stm32_peripherals_clocks_init(void) {
RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
bool lse_failure = false;
// Set voltage scaling in accordance with system clock speed // Set voltage scaling in accordance with system clock speed
__HAL_RCC_PWR_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE();
@ -76,16 +75,10 @@ void stm32_peripherals_clocks_init(void) {
#endif #endif
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
// Failure likely means a LSE issue - attempt to swap to LSI, and set to crash // Clock issues are too problematic to even attempt recovery.
RCC_OscInitStruct.LSEState = RCC_LSE_OFF; // If you end up here, check whether your LSE settings match your board.
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
// No HSE means no USB, so just fail forever
while(1); while(1);
} }
lse_failure = true;
}
// Configure bus clock sources and divisors // Configure bus clock sources and divisors
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
@ -113,8 +106,4 @@ void stm32_peripherals_clocks_init(void) {
#endif #endif
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
if (lse_failure) {
reset_into_safe_mode(HARD_CRASH); //TODO: make safe mode category CLOCK_FAULT?
}
} }

15
ports/stm/peripherals/stm32f7/clocks.c
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@ -40,7 +40,6 @@ void stm32_peripherals_clocks_init(void) {
RCC_ClkInitTypeDef RCC_ClkInitStruct; RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct; RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
bool lse_failure = false;
// Configure LSE Drive // Configure LSE Drive
HAL_PWR_EnableBkUpAccess(); HAL_PWR_EnableBkUpAccess();
@ -68,16 +67,10 @@ void stm32_peripherals_clocks_init(void) {
RCC_OscInitStruct.PLL.PLLQ = CPY_CLK_PLLQ; RCC_OscInitStruct.PLL.PLLQ = CPY_CLK_PLLQ;
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
// Failure likely means a LSE issue - attempt to swap to LSI, and set to crash // Clock issues are too problematic to even attempt recovery.
RCC_OscInitStruct.LSEState = RCC_LSE_OFF; // If you end up here, check whether your LSE settings match your board.
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
// No HSE means no USB, so just fail forever
while(1); while(1);
} }
lse_failure = true;
}
/* Activate the OverDrive to reach the 216 MHz Frequency */ /* Activate the OverDrive to reach the 216 MHz Frequency */
HAL_PWREx_EnableOverDrive(); HAL_PWREx_EnableOverDrive();
@ -111,8 +104,4 @@ void stm32_peripherals_clocks_init(void) {
#endif #endif
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
if (lse_failure) {
reset_into_safe_mode(HARD_CRASH); //TODO: make safe mode category CLOCK_FAULT?
}
} }

15
ports/stm/peripherals/stm32h7/clocks.c
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@ -37,7 +37,6 @@ void stm32_peripherals_clocks_init(void) {
RCC_OscInitTypeDef RCC_OscInitStruct = {0}; RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
bool lse_failure = false;
// Set voltage scaling in accordance with system clock speed // Set voltage scaling in accordance with system clock speed
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY); HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
@ -73,16 +72,10 @@ void stm32_peripherals_clocks_init(void) {
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE; RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
RCC_OscInitStruct.PLL.PLLFRACN = 0; RCC_OscInitStruct.PLL.PLLFRACN = 0;
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
// Failure likely means a LSE issue - attempt to swap to LSI, and set to crash // Clock issues are too problematic to even attempt recovery.
RCC_OscInitStruct.LSEState = RCC_LSE_OFF; // If you end up here, check whether your LSE settings match your board.
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
// No HSE means no USB, so just fail forever
while(1); while(1);
} }
lse_failure = true;
}
// Configure bus clock sources and divisors // Configure bus clock sources and divisors
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
@ -116,8 +109,4 @@ void stm32_peripherals_clocks_init(void) {
// Enable USB Voltage detector // Enable USB Voltage detector
HAL_PWREx_EnableUSBVoltageDetector(); HAL_PWREx_EnableUSBVoltageDetector();
if (lse_failure) {
reset_into_safe_mode(HARD_CRASH); //TODO: make safe mode category CLOCK_FAULT?
}
} }