From 489163b74edf9d6f40b3d9e6ee0154d2f1ddce79 Mon Sep 17 00:00:00 2001 From: Jeff Epler Date: Thu, 1 Apr 2021 09:37:39 -0500 Subject: [PATCH] mimxrt1011: pwmio: Enable basic PWMOut functionality After this change, the following program works for me on the MIMXRT1010-EVK: ```python import pwmio import board p = pwmio.PWMOut(board.D13, frequency=1_000_000, variable_frequency=True) p.duty_cycle = 32868 while True: pass ``` Querying and varying the duty_cycle and frequency work as well. The lowest frequency obtainable is about 2kHz; there is an additional divider which would allow lower PWM frequencies (I think 1kHz is important for servos?) Something odd happens with very low duty cycles, such as ```python >>> p.frequency = 2000 >>> p.duty_cycle = 2 ``` instead of a symmetrical waveform, it's asymmetrical. With `duty_cycle=4`, the effect disappears. The reason for this is probably hidden in the datasheet, but could affect servos or other things that count pulse widths. --- ports/mimxrt10xx/common-hal/pwmio/PWMOut.c | 403 ++++-------------- ports/mimxrt10xx/common-hal/pwmio/PWMOut.h | 1 + .../mimxrt10xx/MIMXRT1011/periph.c | 40 +- .../mimxrt10xx/MIMXRT1021/periph.c | 78 ++-- .../mimxrt10xx/MIMXRT1062/periph.c | 134 +++--- .../peripherals/mimxrt10xx/periph.h | 14 +- 6 files changed, 213 insertions(+), 457 deletions(-) diff --git a/ports/mimxrt10xx/common-hal/pwmio/PWMOut.c b/ports/mimxrt10xx/common-hal/pwmio/PWMOut.c index 28ea81fa22..8ef1823e1f 100644 --- a/ports/mimxrt10xx/common-hal/pwmio/PWMOut.c +++ b/ports/mimxrt10xx/common-hal/pwmio/PWMOut.c @@ -31,15 +31,31 @@ #include "py/runtime.h" #include "common-hal/pwmio/PWMOut.h" #include "shared-bindings/pwmio/PWMOut.h" -#include "shared-bindings/microcontroller/Processor.h" +#include "shared-bindings/microcontroller/Pin.h" #include "fsl_pwm.h" #include "supervisor/shared/translate.h" #include "periph.h" -#include +static void config_periph_pin(const mcu_pwm_obj_t *periph) { + IOMUXC_SetPinMux( + periph->pin->mux_reg, periph->mux_mode, + periph->input_reg, periph->input_idx, + periph->pin->cfg_reg, + 0); + IOMUXC_SetPinConfig(0, 0, 0, 0, + periph->pin->cfg_reg, + IOMUXC_SW_PAD_CTL_PAD_HYS(0) + | IOMUXC_SW_PAD_CTL_PAD_PUS(1) + | IOMUXC_SW_PAD_CTL_PAD_PUE(1) + | IOMUXC_SW_PAD_CTL_PAD_PKE(1) + | IOMUXC_SW_PAD_CTL_PAD_ODE(0) + | IOMUXC_SW_PAD_CTL_PAD_SPEED(1) + | IOMUXC_SW_PAD_CTL_PAD_DSE(6) + | IOMUXC_SW_PAD_CTL_PAD_SRE(0)); +} // TODO // #include "samd/pins.h" @@ -148,8 +164,6 @@ pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t *self, continue; } - printf("pwm: 0x%p, sum %d, chan %d, mux %d\r\n", mcu_pwm_list[i].pwm, mcu_pwm_list[i].submodule, mcu_pwm_list[i].channel, mcu_pwm_list[i].mux_mode); - self->pwm = &mcu_pwm_list[i]; break; @@ -159,24 +173,7 @@ pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t *self, return PWMOUT_INVALID_PIN; } - CLOCK_SetDiv(kCLOCK_AhbDiv, 0x2); /* Set AHB PODF to 2, divide by 3 */ - CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); /* Set IPG PODF to 3, divede by 4 */ - -// TODO re-enable -// IOMUXC_SetPinMux( -// IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, /* GPIO_02 is configured as FLEXPWM1_PWM0_A */ -// 0U); /* Software Input On Field: Input Path is determined by functionality */ -// -// IOMUXC_SetPinConfig( -// IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, /* GPIO_02 PAD functional properties : */ -// 0x10A0U); /* Slew Rate Field: Slow Slew Rate -// Drive Strength Field: R0/4 -// Speed Field: fast(150MHz) -// Open Drain Enable Field: Open Drain Disabled -// Pull / Keep Enable Field: Pull/Keeper Enabled -// Pull / Keep Select Field: Keeper -// Pull Up / Down Config. Field: 100K Ohm Pull Down -// Hyst. Enable Field: Hysteresis Disabled */ + config_periph_pin(self->pwm); pwm_config_t pwmConfig; @@ -199,166 +196,39 @@ pwmout_result_t common_hal_pwmio_pwmout_construct(pwmio_pwmout_obj_t *self, // pwmConfig.reloadLogic = kPWM_ReloadPwmFullCycle; pwmConfig.enableDebugMode = true; - if (PWM_Init(PWM1, self->pwm->submodule, &pwmConfig) == kStatus_Fail) { - printf("PWM initialization failed\r\n"); + if (PWM_Init(self->pwm->pwm, self->pwm->submodule, &pwmConfig) == kStatus_Fail) { return PWMOUT_INVALID_PIN; } - pwm_signal_param_t pwmSignal; + if (frequency == 0 || frequency > PWM_SRC_CLK_FREQ/2) { + return PWMOUT_INVALID_FREQUENCY; + } - /* Set deadtime count, we set this to about 650ns */ - uint16_t deadTimeVal = ((uint64_t)PWM_SRC_CLK_FREQ * 650) / 1000000000; + if (PWM_SRC_CLK_FREQ / frequency >= 65536) { + return PWMOUT_INVALID_FREQUENCY; + } - pwmSignal.pwmChannel = self->pwm->channel; - pwmSignal.level = kPWM_HighTrue; - pwmSignal.dutyCyclePercent = frequency / 2; /* 1 percent dutycycle */ - pwmSignal.deadtimeValue = deadTimeVal; + pwm_signal_param_t pwmSignal = { + .pwmChannel = self->pwm->channel, + .level = kPWM_HighTrue, + .dutyCyclePercent = 0, // avoid an initial transient + .deadtimeValue = 0, // allow 100% duty cycle + }; - PWM_SetupPwm(PWM1, self->pwm->submodule, &pwmSignal, 1, kPWM_SignedCenterAligned, frequency, PWM_SRC_CLK_FREQ); + // Disable all fault inputs + self->pwm->pwm->SM[self->pwm->submodule].DISMAP[0] = 0; + self->pwm->pwm->SM[self->pwm->submodule].DISMAP[1] = 0; - PWM_SetPwmLdok(PWM1, kPWM_Control_Module_0 | kPWM_Control_Module_1 | kPWM_Control_Module_2, true); + status_t status = PWM_SetupPwm(self->pwm->pwm, self->pwm->submodule, &pwmSignal, 1, kPWM_EdgeAligned, frequency, PWM_SRC_CLK_FREQ); - PWM_StartTimer(PWM1, kPWM_Control_Module_0 | kPWM_Control_Module_1 | kPWM_Control_Module_2); + if (status != kStatus_Success) { + return PWMOUT_INITIALIZATION_ERROR; + } + PWM_SetPwmLdok(self->pwm->pwm, 1 << self->pwm->submodule, true); -// if (frequency == 0 || frequency > 6000000) { -// return PWMOUT_INVALID_FREQUENCY; -// } + PWM_StartTimer(self->pwm->pwm, 1 << self->pwm->submodule); -// // Figure out which timer we are using. -// // First see if a tcc is already going with the frequency we want and our -// // channel is unused. tc's don't have enough channels to share. -// const pin_timer_t* timer = NULL; -// uint8_t mux_position = 0; -// if (!variable_frequency) { -// for (uint8_t i = 0; i < TCC_INST_NUM && timer == NULL; i++) { -// if (target_tcc_frequencies[i] != frequency) { -// continue; -// } -// for (uint8_t j = 0; j < NUM_TIMERS_PER_PIN && timer == NULL; j++) { -// const pin_timer_t* t = &pin->timer[j]; -// if (t->index != i || t->is_tc || t->index >= TCC_INST_NUM) { -// continue; -// } -// Tcc* tcc = tcc_insts[t->index]; -// if (tcc->CTRLA.bit.ENABLE == 1 && channel_ok(t)) { -// timer = t; -// mux_position = j; -// // Claim channel. -// tcc_channels[timer->index] |= (1 << tcc_channel(timer)); -// -// } -// } -// } -// } -// -// // No existing timer has been found, so find a new one to use and set it up. -// if (timer == NULL) { -// // By default, with fixed frequency we want to share a TCC because its likely we'll have -// // other outputs at the same frequency. If the frequency is variable then we'll only have -// // one output so we start with the TCs to see if they work. -// int8_t direction = -1; -// uint8_t start = NUM_TIMERS_PER_PIN - 1; -// bool found = false; -// if (variable_frequency) { -// direction = 1; -// start = 0; -// } -// for (int8_t i = start; i >= 0 && i < NUM_TIMERS_PER_PIN && timer == NULL; i += direction) { -// const pin_timer_t* t = &pin->timer[i]; -// if ((!t->is_tc && t->index >= TCC_INST_NUM) || -// (t->is_tc && t->index >= TC_INST_NUM)) { -// continue; -// } -// if (t->is_tc) { -// found = true; -// Tc* tc = tc_insts[t->index]; -// if (tc->COUNT16.CTRLA.bit.ENABLE == 0 && t->wave_output == 1) { -// timer = t; -// mux_position = i; -// } -// } else { -// Tcc* tcc = tcc_insts[t->index]; -// if (tcc->CTRLA.bit.ENABLE == 0 && channel_ok(t)) { -// timer = t; -// mux_position = i; -// } -// } -// } -// -// if (timer == NULL) { -// if (found) { -// return PWMOUT_ALL_TIMERS_ON_PIN_IN_USE; -// } -// return PWMOUT_ALL_TIMERS_IN_USE; -// } -// -// uint8_t resolution = 0; -// if (timer->is_tc) { -// resolution = 16; -// } else { -// // TCC resolution varies so look it up. -// const uint8_t _tcc_sizes[TCC_INST_NUM] = TCC_SIZES; -// resolution = _tcc_sizes[timer->index]; -// } -// // First determine the divisor that gets us the highest resolution. -// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); -// uint32_t top; -// uint8_t divisor; -// for (divisor = 0; divisor < 8; divisor++) { -// top = (system_clock / prescaler[divisor] / frequency) - 1; -// if (top < (1u << resolution)) { -// break; -// } -// } -// -// set_timer_handler(timer->is_tc, timer->index, TC_HANDLER_NO_INTERRUPT); -// // We use the zeroeth clock on either port to go full speed. -// turn_on_clocks(timer->is_tc, timer->index, 0); -// -// if (timer->is_tc) { -// tc_periods[timer->index] = top; -// Tc* tc = tc_insts[timer->index]; -// #ifdef SAMD21 -// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | -// TC_CTRLA_PRESCALER(divisor) | -// TC_CTRLA_WAVEGEN_MPWM; -// tc->COUNT16.CC[0].reg = top; -// #endif -// #ifdef SAMD51 -// -// tc->COUNT16.CTRLA.bit.SWRST = 1; -// while (tc->COUNT16.CTRLA.bit.SWRST == 1) { -// } -// tc_set_enable(tc, false); -// tc->COUNT16.CTRLA.reg = TC_CTRLA_MODE_COUNT16 | TC_CTRLA_PRESCALER(divisor); -// tc->COUNT16.WAVE.reg = TC_WAVE_WAVEGEN_MPWM; -// tc->COUNT16.CCBUF[0].reg = top; -// tc->COUNT16.CCBUF[1].reg = 0; -// #endif -// -// tc_set_enable(tc, true); -// } else { -// tcc_periods[timer->index] = top; -// Tcc* tcc = tcc_insts[timer->index]; -// tcc_set_enable(tcc, false); -// tcc->CTRLA.bit.PRESCALER = divisor; -// tcc->PER.bit.PER = top; -// tcc->WAVE.bit.WAVEGEN = TCC_WAVE_WAVEGEN_NPWM_Val; -// tcc_set_enable(tcc, true); -// target_tcc_frequencies[timer->index] = frequency; -// tcc_refcount[timer->index]++; -// if (variable_frequency) { -// // We're changing frequency so claim all of the channels. -// tcc_channels[timer->index] = 0xff; -// } else { -// tcc_channels[timer->index] |= (1 << tcc_channel(timer)); -// } -// } -// } -// -// self->timer = timer; -// -// gpio_set_pin_function(pin->number, GPIO_PIN_FUNCTION_E + mux_position); + self->pulse_count = PWM_SRC_CLK_FREQ/frequency; common_hal_pwmio_pwmout_set_duty_cycle(self, duty); @@ -374,177 +244,54 @@ void common_hal_pwmio_pwmout_deinit(pwmio_pwmout_obj_t *self) { return; } -// const pin_timer_t* t = self->timer; -// if (t->is_tc) { -// Tc* tc = tc_insts[t->index]; -// tc_set_enable(tc, false); -// tc->COUNT16.CTRLA.bit.SWRST = true; -// tc_wait_for_sync(tc); -// } else { -// tcc_refcount[t->index]--; -// tcc_channels[t->index] &= ~(1 << tcc_channel(t)); -// if (tcc_refcount[t->index] == 0) { -// target_tcc_frequencies[t->index] = 0; -// Tcc* tcc = tcc_insts[t->index]; -// tcc_set_enable(tcc, false); -// tcc->CTRLA.bit.SWRST = true; -// while (tcc->SYNCBUSY.bit.SWRST != 0) { -// /* Wait for sync */ -// } -// } -// } -// reset_pin_number(self->pin->number); + common_hal_reset_pin(self->pin); self->pin = NULL; } void common_hal_pwmio_pwmout_set_duty_cycle(pwmio_pwmout_obj_t *self, uint16_t duty) { - PWM_UpdatePwmDutycycle(PWM1, self->pwm->submodule, self->pwm->channel, kPWM_SignedCenterAligned, duty); - -// const pin_timer_t* t = self->timer; -// if (t->is_tc) { -// uint16_t adjusted_duty = tc_periods[t->index] * duty / 0xffff; -// #ifdef SAMD21 -// tc_insts[t->index]->COUNT16.CC[t->wave_output].reg = adjusted_duty; -// #endif -// #ifdef SAMD51 -// Tc* tc = tc_insts[t->index]; -// while (tc->COUNT16.SYNCBUSY.bit.CC1 != 0) {} -// tc->COUNT16.CCBUF[1].reg = adjusted_duty; -// #endif -// } else { -// uint32_t adjusted_duty = ((uint64_t) tcc_periods[t->index]) * duty / 0xffff; -// uint8_t channel = tcc_channel(t); -// Tcc* tcc = tcc_insts[t->index]; -// -// // Write into the CC buffer register, which will be transferred to the -// // CC register on an UPDATE (when period is finished). -// // Do clock domain syncing as necessary. -// -// while (tcc->SYNCBUSY.reg != 0) {} -// -// // Lock out double-buffering while updating the CCB value. -// tcc->CTRLBSET.bit.LUPD = 1; -// #ifdef SAMD21 -// tcc->CCB[channel].reg = adjusted_duty; -// #endif -// #ifdef SAMD51 -// tcc->CCBUF[channel].reg = adjusted_duty; -// #endif -// tcc->CTRLBCLR.bit.LUPD = 1; -// } + // we do not use PWM_UpdatePwmDutycycle because ... + // * it works in integer percents + // * it can't set the "X" duty cycle + self->duty_cycle = duty; + self->duty_scaled = ((uint32_t)duty * self->pulse_count + self->pulse_count/2) / 65535; + switch (self->pwm->channel) { + case kPWM_PwmX: + self->pwm->pwm->SM[self->pwm->submodule].VAL0 = 0; + self->pwm->pwm->SM[self->pwm->submodule].VAL1 = self->duty_scaled; + break; + case kPWM_PwmA: + self->pwm->pwm->SM[self->pwm->submodule].VAL2 = 0; + self->pwm->pwm->SM[self->pwm->submodule].VAL3 = self->duty_scaled; + break; + case kPWM_PwmB: + self->pwm->pwm->SM[self->pwm->submodule].VAL4 = 0; + self->pwm->pwm->SM[self->pwm->submodule].VAL5 = self->duty_scaled; + } + PWM_SetPwmLdok(self->pwm->pwm, 1 << self->pwm->submodule, true); } uint16_t common_hal_pwmio_pwmout_get_duty_cycle(pwmio_pwmout_obj_t *self) { - return 0; -// const pin_timer_t* t = self->timer; -// if (t->is_tc) { -// Tc* tc = tc_insts[t->index]; -// tc_wait_for_sync(tc); -// uint16_t cv = tc->COUNT16.CC[t->wave_output].reg; -// return cv * 0xffff / tc_periods[t->index]; -// } else { -// Tcc* tcc = tcc_insts[t->index]; -// uint8_t channel = tcc_channel(t); -// uint32_t cv = 0; -// -// while (tcc->SYNCBUSY.bit.CTRLB) {} -// -// #ifdef SAMD21 -// // If CCBV (CCB valid) is set, the CCB value hasn't yet been copied -// // to the CC value. -// if ((tcc->STATUS.vec.CCBV & (1 << channel)) != 0) { -// cv = tcc->CCB[channel].reg; -// } else { -// cv = tcc->CC[channel].reg; -// } -// #endif -// #ifdef SAMD51 -// if ((tcc->STATUS.vec.CCBUFV & (1 << channel)) != 0) { -// cv = tcc->CCBUF[channel].reg; -// } else { -// cv = tcc->CC[channel].reg; -// } -// #endif -// -// uint32_t duty_cycle = ((uint64_t) cv) * 0xffff / tcc_periods[t->index]; -// -// return duty_cycle; -// } + return ((uint32_t)self->duty_scaled * 65535 + 65535/2) / self->pulse_count; } void common_hal_pwmio_pwmout_set_frequency(pwmio_pwmout_obj_t *self, uint32_t frequency) { -// if (frequency == 0 || frequency > 6000000) { -// mp_raise_ValueError(translate("Invalid PWM frequency")); -// } -// const pin_timer_t* t = self->timer; -// uint8_t resolution; -// if (t->is_tc) { -// resolution = 16; -// } else { -// resolution = 24; -// } -// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); -// uint32_t new_top; -// uint8_t new_divisor; -// for (new_divisor = 0; new_divisor < 8; new_divisor++) { -// new_top = (system_clock / prescaler[new_divisor] / frequency) - 1; -// if (new_top < (1u << resolution)) { -// break; -// } -// } -// uint16_t old_duty = common_hal_pwmio_pwmout_get_duty_cycle(self); -// if (t->is_tc) { -// Tc* tc = tc_insts[t->index]; -// uint8_t old_divisor = tc->COUNT16.CTRLA.bit.PRESCALER; -// if (new_divisor != old_divisor) { -// tc_set_enable(tc, false); -// tc->COUNT16.CTRLA.bit.PRESCALER = new_divisor; -// tc_set_enable(tc, true); -// } -// tc_periods[t->index] = new_top; -// #ifdef SAMD21 -// tc->COUNT16.CC[0].reg = new_top; -// #endif -// #ifdef SAMD51 -// while (tc->COUNT16.SYNCBUSY.reg != 0) {} -// tc->COUNT16.CCBUF[0].reg = new_top; -// #endif -// } else { -// Tcc* tcc = tcc_insts[t->index]; -// uint8_t old_divisor = tcc->CTRLA.bit.PRESCALER; -// if (new_divisor != old_divisor) { -// tcc_set_enable(tcc, false); -// tcc->CTRLA.bit.PRESCALER = new_divisor; -// tcc_set_enable(tcc, true); -// } -// while (tcc->SYNCBUSY.reg != 0) {} -// tcc_periods[t->index] = new_top; -// #ifdef SAMD21 -// tcc->PERB.bit.PERB = new_top; -// #endif -// #ifdef SAMD51 -// tcc->PERBUF.bit.PERBUF = new_top; -// #endif -// } -// common_hal_pwmio_pwmout_set_duty_cycle(self, old_duty); + if (frequency > PWM_SRC_CLK_FREQ/2) { + mp_raise_ValueError(translate("Invalid PWM frequency")); + } + + if (PWM_SRC_CLK_FREQ / frequency >= 65536) { + mp_raise_ValueError(translate("Invalid PWM frequency")); + } + + self->pulse_count = PWM_SRC_CLK_FREQ/frequency; + self->pwm->pwm->SM[self->pwm->submodule].VAL1 = self->pulse_count; + common_hal_pwmio_pwmout_set_duty_cycle(self, self->duty_cycle); } uint32_t common_hal_pwmio_pwmout_get_frequency(pwmio_pwmout_obj_t *self) { -// uint32_t system_clock = common_hal_mcu_processor_get_frequency(); -// const pin_timer_t* t = self->timer; -// uint8_t divisor; -// uint32_t top; -// if (t->is_tc) { -// divisor = tc_insts[t->index]->COUNT16.CTRLA.bit.PRESCALER; -// top = tc_periods[t->index]; -// } else { -// divisor = tcc_insts[t->index]->CTRLA.bit.PRESCALER; -// top = tcc_periods[t->index]; -// } -// return (system_clock / prescaler[divisor]) / (top + 1); - return 0; + return PWM_SRC_CLK_FREQ/self->pulse_count; } bool common_hal_pwmio_pwmout_get_variable_frequency(pwmio_pwmout_obj_t *self) { diff --git a/ports/mimxrt10xx/common-hal/pwmio/PWMOut.h b/ports/mimxrt10xx/common-hal/pwmio/PWMOut.h index d3954de401..0031297bd2 100644 --- a/ports/mimxrt10xx/common-hal/pwmio/PWMOut.h +++ b/ports/mimxrt10xx/common-hal/pwmio/PWMOut.h @@ -37,6 +37,7 @@ typedef struct { const mcu_pin_obj_t *pin; const mcu_pwm_obj_t *pwm; bool variable_frequency; + uint16_t duty_cycle, duty_scaled, pulse_count; } pwmio_pwmout_obj_t; void pwmout_reset(void); diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c index 66dc56e4e0..bdf3299217 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1011/periph.c @@ -134,35 +134,35 @@ const mcu_periph_obj_t mcu_uart_cts_list[4] = { }; const mcu_pwm_obj_t mcu_pwm_list[20] = { - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_02), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_SD_02), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, IOMUXC_GPIO_02_FLEXPWM1_PWM0_A, &pin_GPIO_02), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, IOMUXC_GPIO_SD_02_FLEXPWM1_PWM0_A, &pin_GPIO_SD_02), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_01), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_SD_01), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, IOMUXC_GPIO_01_FLEXPWM1_PWM0_B, &pin_GPIO_01), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, IOMUXC_GPIO_SD_01_FLEXPWM1_PWM0_B, &pin_GPIO_SD_01), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 1, &pin_GPIO_AD_12), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, IOMUXC_GPIO_AD_12_FLEXPWM1_PWM0_X, &pin_GPIO_AD_12), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_04), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_SD_04), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, IOMUXC_GPIO_04_FLEXPWM1_PWM1_A, &pin_GPIO_04), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, IOMUXC_GPIO_SD_04_FLEXPWM1_PWM1_A, &pin_GPIO_SD_04), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_03), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_SD_03), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, IOMUXC_GPIO_03_FLEXPWM1_PWM1_B, &pin_GPIO_03), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, IOMUXC_GPIO_SD_03_FLEXPWM1_PWM1_B, &pin_GPIO_SD_03), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 1, &pin_GPIO_AD_11), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, IOMUXC_GPIO_AD_11_FLEXPWM1_PWM1_X, &pin_GPIO_AD_11), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_06), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_AD_04), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, IOMUXC_GPIO_06_FLEXPWM1_PWM2_A, &pin_GPIO_06), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, IOMUXC_GPIO_AD_04_FLEXPWM1_PWM2_A, &pin_GPIO_AD_04), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_05), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_AD_03), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, IOMUXC_GPIO_05_FLEXPWM1_PWM2_B, &pin_GPIO_05), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, IOMUXC_GPIO_AD_03_FLEXPWM1_PWM2_B, &pin_GPIO_AD_03), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 1, &pin_GPIO_AD_10), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, IOMUXC_GPIO_AD_10_FLEXPWM1_PWM2_X, &pin_GPIO_AD_10), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_08), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_AD_06), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, IOMUXC_GPIO_08_FLEXPWM1_PWM3_A, &pin_GPIO_08), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, IOMUXC_GPIO_AD_06_FLEXPWM1_PWM3_A, &pin_GPIO_AD_06), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_07), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_AD_05), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, IOMUXC_GPIO_07_FLEXPWM1_PWM3_B, &pin_GPIO_07), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, IOMUXC_GPIO_AD_05_FLEXPWM1_PWM3_B, &pin_GPIO_AD_05), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmX, 1, &pin_GPIO_AD_09), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmX, IOMUXC_GPIO_AD_09_FLEXPWM1_PWM3_X, &pin_GPIO_AD_09), }; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c index 754ef01c39..2666b5a631 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1021/periph.c @@ -199,60 +199,60 @@ const mcu_periph_obj_t mcu_uart_cts_list[10] = { }; const mcu_pwm_obj_t mcu_pwm_list[39] = { - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_26), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_AD_B1_06), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, 1, &pin_GPIO_EMC_26), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, 0, &pin_GPIO_AD_B1_06), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_24), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_AD_B1_08), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, 1, &pin_GPIO_EMC_24), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, 0, &pin_GPIO_AD_B1_08), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_22), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_AD_B1_10), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, 1, &pin_GPIO_EMC_22), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, 0, &pin_GPIO_AD_B1_10), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_20), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_AD_B1_12), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, 1, &pin_GPIO_EMC_20), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 6, 0, &pin_GPIO_AD_B1_12), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_27), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_AD_B1_07), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, 1, &pin_GPIO_EMC_27), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, 0, &pin_GPIO_AD_B1_07), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_25), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_AD_B1_09), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, 1, &pin_GPIO_EMC_25), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, 0, &pin_GPIO_AD_B1_09), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_23), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_AD_B1_11), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, 1, &pin_GPIO_EMC_23), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, 0, &pin_GPIO_AD_B1_11), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_21), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_AD_B1_13), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, 1, &pin_GPIO_EMC_21), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 6, 0, &pin_GPIO_AD_B1_13), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 7, &pin_GPIO_EMC_28), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 7, &pin_GPIO_EMC_29), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 7, &pin_GPIO_EMC_30), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 7, 1, &pin_GPIO_EMC_28), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 7, 1, &pin_GPIO_EMC_29), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 7, 1, &pin_GPIO_EMC_30), - PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_38), - PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 4, &pin_GPIO_AD_B0_14), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 1, 1, &pin_GPIO_EMC_38), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 4, 0, &pin_GPIO_AD_B0_14), - PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_36), - PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 4, &pin_GPIO_AD_B0_12), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 1, 1, &pin_GPIO_EMC_36), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 4, 0, &pin_GPIO_AD_B0_12), - PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_30), - PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 4, &pin_GPIO_AD_B0_10), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 1, 1, &pin_GPIO_EMC_30), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 4, 0, &pin_GPIO_AD_B0_10), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_28), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 4, &pin_GPIO_AD_B0_06), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, 1, &pin_GPIO_EMC_28), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 4, 0, &pin_GPIO_AD_B0_06), - PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_39), - PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 4, &pin_GPIO_AD_B0_15), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 1, 1, &pin_GPIO_EMC_39), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 4, 0, &pin_GPIO_AD_B0_15), - PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_37), - PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 4, &pin_GPIO_AD_B0_13), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 1, 1, &pin_GPIO_EMC_37), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 4, 0, &pin_GPIO_AD_B0_13), - PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_31), - PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 4, &pin_GPIO_AD_B0_11), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 1, 1, &pin_GPIO_EMC_31), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 4, 0, &pin_GPIO_AD_B0_11), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_29), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 4, &pin_GPIO_AD_B0_07), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 1, 1, &pin_GPIO_EMC_29), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 4, 0, &pin_GPIO_AD_B0_07), - PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmX, 6, &pin_GPIO_EMC_10), - PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmX, 6, &pin_GPIO_EMC_11), - PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmX, 6, &pin_GPIO_EMC_12), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmX, 6, &pin_GPIO_EMC_13), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmX, 6, 0, &pin_GPIO_EMC_10), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmX, 6, 0, &pin_GPIO_EMC_11), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmX, 6, 0, &pin_GPIO_EMC_12), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmX, 6, 0, &pin_GPIO_EMC_13), }; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c index e1c6968fcf..2bfc51bd88 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/MIMXRT1062/periph.c @@ -202,107 +202,107 @@ const mcu_periph_obj_t mcu_uart_cts_list[9] = { }; const mcu_pwm_obj_t mcu_pwm_list[67] = { - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_23), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_SD_B0_00), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_23), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmA, 1, 1, &pin_GPIO_SD_B0_00), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_24), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_SD_B0_01), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_24), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmB, 1, 1, &pin_GPIO_SD_B0_01), - PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 4, &pin_GPIO_AD_B0_02), + PWM_PIN(PWM1, kPWM_Module_0, kPWM_PwmX, 4, 0, &pin_GPIO_AD_B0_02), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_25), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_SD_B0_02), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_25), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmA, 1, 1, &pin_GPIO_SD_B0_02), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_26), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_SD_B0_03), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_26), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmB, 1, 1, &pin_GPIO_SD_B0_03), - PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 4, &pin_GPIO_AD_B0_03), + PWM_PIN(PWM1, kPWM_Module_1, kPWM_PwmX, 4, 0, &pin_GPIO_AD_B0_03), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_27), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_SD_B0_04), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_27), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmA, 1, 1, &pin_GPIO_SD_B0_04), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_28), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_SD_B0_05), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_28), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmB, 1, 1, &pin_GPIO_SD_B0_05), - PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 4, &pin_GPIO_AD_B0_12), + PWM_PIN(PWM1, kPWM_Module_2, kPWM_PwmX, 4, 0, &pin_GPIO_AD_B0_12), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_AD_B0_10), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_38), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_SD_B1_00), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 4, &pin_GPIO_EMC_12), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_B1_00), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, 3, &pin_GPIO_AD_B0_10), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 1, 2, &pin_GPIO_EMC_38), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 2, 0, &pin_GPIO_SD_B1_00), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 4, 1, &pin_GPIO_EMC_12), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmA, 6, 4, &pin_GPIO_B1_00), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_AD_B0_11), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_39), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_SD_B1_01), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 4, &pin_GPIO_EMC_13), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_B1_01), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, 3, &pin_GPIO_AD_B0_11), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 1, 2, &pin_GPIO_EMC_39), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 2, 0, &pin_GPIO_SD_B1_01), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 4, 1, &pin_GPIO_EMC_13), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmB, 6, 4, &pin_GPIO_B1_01), - PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmX, 4, &pin_GPIO_AD_B0_13), + PWM_PIN(PWM1, kPWM_Module_3, kPWM_PwmX, 4, 0, &pin_GPIO_AD_B0_13), - PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_06), - PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 2, &pin_GPIO_B0_06), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_06), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmA, 2, 1, &pin_GPIO_B0_06), - PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_07), - PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 2, &pin_GPIO_B0_07), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_07), + PWM_PIN(PWM2, kPWM_Module_0, kPWM_PwmB, 2, 1, &pin_GPIO_B0_07), - PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_08), - PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 2, &pin_GPIO_B0_08), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_08), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmA, 2, 1, &pin_GPIO_B0_08), - PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_09), - PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 2, &pin_GPIO_B0_09), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_09), + PWM_PIN(PWM2, kPWM_Module_1, kPWM_PwmB, 2, 1, &pin_GPIO_B0_09), - PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_10), - PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 2, &pin_GPIO_B0_10), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_10), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmA, 2, 1, &pin_GPIO_B0_10), - PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_11), - PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 2, &pin_GPIO_B0_11), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_11), + PWM_PIN(PWM2, kPWM_Module_2, kPWM_PwmB, 2, 1, &pin_GPIO_B0_11), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 0, &pin_GPIO_AD_B0_00), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_AD_B0_09), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_19), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 2, &pin_GPIO_SD_B1_02), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 6, &pin_GPIO_B1_02), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 0, 2, &pin_GPIO_AD_B0_00), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, 3, &pin_GPIO_AD_B0_09), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 1, 1, &pin_GPIO_EMC_19), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 2, 0, &pin_GPIO_SD_B1_02), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmA, 6, 4, &pin_GPIO_B1_02), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 0, &pin_GPIO_AD_B0_01), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_20), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 2, &pin_GPIO_SD_B1_03), - PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 6, &pin_GPIO_B1_03), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 0, 2, &pin_GPIO_AD_B0_01), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 1, 1, &pin_GPIO_EMC_20), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 2, 0, &pin_GPIO_SD_B1_03), + PWM_PIN(PWM2, kPWM_Module_3, kPWM_PwmB, 6, 3, &pin_GPIO_B1_03), - PWM_PIN(PWM3, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_29), + PWM_PIN(PWM3, kPWM_Module_0, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_29), - PWM_PIN(PWM3, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_30), + PWM_PIN(PWM3, kPWM_Module_0, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_30), - PWM_PIN(PWM3, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_31), + PWM_PIN(PWM3, kPWM_Module_1, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_31), - PWM_PIN(PWM3, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_32), + PWM_PIN(PWM3, kPWM_Module_1, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_32), - PWM_PIN(PWM3, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_33), + PWM_PIN(PWM3, kPWM_Module_2, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_33), - PWM_PIN(PWM3, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_34), + PWM_PIN(PWM3, kPWM_Module_2, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_34), - PWM_PIN(PWM3, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_21), + PWM_PIN(PWM3, kPWM_Module_3, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_21), - PWM_PIN(PWM3, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_22), + PWM_PIN(PWM3, kPWM_Module_3, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_22), - PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_AD_B1_08), - PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmA, 1, &pin_GPIO_EMC_00), + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmA, 1, 1, &pin_GPIO_AD_B1_08), + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_00), - PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmB, 1, &pin_GPIO_EMC_01), + PWM_PIN(PWM4, kPWM_Module_0, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_01), - PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_AD_B1_09), - PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmA, 1, &pin_GPIO_EMC_02), + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmA, 1, 1, &pin_GPIO_AD_B1_09), + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_02), - PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmB, 1, &pin_GPIO_EMC_03), + PWM_PIN(PWM4, kPWM_Module_1, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_03), - PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_B1_14), - PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmA, 1, &pin_GPIO_EMC_04), + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmA, 1, 1, &pin_GPIO_B1_14), + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_04), - PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmB, 1, &pin_GPIO_EMC_05), + PWM_PIN(PWM4, kPWM_Module_2, kPWM_PwmB, 1, 0, &pin_GPIO_EMC_05), - PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_B1_15), - PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmA, 1, &pin_GPIO_EMC_17), + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmA, 1, 1, &pin_GPIO_B1_15), + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmA, 1, 0, &pin_GPIO_EMC_17), - PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmB, 1, &pin_GPIO_EMC_18), + PWM_PIN(PWM4, kPWM_Module_3, kPWM_PwmB, 1, 1, &pin_GPIO_EMC_18), }; diff --git a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h index ab0ebf0454..1b808b0b18 100644 --- a/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h +++ b/ports/mimxrt10xx/peripherals/mimxrt10xx/periph.h @@ -49,18 +49,26 @@ typedef struct { typedef struct { PWM_Type *pwm; - pwm_submodule_t submodule : 4; - pwm_channels_t channel : 4; + pwm_submodule_t submodule:4; + pwm_channels_t channel:4; uint8_t mux_mode; + uint8_t input_idx; + uint32_t input_reg; const mcu_pin_obj_t *pin; } mcu_pwm_obj_t; -#define PWM_PIN(p_pwm, p_submodule, p_channel, p_mux_mode, p_pin) \ +#define PWM_PIN(p_pwm, p_submodule, p_channel, p_iomuxc, p_pin) \ + PWM_PIN_(p_pwm, p_submodule, p_channel, p_iomuxc, p_pin) + //----------------------------------------------------------// + // supplied by the expansion of p_iomuxc into multiple args // +#define PWM_PIN_(p_pwm, p_submodule, p_channel, p_mux_reg, p_mux_mode, p_input_reg, p_input_idx, p_config_reg, p_pin)\ { \ .pwm = p_pwm, \ .submodule = p_submodule, \ .channel = p_channel, \ .mux_mode = p_mux_mode, \ + .input_reg = p_input_reg, \ + .input_idx = p_input_idx, \ .pin = p_pin, \ }