Add GDB debugging capability

ports/esp32s2/Makefile

@@ -116,7 +116,7 @@ CFLAGS += $(OPTIMIZATION_FLAGS)
 
 CFLAGS += $(INC) -Werror -Wall -mlongcalls -std=gnu11 -Wl,--gc-sections $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
 
-LDFLAGS = $(CFLAGS) -Wl,-nostdlib  -Wl,-Map=$@.map -Wl,-cref
+LDFLAGS = $(CFLAGS) -Wl,-nostdlib  -Wl,-Map=$@.map -Wl,-cref -Wl,--undefined=uxTopUsedPriority
 LDFLAGS += -L$(BUILD)/esp-idf/esp-idf/esp32s2 \
            -Tesp32s2_out.ld \
            -L$(BUILD)/esp-idf/esp-idf/esp32s2/ld \

ports/esp32s2/boards/esp32s2-saola-1.cfg

@@ -0,0 +1,41 @@
+# The ESP32-S2 only supports JTAG.
+transport select jtag
+adapter_khz 1000
+
+# Source the ESP common configuration file
+source [find target/esp_common.cfg]
+
+if { [info exists CHIPNAME] } {
+    set _CHIPNAME $CHIPNAME
+} else {
+    set _CHIPNAME esp32s2
+}
+
+if { [info exists CPUTAPID] } {
+    set _CPUTAPID $CPUTAPID
+} else {
+    set _CPUTAPID 0x120034e5
+}
+
+set _TARGETNAME $_CHIPNAME
+set _CPUNAME cpu
+set _TAPNAME $_CHIPNAME.$_CPUNAME
+
+jtag newtap $_CHIPNAME $_CPUNAME -irlen 5 -expected-id $_CPUTAPID
+
+if { $_RTOS == "none" } {
+    target create $_TARGETNAME esp32s2 -endian little -chain-position $_TAPNAME
+} else {
+    target create $_TARGETNAME esp32s2 -endian little -chain-position $_TAPNAME -rtos $_RTOS
+}
+
+configure_esp_workarea $_TARGETNAME 0x40030000 0x3400 0x3FFE0000 0x6000
+configure_esp_flash_bank $_TARGETNAME $_TARGETNAME $_FLASH_SIZE
+
+xtensa maskisr on
+if { $_SEMIHOST_BASEDIR != "" } {
+    esp semihost_basedir $_SEMIHOST_BASEDIR
+}
+if { $_FLASH_SIZE == 0 } {
+    gdb_breakpoint_override hard
+}