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stm32/powerctrl: On H7, re-enable disabled OSCs/PLLs on exit from STOP.

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This commit saves OSCs/PLLs state before STOP mode and restores them on
exit.  Some boards use HSI48 for USB for example, others have PLL2/3
enabled, etc.
This commit is contained in:
iabdalkader 2020-12-02 23:33:56 +02:00 committed by Damien George
parent 3e5dd2dbcc
commit 463a275bc4
1 changed files with 36 additions and 3 deletions
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39
ports/stm32/powerctrl.c
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@ -517,6 +517,9 @@ void powerctrl_enter_stop_mode(void) {
#endif
#if defined(STM32H7)
// Save RCC CR to re-enable OSCs and PLLs after wake up from low power mode.
uint32_t rcc_cr = RCC->CR;
// Save the current voltage scaling level to restore after exiting low power mode.
uint32_t vscaling = POWERCTRL_GET_VOLTAGE_SCALING();
@ -607,9 +610,39 @@ void powerctrl_enter_stop_mode(void) {
#endif
#if defined(STM32H7)
// Enable PLL3 for USB
RCC->CR |= RCC_CR_PLL3ON;
while (!(RCC->CR & RCC_CR_PLL3RDY)) {
// Enable HSI
if (rcc_cr & RCC_CR_HSION) {
RCC->CR |= RCC_CR_HSION;
while (!(RCC->CR & RCC_CR_HSIRDY)) {
}
}
// Enable CSI
if (rcc_cr & RCC_CR_CSION) {
RCC->CR |= RCC_CR_CSION;
while (!(RCC->CR & RCC_CR_CSIRDY)) {
}
}
// Enable HSI48
if (rcc_cr & RCC_CR_HSI48ON) {
RCC->CR |= RCC_CR_HSI48ON;
while (!(RCC->CR & RCC_CR_HSI48RDY)) {
}
}
// Enable PLL2
if (rcc_cr & RCC_CR_PLL2ON) {
RCC->CR |= RCC_CR_PLL2ON;
while (!(RCC->CR & RCC_CR_PLL2RDY)) {
}
}
// Enable PLL3
if (rcc_cr & RCC_CR_PLL3ON) {
RCC->CR |= RCC_CR_PLL3ON;
while (!(RCC->CR & RCC_CR_PLL3RDY)) {
}
}
#endif