From 4548928449c63f72fce5917c683664bf3ca0501f Mon Sep 17 00:00:00 2001 From: Angus Gratton Date: Thu, 2 Feb 2023 10:11:06 +1100 Subject: [PATCH] stm32/boards/B_L072Z_LRWAN1: Lower default ROM level to "Core". Re-enable some features required for the board to still build and the lora driver to run. This board only has 192KB of flash total, so default stm32 build is very close to the limit. Before: LINK build-B_L072Z_LRWAN1/firmware.elf text data bss dec hex filename 184352 68 14112 198532 30784 build-B_L072Z_LRWAN1/firmware.elf (12256 bytes free) After: LINK build-B_L072Z_LRWAN1/firmware.elf text data bss dec hex filename 155028 68 14052 169148 294bc build-B_L072Z_LRWAN1/firmware.elf (41580 bytes free) This work was funded through GitHub Sponsors. Signed-off-by: Angus Gratton --- ports/stm32/boards/B_L072Z_LRWAN1/mpconfigboard.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/ports/stm32/boards/B_L072Z_LRWAN1/mpconfigboard.h b/ports/stm32/boards/B_L072Z_LRWAN1/mpconfigboard.h index 375b971786..c2a0ba4f44 100644 --- a/ports/stm32/boards/B_L072Z_LRWAN1/mpconfigboard.h +++ b/ports/stm32/boards/B_L072Z_LRWAN1/mpconfigboard.h @@ -5,8 +5,13 @@ #define MICROPY_HW_BOARD_NAME "B-L072Z-LRWAN1" #define MICROPY_HW_MCU_NAME "STM32L072CZ" +#define MICROPY_CONFIG_ROM_LEVEL (MICROPY_CONFIG_ROM_LEVEL_CORE_FEATURES) + +#define MICROPY_HELPER_REPL (1) +#define MICROPY_KBD_EXCEPTION (1) #define MICROPY_EMIT_THUMB (0) #define MICROPY_EMIT_INLINE_THUMB (0) +#define MICROPY_ENABLE_SCHEDULER (1) #define MICROPY_OPT_COMPUTED_GOTO (0) #define MICROPY_PY_BUILTINS_COMPLEX (0) #define MICROPY_PY_GENERATOR_PEND_THROW (0) @@ -18,6 +23,8 @@ #define MICROPY_PY_STM (0) #define MICROPY_PY_PYB_LEGACY (0) #define MICROPY_PY_HEAPQ (0) +#define MICROPY_PY_OS (1) +#define MICROPY_PY_TIME (1) #define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0) #define MICROPY_HW_ENABLE_RTC (1)