diff --git a/nrf5/boards/make-pins.py b/nrf5/boards/make-pins.py index 11f9ffb3fd..c9ff8ede12 100644 --- a/nrf5/boards/make-pins.py +++ b/nrf5/boards/make-pins.py @@ -17,8 +17,8 @@ def parse_port_pin(name_str): raise ValueError("Expecting pin name to be at least 4 charcters.") if name_str[0] != 'P': raise ValueError("Expecting pin name to start with P") - if name_str[1] not in ('A'): - raise ValueError("Expecting pin port to be in A") + if name_str[1] not in ('A', 'B'): + raise ValueError("Expecting pin port to be in A or B") port = ord(name_str[1]) - ord('A') pin_str = name_str[2:].split('/')[0] if not pin_str.isdigit(): diff --git a/nrf5/boards/nrf51_prefix.c b/nrf5/boards/nrf51_prefix.c index 402bde1a60..a2413fe6bd 100644 --- a/nrf5/boards/nrf51_prefix.c +++ b/nrf5/boards/nrf51_prefix.c @@ -25,7 +25,6 @@ .pin = (p_pin), \ .num_af = (sizeof(p_af) / sizeof(pin_af_obj_t)), \ .pin_mask = (1 << p_pin), \ - .gpio = GPIO_BASE, \ .af = p_af, \ .adc_num = p_adc_num, \ .adc_channel = p_adc_channel, \ diff --git a/nrf5/boards/nrf52_prefix.c b/nrf5/boards/nrf52_prefix.c index 6bb07dd3a1..89e5df5b10 100644 --- a/nrf5/boards/nrf52_prefix.c +++ b/nrf5/boards/nrf52_prefix.c @@ -25,7 +25,6 @@ .pin = (p_pin), \ .num_af = (sizeof(p_af) / sizeof(pin_af_obj_t)), \ .pin_mask = (1 << p_pin), \ - .gpio = GPIO_BASE, \ .af = p_af, \ .adc_num = p_adc_num, \ .adc_channel = p_adc_channel, \ diff --git a/nrf5/hal/hal_spi.c b/nrf5/hal/hal_spi.c index 1ab7623943..3729a2c229 100644 --- a/nrf5/hal/hal_spi.c +++ b/nrf5/hal/hal_spi.c @@ -43,9 +43,9 @@ static const uint32_t hal_spi_frequency_lookup[] = { }; void hal_spi_master_init(NRF_SPI_Type * p_instance, hal_spi_init_t const * p_spi_init) { - hal_gpio_cfg_pin(p_spi_init->clk_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_spi_init->mosi_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_spi_init->miso_pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); + hal_gpio_cfg_pin(p_spi_init->clk_pin_port, p_spi_init->clk_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); + hal_gpio_cfg_pin(p_spi_init->mosi_pin_port, p_spi_init->mosi_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); + hal_gpio_cfg_pin(p_spi_init->miso_pin_port, p_spi_init->miso_pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); #if NRF51 p_instance->PSELSCK = p_spi_init->clk_pin; @@ -55,6 +55,13 @@ void hal_spi_master_init(NRF_SPI_Type * p_instance, hal_spi_init_t const * p_spi p_instance->PSEL.SCK = p_spi_init->clk_pin; p_instance->PSEL.MOSI = p_spi_init->mosi_pin; p_instance->PSEL.MISO = p_spi_init->miso_pin; + +#if NRF52840_XXAA + p_instance->PSEL.SCK |= (p_spi_init->clk_pin_port << SPIE_PSEL_CLK_PORT_Pos); + p_instance->PSEL.MOSI |= (p_spi_init->mosi_pin_port << SPIE_PSEL_MOSI_PORT_Pos); + p_instance->PSEL.MISO |= (p_spi_init->miso_pin_port << SPIE_PSEL_MISO_PORT_Pos); +#endif + #endif p_instance->FREQUENCY = hal_spi_frequency_lookup[p_spi_init->freq]; diff --git a/nrf5/hal/hal_spi.h b/nrf5/hal/hal_spi.h index ba85328ae6..852ea8b444 100644 --- a/nrf5/hal/hal_spi.h +++ b/nrf5/hal/hal_spi.h @@ -80,6 +80,9 @@ typedef struct { uint8_t mosi_pin; uint8_t miso_pin; uint8_t clk_pin; + uint8_t mosi_pin_port; + uint8_t miso_pin_port; + uint8_t clk_pin_port; bool lsb_first; hal_spi_mode_t mode; uint32_t irq_priority; diff --git a/nrf5/hal/hal_uart.c b/nrf5/hal/hal_uart.c index 392acebe69..a9e3698e69 100644 --- a/nrf5/hal/hal_uart.c +++ b/nrf5/hal/hal_uart.c @@ -27,19 +27,16 @@ #include #include +#include "nrf.h" #include "mphalport.h" #include "hal_uart.h" #ifdef HAL_UART_MODULE_ENABLED #ifdef NRF51 -#include "nrf51.h" -#include "nrf51_bitfields.h" #define UART_BASE ((NRF_UART_Type *) NRF_UART0_BASE) #define UART_IRQ_NUM UART0_IRQn #else -#include "nrf52.h" -#include "nrf52_bitfields.h" #define UART_BASE ((NRF_UART_Type *) NRF_UART0_BASE) #define UART_IRQ_NUM UARTE0_UART0_IRQn #endif @@ -103,18 +100,34 @@ void nrf_uart_buffer_read(uint8_t * p_buffer, uint32_t num_of_bytes, uart_comple } void nrf_uart_init(hal_uart_init_t const * p_uart_init) { - hal_gpio_cfg_pin(p_uart_init->tx_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_uart_init->rx_pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); + hal_gpio_cfg_pin(p_uart_init->tx_pin_port, p_uart_init->tx_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); + hal_gpio_cfg_pin(p_uart_init->tx_pin_port, p_uart_init->rx_pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); + + hal_gpio_pin_clear(p_uart_init->tx_pin_port, p_uart_init->tx_pin); UART_BASE->PSELTXD = p_uart_init->tx_pin; +#if NRF52840_XXAA + UART_BASE->PSELTXD |= (p_uart_init->tx_pin_port << UARTE_PSEL_TXD_PORT_Pos); +#endif UART_BASE->PSELRXD = p_uart_init->rx_pin; - +#if NRF52840_XXAA + UART_BASE->PSELRXD |= (p_uart_init->rx_pin_port << UARTE_PSEL_RXD_PORT_Pos); +#endif if (p_uart_init->flow_control) { - hal_gpio_cfg_pin(p_uart_init->rts_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); - hal_gpio_cfg_pin(p_uart_init->cts_pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); - +#if MICROPY_HW_UART1_HWFC + hal_gpio_cfg_pin(p_uart_init->rts_pin_port, p_uart_init->rts_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); + hal_gpio_cfg_pin(p_uart_init->cts_pin_port, p_uart_init->cts_pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); + UART_BASE->PSELCTS = p_uart_init->cts_pin; +#if NRF52840_XXAA + UART_BASE->PSELCTS |= (p_uart_init->cts_pin_port << UARTE_PSEL_CTS_PORT_Pos); +#endif UART_BASE->PSELRTS = p_uart_init->rts_pin; +#if NRF52840_XXAA + UART_BASE->PSELRTS |= (p_uart_init->rts_pin_port << UARTE_PSEL_RTS_PORT_Pos); +#endif +#endif + UART_BASE->CONFIG = (UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos); } diff --git a/nrf5/mphalport.h b/nrf5/mphalport.h index ce8f991e5c..a68ed8ed94 100644 --- a/nrf5/mphalport.h +++ b/nrf5/mphalport.h @@ -40,11 +40,17 @@ typedef enum } HAL_StatusTypeDef; -#ifdef NRF51 -#define GPIO_BASE ((NRF_GPIO_Type *)NRF_GPIO_BASE) -#else -#define GPIO_BASE ((NRF_GPIO_Type *)NRF_P0_BASE) +#if NRF51 +#define POINTERS (const uint32_t[]){NRF_GPIO_BASE} +#elif NRF52 +#ifdef NRF52832_XXAA +#define POINTERS (const uint32_t[]){NRF_P0_BASE} +#elif NRF52840_XXAA +#define POINTERS (const uint32_t[]){NRF_P0_BASE, NRF_P1_BASE} #endif +#endif + +#define GPIO_BASE(x) ((NRF_GPIO_Type *)POINTERS[x]) /** * @brief GPIO Init structure definition @@ -78,33 +84,33 @@ typedef enum { HAL_GPIO_MODE_INPUT = (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos), } hal_gpio_mode_t; -static inline void hal_gpio_cfg_pin(uint32_t pin_number, hal_gpio_mode_t mode, hal_gpio_pull_t pull) { - GPIO_BASE->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) - | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) - | pull - | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) - | mode; +static inline void hal_gpio_cfg_pin(uint8_t port, uint32_t pin_number, hal_gpio_mode_t mode, hal_gpio_pull_t pull) { + GPIO_BASE(port)->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos) + | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos) + | pull + | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) + | mode; } -static inline void hal_gpio_out_set(uint32_t pin_mask) { - GPIO_BASE->OUTSET = pin_mask; +static inline void hal_gpio_out_set(uint8_t port, uint32_t pin_mask) { + GPIO_BASE(port)->OUTSET = pin_mask; } -static inline void hal_gpio_pin_set(uint32_t pin) { - GPIO_BASE->OUTSET = (1 << pin); +static inline void hal_gpio_pin_set(uint8_t port, uint32_t pin) { + GPIO_BASE(port)->OUTSET = (1 << pin); } -static inline void hal_gpio_pin_clear(uint32_t pin) { - GPIO_BASE->OUTCLR = (1 << pin); +static inline void hal_gpio_pin_clear(uint8_t port, uint32_t pin) { + GPIO_BASE(port)->OUTCLR = (1 << pin); } -static inline void hal_gpio_pin_toggle(uint32_t pin) { +static inline void hal_gpio_pin_toggle(uint8_t port, uint32_t pin) { uint32_t pin_mask = (1 << pin); - if (GPIO_BASE->OUT ^ pin_mask) { - GPIO_BASE->OUTSET = pin_mask; + if (GPIO_BASE(port)->OUT ^ pin_mask) { + GPIO_BASE(port)->OUTSET = pin_mask; } else { - GPIO_BASE->OUTCLR = pin_mask; + GPIO_BASE(port)->OUTCLR = pin_mask; } } @@ -123,9 +129,9 @@ int mp_hal_stdin_rx_chr(void); void mp_hal_stdout_tx_str(const char *str); #define mp_hal_pin_obj_t const pin_obj_t* -#define mp_hal_pin_high(p) (((NRF_GPIO_Type *)((p)->gpio))->OUTSET = (p)->pin_mask) -#define mp_hal_pin_low(p) (((NRF_GPIO_Type *)((p)->gpio))->OUTCLR = (p)->pin_mask) -#define mp_hal_pin_read(p) (((NRF_GPIO_Type *)((p)->gpio))->IN >> ((p)->pin) & 1) +#define mp_hal_pin_high(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->OUTSET = (p)->pin_mask) +#define mp_hal_pin_low(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->OUTCLR = (p)->pin_mask) +#define mp_hal_pin_read(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->IN >> ((p)->pin) & 1) #define mp_hal_pin_write(p, v) do { if (v) { mp_hal_pin_high(p); } else { mp_hal_pin_low(p); } } while (0) // TODO: empty implementation for now. Used by machine_spi.c:69 diff --git a/nrf5/pin.c b/nrf5/pin.c index 1debbaa0d3..b1690c7b5f 100644 --- a/nrf5/pin.c +++ b/nrf5/pin.c @@ -187,7 +187,8 @@ STATIC void pin_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t // pin name mp_printf(print, "Pin(Pin.cpu.%q, mode=Pin.", self->name); - mp_printf(print, "gpio=0x%x,", self->gpio); + mp_printf(print, "port=0x%x, ", self->port); + mp_printf(print, "pin=0x%x, ", self->pin); mp_printf(print, "pin_mask=0x%x,", self->pin_mask); /* uint32_t mode = pin_get_mode(self); @@ -356,7 +357,7 @@ STATIC mp_obj_t pin_obj_init_helper(const pin_obj_t *self, mp_uint_t n_args, con // get io mode uint mode = args[0].u_int; if (mode == HAL_GPIO_MODE_OUTPUT || mode == HAL_GPIO_MODE_INPUT) { - hal_gpio_cfg_pin(self->pin, mode, pull); + hal_gpio_cfg_pin(self->port, self->pin, mode, pull); } else { nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "invalid pin mode: %d", mode)); } diff --git a/nrf5/spi.c b/nrf5/spi.c index 1306a8f8ee..d61fb5b1bf 100644 --- a/nrf5/spi.c +++ b/nrf5/spi.c @@ -255,6 +255,9 @@ STATIC mp_obj_t machine_hard_spi_make_new(mp_arg_val_t *args) { self->pyb->spi->init.clk_pin = MICROPY_HW_SPI0_SCK; self->pyb->spi->init.mosi_pin = MICROPY_HW_SPI0_MOSI; self->pyb->spi->init.miso_pin = MICROPY_HW_SPI0_MISO; + self->pyb->spi->init.clk_pin_port = MICROPY_HW_SPI0_SCK_PORT; + self->pyb->spi->init.mosi_pin_port = MICROPY_HW_SPI0_MOSI_PORT; + self->pyb->spi->init.miso_pin_port = MICROPY_HW_SPI0_MISO_PORT; } int baudrate = args[ARG_NEW_baudrate].u_int; diff --git a/nrf5/uart.c b/nrf5/uart.c index cb05c2359f..4edaea3881 100644 --- a/nrf5/uart.c +++ b/nrf5/uart.c @@ -202,13 +202,6 @@ STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, mp_uint_t n_args, con } hal_uart_init_t uart_init = { - .rx_pin = MICROPY_HW_UART1_RX, - .tx_pin = MICROPY_HW_UART1_TX, -#if MICROPY_HW_UART1_HWFC - .rts_pin = MICROPY_HW_UART1_RTS, - .cts_pin = MICROPY_HW_UART1_CTS, -#endif - #if MICROPY_HW_UART1_HWFC .flow_control = true, #else @@ -222,6 +215,17 @@ STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, mp_uint_t n_args, con .irq_priority = 6 #endif }; + uart_init.rx_pin = MICROPY_HW_UART1_RX; + uart_init.tx_pin = MICROPY_HW_UART1_TX; + uart_init.rx_pin_port = MICROPY_HW_UART1_RX_PORT; + uart_init.tx_pin_port = MICROPY_HW_UART1_TX_PORT; + +#if MICROPY_HW_UART1_HWFC + uart_init.rts_pin = MICROPY_HW_UART1_RTS; + uart_init.cts_pin = MICROPY_HW_UART1_CTS; + uart_init.rts_pin_port = MICROPY_HW_UART1_RTS_PORT; + uart_init.cts_pin_port = MICROPY_HW_UART1_CTS_PORT; +#endif nrf_uart_init(&uart_init);