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nrf5/hal: Updating SPI hal with full list of SPI interfaces as lookup tables for all devices. Updating init struct to pass Pin instance pointers instead of uint pin number and ports.

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This commit is contained in:
Glenn Ruben Bakke 2017-01-26 21:24:31 +01:00
parent 197c052ca6
commit 437f3d2477
2 changed files with 50 additions and 39 deletions
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18
nrf5/hal/hal_spi.c
View File

@ -43,23 +43,23 @@ static const uint32_t hal_spi_frequency_lookup[] = {
}; };
void hal_spi_master_init(NRF_SPI_Type * p_instance, hal_spi_init_t const * p_spi_init) { void hal_spi_master_init(NRF_SPI_Type * p_instance, hal_spi_init_t const * p_spi_init) {
hal_gpio_cfg_pin(p_spi_init->clk_pin_port, p_spi_init->clk_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); hal_gpio_cfg_pin(p_spi_init->clk_pin->port, p_spi_init->clk_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED);
hal_gpio_cfg_pin(p_spi_init->mosi_pin_port, p_spi_init->mosi_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); hal_gpio_cfg_pin(p_spi_init->mosi_pin->port, p_spi_init->mosi_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED);
hal_gpio_cfg_pin(p_spi_init->miso_pin_port, p_spi_init->miso_pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); hal_gpio_cfg_pin(p_spi_init->miso_pin->port, p_spi_init->miso_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED);
#if NRF51 #if NRF51
p_instance->PSELSCK = p_spi_init->clk_pin; p_instance->PSELSCK = p_spi_init->clk_pin;
p_instance->PSELMOSI = p_spi_init->mosi_pin; p_instance->PSELMOSI = p_spi_init->mosi_pin;
p_instance->PSELMISO = p_spi_init->miso_pin; p_instance->PSELMISO = p_spi_init->miso_pin;
#else #else
p_instance->PSEL.SCK = p_spi_init->clk_pin; p_instance->PSEL.SCK = p_spi_init->clk_pin->pin;
p_instance->PSEL.MOSI = p_spi_init->mosi_pin; p_instance->PSEL.MOSI = p_spi_init->mosi_pin->pin;
p_instance->PSEL.MISO = p_spi_init->miso_pin; p_instance->PSEL.MISO = p_spi_init->miso_pin->pin;
#if NRF52840_XXAA #if NRF52840_XXAA
p_instance->PSEL.SCK |= (p_spi_init->clk_pin_port << SPI_PSEL_SCK_PORT_Pos); p_instance->PSEL.SCK |= (p_spi_init->clk_pin->port << SPI_PSEL_SCK_PORT_Pos);
p_instance->PSEL.MOSI |= (p_spi_init->mosi_pin_port << SPI_PSEL_MOSI_PORT_Pos); p_instance->PSEL.MOSI |= (p_spi_init->mosi_pin->port << SPI_PSEL_MOSI_PORT_Pos);
p_instance->PSEL.MISO |= (p_spi_init->miso_pin_port << SPI_PSEL_MISO_PORT_Pos); p_instance->PSEL.MISO |= (p_spi_init->miso_pin->port << SPI_PSEL_MISO_PORT_Pos);
#endif #endif
#endif #endif

71
nrf5/hal/hal_spi.h
View File

@ -31,36 +31,50 @@
#include "nrf.h" #include "nrf.h"
#if NRF51 #if NRF51
#define SPI_BASE_POINTERS (const uint32_t[]){NRF_SPI0_BASE, NRF_SPI1_BASE}
#define SPI0 ((NRF_SPI_Type *) NRF_SPI0) #define SPI_IRQ_VALUES (const uint32_t[]){SPI0_TWI0_IRQn, SPI1_TWI1_IRQn}
#define SPI0_IRQ_NUM SPI0_TWI0_IRQn
#define SPI1 ((NRF_SPI_Type *) NRF_SPI1)
#define SPI1_IRQ_NUM SPI1_TWI1_IRQn
#elif NRF52
#define SPI0 ((NRF_SPI_Type *) NRF_SPI0_BASE)
#define SPI0_IRQ_NUM SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn
#define SPI1 ((NRF_SPI_Type *) NRF_SPI1_BASE)
#define SPI1_IRQ_NUM SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn
#define SPI2 ((NRF_SPI_Type *) NRF_SPI2_BASE)
#define SPI2_IRQ_NUM SPIM2_SPIS2_SPI2_IRQn
#else
#error "Device not supported."
#endif #endif
#if NRF52
#ifdef NRF52832_XXAA
#define SPI_BASE_POINTERS (const uint32_t[]){NRF_SPI0_BASE, \
NRF_SPI1_BASE, \
NRF_SPI2_BASE}
#define SPI_IRQ_VALUES (const uint32_t[]){SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, \
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, \
SPIM2_SPIS2_SPI2_IRQn}
#endif
#ifdef NRF52840_XXAA
#define SPI_BASE_POINTERS (const uint32_t[]){NRF_SPI0_BASE, \
NRF_SPI1_BASE, \
NRF_SPI2_BASE, \
NRF_SPIM3_BASE}
#define SPI_IRQ_VALUES (const uint32_t[]){SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQn, \
SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQn, \
SPIM2_SPIS2_SPI2_IRQn, \
SPIM3_IRQn}
#endif
#endif
#define SPI_BASE(x) ((NRF_SPI_Type *)SPI_BASE_POINTERS[x])
#define SPI_IRQ_NUM(x) (SPI_IRQ_VALUES[x])
/** /**
* @brief SPI clock frequency type definition * @brief SPI clock frequency type definition
*/ */
typedef enum { typedef enum {
HAL_FREQ_125_Kbps = 0, HAL_SPI_FREQ_125_Kbps = 0,
HAL_FREQ_250_Kbps, HAL_SPI_FREQ_250_Kbps,
HAL_FREQ_500_Kbps, HAL_SPI_FREQ_500_Kbps,
HAL_FREQ_1_Mbps, HAL_SPI_FREQ_1_Mbps,
HAL_FREQ_2_Mbps, HAL_SPI_FREQ_2_Mbps,
HAL_FREQ_4_Mbps, HAL_SPI_FREQ_4_Mbps,
HAL_FREQ_8_Mbps HAL_SPI_FREQ_8_Mbps,
#if NRF52840_XXAA
HAL_SPI_FREQ_16_Mbps,
HAL_SPI_FREQ_32_Mbps
#endif
} hal_spi_clk_freq_t; } hal_spi_clk_freq_t;
/** /**
@ -85,12 +99,9 @@ typedef enum {
* @brief SPI Configuration Structure definition * @brief SPI Configuration Structure definition
*/ */
typedef struct { typedef struct {
uint8_t mosi_pin; const pin_obj_t * mosi_pin;
uint8_t miso_pin; const pin_obj_t * miso_pin;
uint8_t clk_pin; const pin_obj_t * clk_pin;
uint8_t mosi_pin_port;
uint8_t miso_pin_port;
uint8_t clk_pin_port;
hal_spi_firstbit_t firstbit; hal_spi_firstbit_t firstbit;
hal_spi_mode_t mode; hal_spi_mode_t mode;
uint32_t irq_priority; uint32_t irq_priority;