docs(swan_r5):todo cleanup
This commit is contained in:
parent
88f6bb2cf2
commit
40c3b5c7e6
@ -36,7 +36,7 @@
|
||||
|
||||
// I2C timing specs for the H7 and F7
|
||||
// Configured for maximum possible clock settings for the family
|
||||
#if (CPY_STM32F7) // todo - get the correct values for the L4
|
||||
#if (CPY_STM32F7)
|
||||
#ifndef CPY_I2CFAST_TIMINGR
|
||||
#define CPY_I2CFAST_TIMINGR 0x6000030D
|
||||
#endif
|
||||
|
@ -165,7 +165,6 @@ const mcu_periph_obj_t mcu_uart_rx_list[UART_RX_ARRAY_LEN] = {
|
||||
PERIPH(1, 7, &pin_PG10),
|
||||
};
|
||||
|
||||
// todo
|
||||
// Timers
|
||||
// TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins
|
||||
TIM_TypeDef *mcu_tim_banks[TIM_BANK_ARRAY_LEN] = {TIM1, TIM2, TIM3, TIM4, TIM5, TIM15, TIM16};
|
||||
|
@ -96,8 +96,8 @@ STATIC uint8_t _flash_cache[0x20000] __attribute__((aligned(4)));
|
||||
|
||||
#elif defined(STM32L4)
|
||||
// todo - the L4 devices can have different flash sizes and different page sizes
|
||||
// depending upon the configuration
|
||||
// This is hardcoded for the Blues Swan. When support for other devices is needed more conditionals will be required
|
||||
// depending upon the dual bank configuration
|
||||
// This is hardcoded for the Swan R5. When support for other devices is needed more conditionals will be required
|
||||
// to differentiate.
|
||||
STATIC const flash_layout_t flash_layout[] = {
|
||||
{ 0x08000000, 0x1000, 256 },
|
||||
@ -170,7 +170,7 @@ uint32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *si
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0; // todo dangerous - shouldn't this raise an exception
|
||||
return 0; // todo dangerous - shouldn't this raise an exception?
|
||||
}
|
||||
|
||||
void supervisor_flash_init(void) {
|
||||
|
Loading…
Reference in New Issue
Block a user