add initial esp32c3 support

This commit is contained in:
microDev 2021-09-26 00:00:00 +05:30
parent 10fdc80b9c
commit 3da86b0ac2
No known key found for this signature in database
GPG Key ID: 2C0867BE60967730
21 changed files with 477 additions and 912 deletions

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@ -59,7 +59,13 @@ include $(TOP)/supervisor/supervisor.mk
# Include make rules and variables common across CircuitPython builds.
include $(TOP)/py/circuitpy_defns.mk
ifeq ($(IDF_TARGET),esp32s2)
IDF_TARGET_ARCH = xtensa
CROSS_COMPILE = xtensa-$(IDF_TARGET)-elf-
else ifeq ($(IDF_TARGET),esp32c3)
IDF_TARGET_ARCH = riscv
CROSS_COMPILE = riscv32-esp-elf-
endif
#######################################
# CFLAGS
@ -95,7 +101,7 @@ INC += -I.\
-isystem esp-idf/components/esp_wifi/include \
-isystem esp-idf/components/freertos/include \
-isystem esp-idf/components/freertos/include/freertos \
-isystem esp-idf/components/freertos/port/xtensa/include \
-isystem esp-idf/components/freertos/port/$(IDF_TARGET_ARCH)/include \
-isystem esp-idf/components/hal/include \
-isystem esp-idf/components/hal/$(IDF_TARGET)/include \
-isystem esp-idf/components/hal/platform_port/include \
@ -112,8 +118,13 @@ INC += -I.\
-isystem esp-idf/components/soc/include \
-isystem esp-idf/components/soc/$(IDF_TARGET)/include \
-isystem esp-idf/components/spi_flash/include \
-isystem esp-idf/components/xtensa/include \
-isystem esp-idf/components/xtensa/$(IDF_TARGET)/include
-isystem esp-idf/components/$(IDF_TARGET_ARCH)/include \
-isystem esp-idf/components/$(IDF_TARGET_ARCH)/$(IDF_TARGET)/include
# See https://github.com/espressif/esp-idf/issues/6906
ifeq ($(IDF_TARGET),esp32c3)
CFLAGS += -include "esp32c3_fix.h"
endif
CFLAGS += -DHAVE_CONFIG_H \
-DMBEDTLS_CONFIG_FILE=\"mbedtls/esp_config.h\" \
@ -139,7 +150,11 @@ endif
# option to override compiler optimization level, set in boards/$(BOARD)/mpconfigboard.mk
CFLAGS += $(OPTIMIZATION_FLAGS)
CFLAGS += $(INC) -Werror -Wall -mlongcalls -std=gnu11 -Wl,--gc-sections $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
CFLAGS += $(INC) -Werror -Wall -std=gnu11 -Wl,--gc-sections $(BASE_CFLAGS) $(C_DEFS) $(CFLAGS_MOD) $(COPT)
ifeq ($(IDF_TARGET_ARCH),xtensa)
CFLAGS += -mlongcalls
endif
LDFLAGS = $(CFLAGS) -Wl,-nostdlib -Wl,-Map=$@.map -Wl,-cref -Wl,--undefined=uxTopUsedPriority
@ -153,9 +168,17 @@ LDFLAGS += -L$(BUILD)/esp-idf/esp-idf/$(IDF_TARGET) \
-T$(IDF_TARGET).rom.ld \
-T$(IDF_TARGET).rom.api.ld \
-T$(IDF_TARGET).rom.libgcc.ld \
-T$(IDF_TARGET).rom.newlib-data.ld \
-T$(IDF_TARGET).rom.newlib-nano.ld
ifeq ($(IDF_TARGET),esp32c3)
LDFLAGS += -Tesp32c3.rom.newlib.ld \
-Tesp32c3.rom.version.ld \
-Tesp32c3.rom.eco3.ld
else
LDFLAGS += -T$(IDF_TARGET).rom.newlib-data.ld \
-T$(IDF_TARGET).rom.newlib-funcs.ld \
-T$(IDF_TARGET).rom.spiflash.ld
endif
LDFLAGS += -Wl,-Bstatic \
-Wl,--no-warn-mismatch \
@ -170,20 +193,25 @@ LIBS += -lm
endif
# TinyUSB defines
CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_ESP32S2 -DCFG_TUSB_OS=OPT_OS_FREERTOS -DCFG_TUD_CDC_RX_BUFSIZE=1024 -DCFG_TUD_CDC_TX_BUFSIZE=1024
CFLAGS += -DCFG_TUD_MSC_BUFSIZE=4096 -DCFG_TUD_MIDI_RX_BUFSIZE=128 -DCFG_TUD_MIDI_TX_BUFSIZE=128
CFLAGS += -DCFG_TUD_VENDOR_RX_BUFSIZE=128 -DCFG_TUD_VENDOR_TX_BUFSIZE=128
ifeq ($(CIRCUITPY_USB),1)
CFLAGS += \
-DCFG_TUSB_MCU=OPT_MCU_ESP32S2 \
-DCFG_TUSB_OS=OPT_OS_FREERTOS \
-DCFG_TUD_CDC_RX_BUFSIZE=1024 \
-DCFG_TUD_CDC_TX_BUFSIZE=1024 \
-DCFG_TUD_MSC_BUFSIZE=4096 \
-DCFG_TUD_MIDI_RX_BUFSIZE=128 \
-DCFG_TUD_MIDI_TX_BUFSIZE=128 \
-DCFG_TUD_VENDOR_RX_BUFSIZE=128 \
-DCFG_TUD_VENDOR_TX_BUFSIZE=128
endif
######################################
# source
######################################
SRC_C += \
background.c \
cam.c \
i2s_lcd_esp32s2_driver.c \
fatfs_port.c \
mphalport.c \
bindings/espidf/__init__.c \
@ -191,12 +219,18 @@ SRC_C += \
boards/$(BOARD)/pins.c \
modules/$(CIRCUITPY_MODULE).c \
lib/netutils/netutils.c \
peripherals/pcnt.c \
peripherals/rmt.c \
peripherals/timer.c \
peripherals/touch.c \
peripherals/$(IDF_TARGET)/pins.c
ifneq ($(IDF_TARGET),esp32c3)
SRC_C += \
cam.c \
i2s_lcd_esp32s2_driver.c \
peripherals/pcnt.c \
peripherals/touch.c
endif
$(BUILD)/i2s_lcd_esp32s2_driver.o: CFLAGS += -Wno-sign-compare
ifneq ($(CIRCUITPY_USB),0)
@ -251,7 +285,7 @@ ifeq ($(DEBUG), 1)
else
DEBUG_SDKCONFIG = esp-idf-config/sdkconfig-opt.defaults
endif
SDKCONFIGS = esp-idf-config/$(IDF_TARGET)/sdkconfig.defaults;$(DEBUG_SDKCONFIG);$(FLASH_SDKCONFIG);boards/$(BOARD)/sdkconfig
SDKCONFIGS = esp-idf-config/sdkconfig.defaults;$(DEBUG_SDKCONFIG);$(FLASH_SDKCONFIG);boards/$(BOARD)/sdkconfig
# create the config headers
$(BUILD)/esp-idf/config/sdkconfig.h: boards/$(BOARD)/sdkconfig | $(BUILD)/esp-idf
@ -280,7 +314,7 @@ menuconfig: $(BUILD)/esp-idf/config
# qstr builds include headers so we need to make sure they are up to date
$(HEADER_BUILD)/qstr.split: | $(BUILD)/esp-idf/config/sdkconfig.h
ESP_IDF_COMPONENTS_LINK = $(IDF_TARGET) app_update bootloader_support driver efuse esp_adc_cal esp_common esp_event esp_hw_support esp_netif esp_pm esp_ringbuf esp_rom esp_system esp_timer esp-tls esp_wifi freertos hal heap log lwip mbedtls newlib nvs_flash pthread soc spi_flash vfs wpa_supplicant xtensa
ESP_IDF_COMPONENTS_LINK = $(IDF_TARGET) $(IDF_TARGET_ARCH) app_update bootloader_support driver efuse esp_adc_cal esp_common esp_event esp_hw_support esp_netif esp_pm esp_ringbuf esp_rom esp_system esp_timer esp-tls esp_wifi freertos hal heap log lwip mbedtls newlib nvs_flash pthread soc spi_flash vfs wpa_supplicant
ESP_IDF_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/$(component)/lib$(component).a)
ESP_IDF_WIFI_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_WIFI_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/$(component)/lib$(component).a)
@ -288,18 +322,38 @@ ESP_IDF_WIFI_COMPONENTS_EXPANDED = $(foreach component, $(ESP_IDF_WIFI_COMPONENT
MBEDTLS_COMPONENTS_LINK = crypto tls x509
MBEDTLS_COMPONENTS_LINK_EXPANDED = $(foreach component, $(MBEDTLS_COMPONENTS_LINK), $(BUILD)/esp-idf/esp-idf/mbedtls/mbedtls/library/libmbed$(component).a)
BINARY_BLOBS = esp-idf/components/xtensa/$(IDF_TARGET)/libxt_hal.a
BINARY_WIFI_BLOBS = libcoexist.a libcore.a libespnow.a libmesh.a libnet80211.a libpp.a librtc.a libsmartconfig.a libphy.a
BINARY_BLOBS += $(addprefix esp-idf/components/esp_wifi/lib/$(IDF_TARGET)/, $(BINARY_WIFI_BLOBS))
BINARY_WIFI_BLOBS = libcoexist.a libcore.a libespnow.a libmesh.a libnet80211.a libpp.a libsmartconfig.a libphy.a
ifneq ($(IDF_TARGET),esp32c3)
BINARY_WIFI_BLOBS += librtc.a
endif
BINARY_BLOBS = $(addprefix esp-idf/components/esp_wifi/lib/$(IDF_TARGET)/, $(BINARY_WIFI_BLOBS))
ifeq ($(IDF_TARGET_ARCH),xtensa)
BINARY_BLOBS += esp-idf/components/xtensa/$(IDF_TARGET)/libxt_hal.a
ESP_IDF_COMPONENTS_EXPANDED += esp-idf/components/xtensa/$(IDF_TARGET)/libxt_hal.a
endif
ifeq ($(IDF_TARGET), esp32c3)
ESPTOOL_BAUDRATE = 230400
BOOTLOADER_OFFSET = 0x0000
else
ESPTOOL_BAUDRATE = 460800
BOOTLOADER_OFFSET = 0x1000
endif
PARTITION_TABLE_OFFSET = 0x8000
FIRMWARE_OFFSET = 0x10000
ESP_AUTOGEN_LD = $(BUILD)/esp-idf/esp-idf/$(IDF_TARGET)/$(IDF_TARGET)_out.ld $(BUILD)/esp-idf/esp-idf/$(IDF_TARGET)/ld/$(IDF_TARGET).project.ld
FLASH_FLAGS = --flash_mode $(CIRCUITPY_ESP_FLASH_MODE) --flash_freq $(CIRCUITPY_ESP_FLASH_FREQ) --flash_size $(CIRCUITPY_ESP_FLASH_SIZE)
ESPTOOL_FLAGS ?= -b 460800 --before=default_reset --after=no_reset
ESPTOOL_FLAGS ?= -b $(ESPTOOL_BAUDRATE) --before=default_reset --after=no_reset
ifeq ($(IDF_TARGET),esp32c3)
all: $(BUILD)/firmware.bin
else
all: $(BUILD)/firmware.bin $(BUILD)/firmware.uf2
endif
.PHONY: esp-idf-stamp
esp-idf-stamp: $(BUILD)/esp-idf/config/sdkconfig.h
@ -336,7 +390,7 @@ esp-idf-stamp: $(BUILD)/esp-idf/config/sdkconfig.h
esp-idf/spi_flash/libspi_flash.a \
esp-idf/vfs/libvfs.a \
esp-idf/wpa_supplicant/libwpa_supplicant.a \
esp-idf/xtensa/libxtensa.a
esp-idf/$(IDF_TARGET_ARCH)/lib$(IDF_TARGET_ARCH).a
$(BUILD)/firmware.elf: $(OBJ) | esp-idf-stamp
$(STEPECHO) "LINK $@"
@ -348,7 +402,7 @@ $(BUILD)/circuitpython-firmware.bin: $(BUILD)/firmware.elf | tools/build_memory_
$(Q)$(PYTHON3) tools/build_memory_info.py $< $(BUILD)/esp-idf/sdkconfig $@
$(BUILD)/firmware.bin: $(BUILD)/circuitpython-firmware.bin | esp-idf-stamp
$(Q)$(PYTHON) ../../tools/join_bins.py $@ 0x1000 $(BUILD)/esp-idf/bootloader/bootloader.bin 0x8000 $(BUILD)/esp-idf/partition_table/partition-table.bin 0x10000 $(BUILD)/circuitpython-firmware.bin
$(Q)$(PYTHON) ../../tools/join_bins.py $@ $(BOOTLOADER_OFFSET) $(BUILD)/esp-idf/bootloader/bootloader.bin $(PARTITION_TABLE_OFFSET) $(BUILD)/esp-idf/partition_table/partition-table.bin $(FIRMWARE_OFFSET) $(BUILD)/circuitpython-firmware.bin
$(BUILD)/firmware.uf2: $(BUILD)/circuitpython-firmware.bin
$(STEPECHO) "Create $@"
@ -358,7 +412,7 @@ flash: $(BUILD)/firmware.bin
esptool.py --chip $(IDF_TARGET) -p $(PORT) $(ESPTOOL_FLAGS) write_flash $(FLASH_FLAGS) 0x0000 $^
flash-circuitpython-only: $(BUILD)/circuitpython-firmware.bin
esptool.py --chip $(IDF_TARGET) -p $(PORT) $(ESPTOOL_FLAGS) write_flash $(FLASH_FLAGS) 0x10000 $^
esptool.py --chip $(IDF_TARGET) -p $(PORT) $(ESPTOOL_FLAGS) write_flash $(FLASH_FLAGS) $(FIRMWARE_OFFSET) $^
monitor: $(BUILD)/firmware.elf
cp $< build/circuitpython.elf

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@ -44,7 +44,7 @@
#include "esp_sleep.h"
#include "components/soc/esp32s2/include/soc/rtc_cntl_reg.h"
#include "soc/rtc_cntl_reg.h"
#include "components/driver/include/driver/uart.h"
// Singleton instance of SleepMemory.

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@ -32,10 +32,11 @@
#include "shared-bindings/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/__init__.h"
#include "hal/gpio_ll.h"
#include "esp_debug_helpers.h"
#include "components/driver/include/driver/rtc_io.h"
#include "components/esp_system/include/esp_sleep.h"
#include "components/hal/esp32s2/include/hal/gpio_ll.h"
#include "components/xtensa/include/esp_debug_helpers.h"
#include "components/freertos/include/freertos/FreeRTOS.h"
void common_hal_alarm_pin_pinalarm_construct(alarm_pin_pinalarm_obj_t *self, const mcu_pin_obj_t *pin, bool value, bool edge, bool pull) {

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@ -38,8 +38,7 @@
#include "esp_system.h"
#include "soc/efuse_reg.h"
#include "components/driver/esp32s2/include/driver/temp_sensor.h"
#include "driver/temp_sensor.h"
float common_hal_mcu_processor_get_temperature(void) {
float tsens_out;

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@ -45,9 +45,14 @@
#include "soc/rtc_cntl_reg.h"
#include "esp_private/system_internal.h"
#ifdef CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/rom/rtc.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/rom/rtc.h"
#include "esp32s2/rom/usb/usb_persist.h"
#include "esp32s2/rom/usb/chip_usb_dw_wrapper.h"
#endif
void common_hal_mcu_delay_us(uint32_t delay) {
mp_hal_delay_us(delay);
@ -77,8 +82,10 @@ void common_hal_mcu_enable_interrupts(void) {
void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) {
switch (runmode) {
case RUNMODE_UF2:
#ifndef CONFIG_IDF_TARGET_ESP32C3
// 0x11F2 is APP_REQUEST_UF2_RESET_HINT & is defined by TinyUF2
esp_reset_reason_set_hint(0x11F2);
#endif
break;
case RUNMODE_NORMAL:
// revert back to normal boot
@ -92,7 +99,9 @@ void common_hal_mcu_on_next_reset(mcu_runmode_t runmode) {
break;
case RUNMODE_BOOTLOADER:
// DFU download
#ifndef CONFIG_IDF_TARGET_ESP32C3
chip_usb_set_persist_flags(USBDC_BOOT_DFU);
#endif
REG_WRITE(RTC_CNTL_OPTION1_REG, RTC_CNTL_FORCE_DOWNLOAD_BOOT);
break;
default:
@ -159,7 +168,7 @@ STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = {
{ MP_ROM_QSTR(MP_QSTR_GPIO19), MP_ROM_PTR(&pin_GPIO19) },
{ MP_ROM_QSTR(MP_QSTR_GPIO20), MP_ROM_PTR(&pin_GPIO20) },
{ MP_ROM_QSTR(MP_QSTR_GPIO21), MP_ROM_PTR(&pin_GPIO21) },
#ifndef CONFIG_IDF_TARGET_ESP32C3
{ MP_ROM_QSTR(MP_QSTR_GPIO26), MP_ROM_PTR(&pin_GPIO26) },
{ MP_ROM_QSTR(MP_QSTR_GPIO27), MP_ROM_PTR(&pin_GPIO27) },
{ MP_ROM_QSTR(MP_QSTR_GPIO28), MP_ROM_PTR(&pin_GPIO28) },
@ -181,5 +190,6 @@ STATIC const mp_rom_map_elem_t mcu_pin_global_dict_table[] = {
{ MP_ROM_QSTR(MP_QSTR_GPIO44), MP_ROM_PTR(&pin_GPIO44) },
{ MP_ROM_QSTR(MP_QSTR_GPIO45), MP_ROM_PTR(&pin_GPIO45) },
{ MP_ROM_QSTR(MP_QSTR_GPIO46), MP_ROM_PTR(&pin_GPIO46) },
#endif
};
MP_DEFINE_CONST_DICT(mcu_pin_globals, mcu_pin_global_dict_table);

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@ -34,7 +34,7 @@ STATIC pulseio_pulsein_obj_t *handles[RMT_CHANNEL_MAX];
// Requires rmt.c void peripherals_reset_all(void) to reset
STATIC void update_internal_buffer(pulseio_pulsein_obj_t *self) {
uint32_t length = 0;
size_t length = 0;
rmt_item32_t *items = (rmt_item32_t *)xRingbufferReceive(self->buf_handle, &length, 0);
if (items) {
length /= 4;

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@ -203,7 +203,7 @@ bool common_hal_socketpool_socket_listen(socketpool_socket_obj_t *self, int back
}
mp_uint_t common_hal_socketpool_socket_recvfrom_into(socketpool_socket_obj_t *self,
uint8_t *buf, uint32_t len, uint8_t *ip, uint *port) {
uint8_t *buf, uint32_t len, uint8_t *ip, uint32_t *port) {
struct sockaddr_in source_addr;
socklen_t socklen = sizeof(source_addr);

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@ -1,868 +0,0 @@
#
# Automatically generated file. DO NOT EDIT.
# Espressif IoT Development Framework (ESP-IDF) Project Configuration
#
CONFIG_IDF_CMAKE=y
CONFIG_IDF_TARGET="esp32s2"
CONFIG_IDF_TARGET_ESP32S2=y
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0002
#
# SDK tool configuration
#
CONFIG_SDK_TOOLPREFIX="xtensa-esp32s2-elf-"
# CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS is not set
# end of SDK tool configuration
#
# Build type
#
CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y
# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set
CONFIG_APP_BUILD_GENERATE_BINARIES=y
CONFIG_APP_BUILD_BOOTLOADER=y
CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y
# end of Build type
#
# Application manager
#
CONFIG_APP_COMPILE_TIME_DATE=y
# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set
# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set
# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set
CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16
# end of Application manager
#
# Bootloader config
#
CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000
CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set
# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set
# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set
CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y
# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set
# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set
CONFIG_BOOTLOADER_LOG_LEVEL=3
# CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set
CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y
# CONFIG_BOOTLOADER_FACTORY_RESET is not set
# CONFIG_BOOTLOADER_APP_TEST is not set
CONFIG_BOOTLOADER_WDT_ENABLE=y
# CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set
CONFIG_BOOTLOADER_WDT_TIME_MS=9000
# CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set
# CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set
CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0
# CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set
# end of Bootloader config
#
# Security features
#
CONFIG_SECURE_TARGET_HAS_SECURE_ROM_DL_MODE=y
# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set
# CONFIG_SECURE_BOOT is not set
# CONFIG_SECURE_FLASH_ENC_ENABLED is not set
# CONFIG_SECURE_DISABLE_ROM_DL_MODE is not set
# CONFIG_SECURE_ENABLE_SECURE_ROM_DL_MODE is not set
# end of Security features
#
# Serial flasher config
#
CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
CONFIG_ESPTOOLPY_WITH_STUB=y
# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set
# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set
CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set
CONFIG_ESPTOOLPY_FLASHMODE="dio"
# CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set
CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set
# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set
CONFIG_ESPTOOLPY_FLASHFREQ="40m"
CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y
CONFIG_ESPTOOLPY_BEFORE_RESET=y
# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set
CONFIG_ESPTOOLPY_BEFORE="default_reset"
CONFIG_ESPTOOLPY_AFTER_RESET=y
# CONFIG_ESPTOOLPY_AFTER_NORESET is not set
CONFIG_ESPTOOLPY_AFTER="hard_reset"
# CONFIG_ESPTOOLPY_MONITOR_BAUD_CONSOLE is not set
# CONFIG_ESPTOOLPY_MONITOR_BAUD_9600B is not set
# CONFIG_ESPTOOLPY_MONITOR_BAUD_57600B is not set
CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B=y
# CONFIG_ESPTOOLPY_MONITOR_BAUD_230400B is not set
# CONFIG_ESPTOOLPY_MONITOR_BAUD_921600B is not set
# CONFIG_ESPTOOLPY_MONITOR_BAUD_2MB is not set
# CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER is not set
CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200
CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
# end of Serial flasher config
#
# Partition Table
#
# CONFIG_PARTITION_TABLE_SINGLE_APP is not set
# CONFIG_PARTITION_TABLE_TWO_OTA is not set
CONFIG_PARTITION_TABLE_CUSTOM=y
CONFIG_PARTITION_TABLE_OFFSET=0x8000
CONFIG_PARTITION_TABLE_MD5=y
# end of Partition Table
#
# Compiler options
#
# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
# CONFIG_COMPILER_OPTIMIZATION_PERF is not set
# CONFIG_COMPILER_OPTIMIZATION_NONE is not set
# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE is not set
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set
# CONFIG_COMPILER_CXX_EXCEPTIONS is not set
# CONFIG_COMPILER_CXX_RTTI is not set
CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y
# CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set
# CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set
# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set
# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set
# CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set
# CONFIG_COMPILER_DUMP_RTL_FILES is not set
# end of Compiler options
#
# Component config
#
#
# Application Level Tracing
#
# CONFIG_APPTRACE_DEST_TRAX is not set
CONFIG_APPTRACE_DEST_NONE=y
CONFIG_APPTRACE_LOCK_ENABLE=y
# end of Application Level Tracing
#
# Driver configurations
#
#
# ADC configuration
#
# CONFIG_ADC_FORCE_XPD_FSM is not set
CONFIG_ADC_DISABLE_DAC=y
# end of ADC configuration
#
# SPI configuration
#
# CONFIG_SPI_MASTER_IN_IRAM is not set
CONFIG_SPI_MASTER_ISR_IN_IRAM=y
# CONFIG_SPI_SLAVE_IN_IRAM is not set
CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
# end of SPI configuration
#
# UART configuration
#
# CONFIG_UART_ISR_IN_IRAM is not set
# end of UART configuration
# end of Driver configurations
#
# eFuse Bit Manager
#
# CONFIG_EFUSE_CUSTOM_TABLE is not set
# CONFIG_EFUSE_VIRTUAL is not set
CONFIG_EFUSE_MAX_BLK_LEN=256
# end of eFuse Bit Manager
#
# ESP-TLS
#
CONFIG_ESP_TLS_USING_MBEDTLS=y
CONFIG_ESP_TLS_SERVER=y
# CONFIG_ESP_TLS_PSK_VERIFICATION is not set
# end of ESP-TLS
#
# ESP32S2-specific
#
# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_80 is not set
# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_160 is not set
CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240=y
CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ=240
#
# Memory protection
#
# CONFIG_ESP32S2_MEMPROT_FEATURE is not set
# end of Memory protection
#
# Cache config
#
# CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB is not set
CONFIG_ESP32S2_INSTRUCTION_CACHE_16KB=y
# CONFIG_ESP32S2_INSTRUCTION_CACHE_LINE_16B is not set
CONFIG_ESP32S2_INSTRUCTION_CACHE_LINE_32B=y
# CONFIG_ESP32S2_DATA_CACHE_0KB is not set
# CONFIG_ESP32S2_DATA_CACHE_8KB is not set
CONFIG_ESP32S2_DATA_CACHE_16KB=y
# CONFIG_ESP32S2_DATA_CACHE_LINE_16B is not set
CONFIG_ESP32S2_DATA_CACHE_LINE_32B=y
# CONFIG_ESP32S2_INSTRUCTION_CACHE_WRAP is not set
# CONFIG_ESP32S2_DATA_CACHE_WRAP is not set
# end of Cache config
# CONFIG_ESP32S2_SPIRAM_SUPPORT is not set
# CONFIG_ESP32S2_TRAX is not set
CONFIG_ESP32S2_TRACEMEM_RESERVE_DRAM=0x0
# CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES_ONE is not set
CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES_TWO=y
CONFIG_ESP32S2_UNIVERSAL_MAC_ADDRESSES=2
# CONFIG_ESP32S2_ULP_COPROC_ENABLED is not set
CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM=0
CONFIG_ESP32S2_DEBUG_OCDAWARE=y
# CONFIG_ESP32S2_DEBUG_STUBS_ENABLE is not set
CONFIG_ESP32S2_BROWNOUT_DET=y
CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_7=y
# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_6 is not set
# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_5 is not set
# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_4 is not set
# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_3 is not set
# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_2 is not set
# CONFIG_ESP32S2_BROWNOUT_DET_LVL_SEL_1 is not set
CONFIG_ESP32S2_BROWNOUT_DET_LVL=7
CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC_FRC1=y
# CONFIG_ESP32S2_TIME_SYSCALL_USE_RTC is not set
# CONFIG_ESP32S2_TIME_SYSCALL_USE_FRC1 is not set
# CONFIG_ESP32S2_TIME_SYSCALL_USE_NONE is not set
CONFIG_ESP32S2_RTC_CLK_SRC_INT_RC=y
# CONFIG_ESP32S2_RTC_CLK_SRC_EXT_CRYS is not set
# CONFIG_ESP32S2_RTC_CLK_SRC_EXT_OSC is not set
# CONFIG_ESP32S2_RTC_CLK_SRC_INT_8MD256 is not set
CONFIG_ESP32S2_RTC_CLK_CAL_CYCLES=576
# CONFIG_ESP32S2_NO_BLOBS is not set
# CONFIG_ESP32S2_KEEP_USB_ALIVE is not set
# CONFIG_ESP32S2_RTCDATA_IN_FAST_MEM is not set
# CONFIG_ESP32S2_USE_FIXED_STATIC_RAM_SIZE is not set
CONFIG_ESP32S2_ALLOW_RTC_FAST_MEM_AS_HEAP=y
# end of ESP32S2-specific
#
# Power Management
#
# CONFIG_PM_ENABLE is not set
# end of Power Management
#
# ADC-Calibration
#
# end of ADC-Calibration
#
# Common ESP-related
#
CONFIG_ESP_ERR_TO_NAME_LOOKUP=y
CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32
CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304
CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192
CONFIG_ESP_IPC_TASK_STACK_SIZE=1024
CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048
CONFIG_ESP_CONSOLE_UART_DEFAULT=y
# CONFIG_ESP_CONSOLE_USB_CDC is not set
# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set
# CONFIG_ESP_CONSOLE_NONE is not set
CONFIG_ESP_CONSOLE_UART=y
CONFIG_ESP_CONSOLE_UART_NUM=0
CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
CONFIG_ESP_INT_WDT=y
CONFIG_ESP_INT_WDT_TIMEOUT_MS=300
# CONFIG_ESP_TASK_WDT is not set
# CONFIG_ESP_PANIC_HANDLER_IRAM is not set
CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y
CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y
# end of Common ESP-related
#
# Ethernet
#
# CONFIG_ETH_USE_SPI_ETHERNET is not set
# CONFIG_ETH_USE_OPENETH is not set
# end of Ethernet
#
# Event Loop Library
#
# CONFIG_ESP_EVENT_LOOP_PROFILING is not set
CONFIG_ESP_EVENT_POST_FROM_ISR=y
CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y
# end of Event Loop Library
#
# ESP NETIF Adapter
#
CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120
CONFIG_ESP_NETIF_TCPIP_LWIP=y
# CONFIG_ESP_NETIF_LOOPBACK is not set
# CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER is not set
# end of ESP NETIF Adapter
#
# ESP System Settings
#
CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
# CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT is not set
# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set
CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=y
# end of ESP System Settings
#
# High resolution timer (esp_timer)
#
# CONFIG_ESP_TIMER_PROFILING is not set
CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584
CONFIG_ESP_TIMER_IMPL_SYSTIMER=y
# end of High resolution timer (esp_timer)
#
# Wi-Fi
#
CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=4
CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=8
# CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set
CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y
CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1
CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM=16
CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=16
# CONFIG_ESP32_WIFI_CSI_ENABLED is not set
CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y
CONFIG_ESP32_WIFI_TX_BA_WIN=6
CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y
CONFIG_ESP32_WIFI_RX_BA_WIN=6
# CONFIG_ESP32_WIFI_NVS_ENABLED is not set
CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752
CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32
# CONFIG_ESP32_WIFI_DEBUG_LOG_ENABLE is not set
CONFIG_ESP32_WIFI_IRAM_OPT=y
CONFIG_ESP32_WIFI_RX_IRAM_OPT=y
# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set
# end of Wi-Fi
#
# PHY
#
# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set
CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20
CONFIG_ESP32_PHY_MAX_TX_POWER=20
# end of PHY
#
# Core dump
#
# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set
CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y
# end of Core dump
#
# FreeRTOS
#
CONFIG_FREERTOS_UNICORE=y
CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF
CONFIG_FREERTOS_CORETIMER_0=y
# CONFIG_FREERTOS_CORETIMER_1 is not set
CONFIG_FREERTOS_OPTIMIZED_SCHEDULER=y
CONFIG_FREERTOS_HZ=100
CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set
# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set
CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y
# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set
CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y
CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1
CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y
# CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set
# CONFIG_FREERTOS_ASSERT_DISABLE is not set
CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536
CONFIG_FREERTOS_ISR_STACKSIZE=1536
# CONFIG_FREERTOS_LEGACY_HOOKS is not set
CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16
CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
# CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set
CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1
CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048
CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10
CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0
# CONFIG_FREERTOS_USE_TRACE_FACILITY is not set
# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set
CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set
# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set
CONFIG_FREERTOS_DEBUG_OCDAWARE=y
# end of FreeRTOS
#
# Heap memory debugging
#
CONFIG_HEAP_POISONING_DISABLED=y
# CONFIG_HEAP_POISONING_LIGHT is not set
# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set
CONFIG_HEAP_TRACING_OFF=y
# CONFIG_HEAP_TRACING_STANDALONE is not set
# CONFIG_HEAP_TRACING_TOHOST is not set
# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set
# end of Heap memory debugging
#
# Log output
#
# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set
# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set
# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set
CONFIG_LOG_DEFAULT_LEVEL_INFO=y
# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set
# CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set
CONFIG_LOG_DEFAULT_LEVEL=3
CONFIG_LOG_COLORS=y
CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y
# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set
# end of Log output
#
# LWIP
#
CONFIG_LWIP_LOCAL_HOSTNAME="espressif"
CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y
# CONFIG_LWIP_L2_TO_L3_COPY is not set
# CONFIG_LWIP_IRAM_OPTIMIZATION is not set
CONFIG_LWIP_TIMERS_ONDEMAND=y
CONFIG_LWIP_MAX_SOCKETS=4
# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set
# CONFIG_LWIP_SO_LINGER is not set
CONFIG_LWIP_SO_REUSE=y
CONFIG_LWIP_SO_REUSE_RXTOALL=y
CONFIG_LWIP_SO_RCVBUF=y
# CONFIG_LWIP_NETBUF_RECVINFO is not set
CONFIG_LWIP_IP4_FRAG=y
CONFIG_LWIP_IP6_FRAG=y
# CONFIG_LWIP_IP4_REASSEMBLY is not set
# CONFIG_LWIP_IP6_REASSEMBLY is not set
# CONFIG_LWIP_IP_FORWARD is not set
# CONFIG_LWIP_STATS is not set
# CONFIG_LWIP_ETHARP_TRUST_IP_MAC is not set
CONFIG_LWIP_ESP_GRATUITOUS_ARP=y
CONFIG_LWIP_GARP_TMR_INTERVAL=60
CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32
CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y
# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set
#
# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set
#
# DHCP server
#
CONFIG_LWIP_DHCPS_LEASE_UNIT=60
CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8
# end of DHCP server
# CONFIG_LWIP_AUTOIP is not set
# CONFIG_LWIP_IPV6_AUTOCONFIG is not set
CONFIG_LWIP_NETIF_LOOPBACK=y
CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
#
# TCP
#
CONFIG_LWIP_MAX_ACTIVE_TCP=4
CONFIG_LWIP_MAX_LISTENING_TCP=4
CONFIG_LWIP_TCP_MAXRTX=12
CONFIG_LWIP_TCP_SYNMAXRTX=6
CONFIG_LWIP_TCP_MSS=1440
CONFIG_LWIP_TCP_TMR_INTERVAL=250
CONFIG_LWIP_TCP_MSL=60000
CONFIG_LWIP_TCP_SND_BUF_DEFAULT=2880
CONFIG_LWIP_TCP_WND_DEFAULT=2880
CONFIG_LWIP_TCP_RECVMBOX_SIZE=6
CONFIG_LWIP_TCP_QUEUE_OOSEQ=y
# CONFIG_LWIP_TCP_SACK_OUT is not set
# CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set
CONFIG_LWIP_TCP_OVERSIZE_MSS=y
# CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set
# CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set
CONFIG_LWIP_TCP_RTO_TIME=3000
# end of TCP
#
# UDP
#
CONFIG_LWIP_MAX_UDP_PCBS=16
CONFIG_LWIP_UDP_RECVMBOX_SIZE=6
# end of UDP
CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072
CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set
CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF
# CONFIG_LWIP_PPP_SUPPORT is not set
CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3
CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5
# CONFIG_LWIP_SLIP_SUPPORT is not set
#
# ICMP
#
# CONFIG_LWIP_MULTICAST_PING is not set
# CONFIG_LWIP_BROADCAST_PING is not set
# end of ICMP
#
# LWIP RAW API
#
CONFIG_LWIP_MAX_RAW_PCBS=16
# end of LWIP RAW API
#
# SNTP
#
CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1
CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000
# end of SNTP
CONFIG_LWIP_ESP_LWIP_ASSERT=y
#
# Debug
#
# CONFIG_LWIP_NETIF_DEBUG is not set
# CONFIG_LWIP_PBUF_DEBUG is not set
# CONFIG_LWIP_ETHARP_DEBUG is not set
# CONFIG_LWIP_API_LIB_DEBUG is not set
# CONFIG_LWIP_SOCKETS_DEBUG is not set
# CONFIG_LWIP_IP_DEBUG is not set
# CONFIG_LWIP_ICMP_DEBUG is not set
# CONFIG_LWIP_IP6_DEBUG is not set
# CONFIG_LWIP_ICMP6_DEBUG is not set
# end of Debug
# end of LWIP
#
# mbedTLS
#
CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
# CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set
# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set
CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y
CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384
CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=2048
CONFIG_MBEDTLS_DYNAMIC_BUFFER=y
CONFIG_MBEDTLS_DYNAMIC_FREE_PEER_CERT=y
CONFIG_MBEDTLS_DYNAMIC_FREE_CONFIG_DATA=y
# CONFIG_MBEDTLS_DEBUG is not set
#
# Certificate Bundle
#
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y
# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL is not set
# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE=y
CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE=y
CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE_PATH="certificates/nina-fw/data/roots.pem"
# end of Certificate Bundle
# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set
# CONFIG_MBEDTLS_CMAC_C is not set
CONFIG_MBEDTLS_HARDWARE_AES=y
CONFIG_MBEDTLS_AES_USE_INTERRUPT=y
CONFIG_MBEDTLS_HARDWARE_GCM=y
CONFIG_MBEDTLS_HARDWARE_MPI=y
CONFIG_MBEDTLS_HARDWARE_SHA=y
# CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set
# CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set
CONFIG_MBEDTLS_HAVE_TIME=y
# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set
CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y
CONFIG_MBEDTLS_SHA512_C=y
CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y
# CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set
# CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set
# CONFIG_MBEDTLS_TLS_DISABLED is not set
CONFIG_MBEDTLS_TLS_SERVER=y
CONFIG_MBEDTLS_TLS_CLIENT=y
CONFIG_MBEDTLS_TLS_ENABLED=y
#
# TLS Key Exchange Methods
#
CONFIG_MBEDTLS_PSK_MODES=y
CONFIG_MBEDTLS_KEY_EXCHANGE_PSK=y
CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK=y
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK=y
CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK=y
CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y
CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y
CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y
# end of TLS Key Exchange Methods
CONFIG_MBEDTLS_SSL_RENEGOTIATION=y
# CONFIG_MBEDTLS_SSL_PROTO_SSL3 is not set
# CONFIG_MBEDTLS_SSL_PROTO_TLS1 is not set
# CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 is not set
CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y
CONFIG_MBEDTLS_SSL_PROTO_DTLS=y
CONFIG_MBEDTLS_SSL_ALPN=y
CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y
CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y
#
# Symmetric Ciphers
#
CONFIG_MBEDTLS_AES_C=y
# CONFIG_MBEDTLS_CAMELLIA_C is not set
# CONFIG_MBEDTLS_DES_C is not set
CONFIG_MBEDTLS_RC4_DISABLED=y
# CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT is not set
# CONFIG_MBEDTLS_RC4_ENABLED is not set
# CONFIG_MBEDTLS_BLOWFISH_C is not set
# CONFIG_MBEDTLS_XTEA_C is not set
CONFIG_MBEDTLS_CCM_C=y
CONFIG_MBEDTLS_GCM_C=y
# end of Symmetric Ciphers
# CONFIG_MBEDTLS_RIPEMD160_C is not set
#
# Certificates
#
CONFIG_MBEDTLS_PEM_PARSE_C=y
CONFIG_MBEDTLS_PEM_WRITE_C=y
CONFIG_MBEDTLS_X509_CRL_PARSE_C=y
CONFIG_MBEDTLS_X509_CSR_PARSE_C=y
# end of Certificates
CONFIG_MBEDTLS_ECP_C=y
CONFIG_MBEDTLS_ECDH_C=y
CONFIG_MBEDTLS_ECDSA_C=y
# CONFIG_MBEDTLS_ECJPAKE_C is not set
CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y
CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y
CONFIG_MBEDTLS_ECP_NIST_OPTIM=y
# CONFIG_MBEDTLS_POLY1305_C is not set
# CONFIG_MBEDTLS_CHACHA20_C is not set
# CONFIG_MBEDTLS_HKDF_C is not set
# CONFIG_MBEDTLS_THREADING_C is not set
# CONFIG_MBEDTLS_SECURITY_RISKS is not set
# end of mbedTLS
#
# Newlib
#
CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y
# CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set
# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set
# CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set
# CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set
CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y
# CONFIG_NEWLIB_NANO_FORMAT is not set
# end of Newlib
#
# NVS
#
# end of NVS
#
# PThreads
#
CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5
CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072
CONFIG_PTHREAD_STACK_MIN=768
CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1
CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
# end of PThreads
#
# SPI Flash driver
#
# CONFIG_SPI_FLASH_VERIFY_WRITE is not set
# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y
CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set
# CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set
# CONFIG_SPI_FLASH_USE_LEGACY_IMPL is not set
# CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set
# CONFIG_SPI_FLASH_YIELD_DURING_ERASE is not set
CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=4096
# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set
#
# Auto-detect flash chips
#
CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y
CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y
CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y
# end of Auto-detect flash chips
# end of SPI Flash driver
#
# Virtual file system
#
CONFIG_VFS_SUPPORT_IO=y
CONFIG_VFS_SUPPORT_DIR=y
CONFIG_VFS_SUPPORT_SELECT=y
CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y
CONFIG_VFS_SUPPORT_TERMIOS=y
#
# Host File System I/O (Semihosting)
#
CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1
CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
# end of Host File System I/O (Semihosting)
# end of Virtual file system
#
# Supplicant
#
CONFIG_WPA_MBEDTLS_CRYPTO=y
# CONFIG_WPA_DEBUG_PRINT is not set
# CONFIG_WPA_TESTING_OPTIONS is not set
# CONFIG_WPA_WPS_WARS is not set
# end of Supplicant
# end of Component config
#
# Compatibility options
#
# CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set
# end of Compatibility options
# Deprecated options for backward compatibility
CONFIG_TOOLPREFIX="xtensa-esp32s2-elf-"
# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set
# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set
# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set
CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y
# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set
# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set
CONFIG_LOG_BOOTLOADER_LEVEL=3
# CONFIG_APP_ROLLBACK_ENABLE is not set
# CONFIG_FLASH_ENCRYPTION_ENABLED is not set
# CONFIG_FLASHMODE_QIO is not set
# CONFIG_FLASHMODE_QOUT is not set
CONFIG_FLASHMODE_DIO=y
# CONFIG_FLASHMODE_DOUT is not set
# CONFIG_MONITOR_BAUD_9600B is not set
# CONFIG_MONITOR_BAUD_57600B is not set
CONFIG_MONITOR_BAUD_115200B=y
# CONFIG_MONITOR_BAUD_230400B is not set
# CONFIG_MONITOR_BAUD_921600B is not set
# CONFIG_MONITOR_BAUD_2MB is not set
# CONFIG_MONITOR_BAUD_OTHER is not set
CONFIG_MONITOR_BAUD_OTHER_VAL=115200
CONFIG_MONITOR_BAUD=115200
# CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set
CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y
# CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED is not set
CONFIG_OPTIMIZATION_ASSERTIONS_SILENT=y
# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set
# CONFIG_CXX_EXCEPTIONS is not set
CONFIG_STACK_CHECK_NONE=y
# CONFIG_STACK_CHECK_NORM is not set
# CONFIG_STACK_CHECK_STRONG is not set
# CONFIG_STACK_CHECK_ALL is not set
# CONFIG_WARN_WRITE_STRINGS is not set
# CONFIG_DISABLE_GCC8_WARNINGS is not set
# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set
CONFIG_ESP32_APPTRACE_DEST_NONE=y
CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y
CONFIG_ADC2_DISABLE_DAC=y
CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32
CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304
CONFIG_MAIN_TASK_STACK_SIZE=8192
CONFIG_IPC_TASK_STACK_SIZE=1024
CONFIG_CONSOLE_UART_DEFAULT=y
# CONFIG_CONSOLE_UART_CUSTOM is not set
# CONFIG_ESP_CONSOLE_UART_NONE is not set
CONFIG_CONSOLE_UART=y
CONFIG_CONSOLE_UART_NUM=0
CONFIG_CONSOLE_UART_BAUDRATE=115200
CONFIG_INT_WDT=y
CONFIG_INT_WDT_TIMEOUT_MS=300
# CONFIG_TASK_WDT is not set
# CONFIG_EVENT_LOOP_PROFILING is not set
CONFIG_POST_EVENTS_FROM_ISR=y
CONFIG_POST_EVENTS_FROM_IRAM_ISR=y
CONFIG_ESP32S2_PANIC_PRINT_HALT=y
# CONFIG_ESP32S2_PANIC_PRINT_REBOOT is not set
# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set
# CONFIG_ESP32S2_PANIC_GDBSTUB is not set
CONFIG_TIMER_TASK_STACK_SIZE=3584
CONFIG_SUPPORT_STATIC_ALLOCATION=y
# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set
CONFIG_TIMER_TASK_PRIORITY=1
CONFIG_TIMER_TASK_STACK_DEPTH=2048
CONFIG_TIMER_QUEUE_LENGTH=10
# CONFIG_L2_TO_L3_COPY is not set
# CONFIG_USE_ONLY_LWIP_SELECT is not set
CONFIG_ESP_GRATUITOUS_ARP=y
CONFIG_GARP_TMR_INTERVAL=60
CONFIG_TCPIP_RECVMBOX_SIZE=32
CONFIG_TCP_MAXRTX=12
CONFIG_TCP_SYNMAXRTX=6
CONFIG_TCP_MSS=1440
CONFIG_TCP_MSL=60000
CONFIG_TCP_SND_BUF_DEFAULT=2880
CONFIG_TCP_WND_DEFAULT=2880
CONFIG_TCP_RECVMBOX_SIZE=6
CONFIG_TCP_QUEUE_OOSEQ=y
# CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set
CONFIG_TCP_OVERSIZE_MSS=y
# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set
# CONFIG_TCP_OVERSIZE_DISABLE is not set
CONFIG_UDP_RECVMBOX_SIZE=6
CONFIG_TCPIP_TASK_STACK_SIZE=3072
CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
# CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set
CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF
# CONFIG_PPP_SUPPORT is not set
CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5
CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072
CONFIG_ESP32_PTHREAD_STACK_MIN=768
CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1
CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread"
CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y
# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set
# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set
CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y
CONFIG_SUPPORT_TERMIOS=y
CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1
CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
# End of deprecated options

View File

@ -0,0 +1,157 @@
#
# Bootloader config
#
# CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set
# end of Bootloader config
#
# Serial flasher config
#
# CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set
CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
CONFIG_ESPTOOLPY_FLASHFREQ="40m"
# end of Serial flasher config
#
# Partition Table
#
# CONFIG_PARTITION_TABLE_SINGLE_APP is not set
CONFIG_PARTITION_TABLE_CUSTOM=y
# end of Partition Table
#
# Compiler options
#
# CONFIG_COMPILER_OPTIMIZATION_DEFAULT is not set
CONFIG_COMPILER_OPTIMIZATION_SIZE=y
# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE is not set
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT=y
# end of Compiler options
#
# ESP-TLS
#
CONFIG_ESP_TLS_SERVER=y
# end of ESP-TLS
#
# ESP32S2-specific
#
# CONFIG_ESP32S2_DEFAULT_CPU_FREQ_160 is not set
CONFIG_ESP32S2_DEFAULT_CPU_FREQ_240=y
CONFIG_ESP32S2_DEFAULT_CPU_FREQ_MHZ=240
#
# Cache config
#
# CONFIG_ESP32S2_INSTRUCTION_CACHE_8KB is not set
CONFIG_ESP32S2_INSTRUCTION_CACHE_16KB=y
# CONFIG_ESP32S2_DATA_CACHE_8KB is not set
CONFIG_ESP32S2_DATA_CACHE_16KB=y
# end of Cache config
# end of ESP32S2-specific
#
# Common ESP-related
#
CONFIG_ESP_MAIN_TASK_STACK_SIZE=8192
# CONFIG_ESP_TASK_WDT is not set
# end of Common ESP-related
#
# Ethernet
#
# CONFIG_ETH_USE_SPI_ETHERNET is not set
# end of Ethernet
#
# ESP NETIF Adapter
#
# CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER is not set
# end of ESP NETIF Adapter
#
# Wi-Fi
#
CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=4
CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=8
CONFIG_ESP32_WIFI_CACHE_TX_BUFFER_NUM=16
CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=16
# CONFIG_ESP32_WIFI_NVS_ENABLED is not set
# CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE is not set
# end of Wi-Fi
#
# FreeRTOS
#
CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536
# end of FreeRTOS
#
# LWIP
#
CONFIG_LWIP_MAX_SOCKETS=4
CONFIG_LWIP_SO_RCVBUF=y
#
# TCP
#
CONFIG_LWIP_MAX_ACTIVE_TCP=4
CONFIG_LWIP_MAX_LISTENING_TCP=4
CONFIG_LWIP_TCP_SYNMAXRTX=6
CONFIG_LWIP_TCP_SND_BUF_DEFAULT=2880
CONFIG_LWIP_TCP_WND_DEFAULT=2880
CONFIG_LWIP_TCP_RTO_TIME=3000
# end of TCP
# end of LWIP
#
# mbedTLS
#
CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=2048
CONFIG_MBEDTLS_DYNAMIC_BUFFER=y
CONFIG_MBEDTLS_DYNAMIC_FREE_PEER_CERT=y
CONFIG_MBEDTLS_DYNAMIC_FREE_CONFIG_DATA=y
CONFIG_MBEDTLS_DYNAMIC_FREE_CA_CERT=y
#
# Certificate Bundle
#
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y
# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL is not set
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE=y
CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE=y
CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE_PATH="certificates/nina-fw/data/roots.pem"
# end of Certificate Bundle
#
# TLS Key Exchange Methods
#
CONFIG_MBEDTLS_PSK_MODES=y
CONFIG_MBEDTLS_KEY_EXCHANGE_PSK=y
CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_PSK=y
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_PSK=y
CONFIG_MBEDTLS_KEY_EXCHANGE_RSA_PSK=y
# end of TLS Key Exchange Methods
# CONFIG_MBEDTLS_SSL_PROTO_TLS1 is not set
# CONFIG_MBEDTLS_SSL_PROTO_TLS1_1 is not set
CONFIG_MBEDTLS_SSL_PROTO_DTLS=y
# CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set
# end of mbedTLS
#
# SPI Flash driver
#
# CONFIG_SPI_FLASH_YIELD_DURING_ERASE is not set
CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=4096
# end of SPI Flash driver
#
# Deprecated options for backward compatibility
#
# CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set
CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y
# CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED is not set
CONFIG_OPTIMIZATION_ASSERTIONS_SILENT=y
CONFIG_MAIN_TASK_STACK_SIZE=8192
# CONFIG_TASK_WDT is not set
CONFIG_TCP_SYNMAXRTX=6
CONFIG_TCP_SND_BUF_DEFAULT=2880
CONFIG_TCP_WND_DEFAULT=2880
# End of deprecated options

View File

@ -0,0 +1,42 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 microDev
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
// See https://github.com/espressif/esp-idf/issues/6906
#ifndef MICROPY_INCLUDED_ESPRESSIF_ESP32C3_FIX_H
#define MICROPY_INCLUDED_ESPRESSIF_ESP32C3_FIX_H
#ifdef __riscv
#undef __INT32_TYPE__
#define __INT32_TYPE__ int
#undef __UINT32_TYPE__
#define __UINT32_TYPE__ unsigned int
#endif // __riscv
#endif // MICROPY_INCLUDED_ESPRESSIF_ESP32C3_FIX_H

View File

@ -38,6 +38,21 @@ CIRCUITPY_ESPIDF ?= 1
CIRCUITPY_MODULE ?= none
ifeq ($(IDF_TARGET),esp32c3)
CIRCUITPY_USB = 0
CIRCUITPY_ALARM = 0
CIRCUITPY_COUNTIO = 0
CIRCUITPY_ROTARYIO = 0
CIRCUITPY_ANALOGIO = 0
CIRCUITPY_RGBMATRIX = 0
CIRCUITPY_AUDIOBUSIO = 0
CIRCUITPY_FREQUENCYIO = 0
CIRCUITPY_IMAGECAPTURE = 0
CIRCUITPY_PARALLELDISPLAY = 0
CIRCUITPY_TOUCHIO ?= 1
CIRCUITPY_TOUCHIO_USE_NATIVE = 0
endif
# From the ESP32-S2 datasheet:
#
# Endpoint number 0 always present (bi-directional, consisting of EP0 IN and EP0 OUT)

View File

@ -31,16 +31,22 @@
#include "py/mpstate.h"
#include "py/gc.h"
#include "components/xtensa/include/esp_debug_helpers.h"
#include "esp_debug_helpers.h"
#ifdef CONFIG_IDF_TARGET_ESP32C3
#include "components/esp_rom/include/esp32c3/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "components/esp_rom/include/esp32s2/rom/ets_sys.h"
#endif
void mp_hal_delay_us(mp_uint_t delay) {
ets_delay_us(delay);
}
// This is provided by the esp-idf/components/xtensa/esp32s2/libhal.a binary
// blob.
// This is provided by the esp-idf/components/xtensa/esp32s2/libhal.a binary blob.
#ifndef CONFIG_IDF_TARGET_ESP32C3
extern void xthal_window_spill(void);
#endif
mp_uint_t cpu_get_regs_and_sp(mp_uint_t *regs, uint8_t reg_count) {
// xtensa has more registers than an instruction can address. The 16 that
@ -56,6 +62,8 @@ mp_uint_t cpu_get_regs_and_sp(mp_uint_t *regs, uint8_t reg_count) {
// there is a HAL call to do it. There is a bit of a race condition here
// because the register value could change after it's been restored but that
// is unlikely to happen with a heap pointer while we do a GC.
#ifndef CONFIG_IDF_TARGET_ESP32C3
xthal_window_spill();
#endif
return (mp_uint_t)__builtin_frame_address(0);
}

View File

@ -0,0 +1,50 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 microDev
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "peripherals/pins.h"
const mcu_pin_obj_t pin_GPIO0 = PIN(0, ADC_UNIT_1, ADC_CHANNEL_0, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO1 = PIN(1, ADC_UNIT_1, ADC_CHANNEL_1, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO2 = PIN(2, ADC_UNIT_1, ADC_CHANNEL_2, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO3 = PIN(3, ADC_UNIT_1, ADC_CHANNEL_3, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO4 = PIN(4, ADC_UNIT_1, ADC_CHANNEL_4, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO5 = PIN(5, ADC_UNIT_2, ADC_CHANNEL_0, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO6 = PIN(6, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO7 = PIN(7, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO8 = PIN(8, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO9 = PIN(9, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO10 = PIN(10, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO11 = PIN(11, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO12 = PIN(12, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO13 = PIN(13, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO14 = PIN(14, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO15 = PIN(15, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO16 = PIN(16, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO17 = PIN(17, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO18 = PIN(18, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO19 = PIN(19, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO20 = PIN(20, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);
const mcu_pin_obj_t pin_GPIO21 = PIN(21, NO_ADC, NO_ADC_CHANNEL, NO_TOUCH_CHANNEL);

View File

@ -0,0 +1,57 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2021 microDev
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
// DO NOT include this file directly.
// Use shared-bindings/microcontroller/Pin.h instead.
// This ensures that all necessary includes are already included.
#ifndef MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32C3_PINS_H
#define MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32C3_PINS_H
extern const mcu_pin_obj_t pin_GPIO0;
extern const mcu_pin_obj_t pin_GPIO1;
extern const mcu_pin_obj_t pin_GPIO2;
extern const mcu_pin_obj_t pin_GPIO3;
extern const mcu_pin_obj_t pin_GPIO4;
extern const mcu_pin_obj_t pin_GPIO5;
extern const mcu_pin_obj_t pin_GPIO6;
extern const mcu_pin_obj_t pin_GPIO7;
extern const mcu_pin_obj_t pin_GPIO8;
extern const mcu_pin_obj_t pin_GPIO9;
extern const mcu_pin_obj_t pin_GPIO10;
extern const mcu_pin_obj_t pin_GPIO11;
extern const mcu_pin_obj_t pin_GPIO12;
extern const mcu_pin_obj_t pin_GPIO13;
extern const mcu_pin_obj_t pin_GPIO14;
extern const mcu_pin_obj_t pin_GPIO15;
extern const mcu_pin_obj_t pin_GPIO16;
extern const mcu_pin_obj_t pin_GPIO17;
extern const mcu_pin_obj_t pin_GPIO18;
extern const mcu_pin_obj_t pin_GPIO19;
extern const mcu_pin_obj_t pin_GPIO20;
extern const mcu_pin_obj_t pin_GPIO21;
#endif // MICROPY_INCLUDED_ESPRESSIF_PERIPHERALS_ESP32C3_PINS_H

View File

@ -65,7 +65,9 @@ extern const mp_obj_type_t mcu_pin_type;
}
// Choose based on chip
#if CONFIG_IDF_TARGET_ESP32S2
#ifdef CONFIG_IDF_TARGET_ESP32C3
#include "esp32c3/pins.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "esp32s2/pins.h"
#endif

View File

@ -54,14 +54,12 @@
#include "shared-bindings/rtc/__init__.h"
#include "peripherals/rmt.h"
#include "peripherals/pcnt.h"
#include "peripherals/timer.h"
#if CIRCUITPY_COUNTIO || CIRCUITPY_ROTARYIO || CIRCUITPY_FREQUENCYIO
#include "peripherals/pcnt.h"
#include "peripherals/touch.h"
#include "components/esp_rom/include/esp32s2/rom/ets_sys.h"
#include "components/heap/include/esp_heap_caps.h"
#include "components/xtensa/include/esp_debug_helpers.h"
#include "components/soc/esp32s2/include/soc/cache_memory.h"
#include "components/soc/esp32s2/include/soc/rtc_cntl_reg.h"
#endif
#if CIRCUITPY_AUDIOBUSIO
#include "common-hal/audiobusio/__init__.h"
@ -71,6 +69,18 @@
#include "cam.h"
#endif
#include "esp_heap_caps.h"
#include "esp_debug_helpers.h"
#include "soc/cache_memory.h"
#include "soc/rtc_cntl_reg.h"
#ifdef CONFIG_IDF_TARGET_ESP32C3
#include "components/esp_rom/include/esp32c3/rom/ets_sys.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "components/esp_rom/include/esp32s2/rom/ets_sys.h"
#endif
#define HEAP_SIZE (48 * 1024)
uint32_t *heap;
@ -119,17 +129,29 @@ safe_mode_t port_init(void) {
#if defined(DEBUG)
// debug UART
#ifdef CONFIG_IDF_TARGET_ESP32C3
common_hal_never_reset_pin(&pin_GPIO20);
common_hal_never_reset_pin(&pin_GPIO21);
#elif CONFIG_IDF_TARGET_ESP32S2
common_hal_never_reset_pin(&pin_GPIO43);
common_hal_never_reset_pin(&pin_GPIO44);
#endif
#endif
#if defined(DEBUG) || defined(ENABLE_JTAG)
// JTAG
#ifdef CONFIG_IDF_TARGET_ESP32C3
common_hal_never_reset_pin(&pin_GPIO4);
common_hal_never_reset_pin(&pin_GPIO5);
common_hal_never_reset_pin(&pin_GPIO6);
common_hal_never_reset_pin(&pin_GPIO7);
#elif CONFIG_IDF_TARGET_ESP32S2
common_hal_never_reset_pin(&pin_GPIO39);
common_hal_never_reset_pin(&pin_GPIO40);
common_hal_never_reset_pin(&pin_GPIO41);
common_hal_never_reset_pin(&pin_GPIO42);
#endif
#endif
#ifdef CONFIG_SPIRAM
heap = (uint32_t *)(DRAM0_CACHE_ADDRESS_HIGH - CONFIG_SPIRAM_SIZE);
@ -183,7 +205,7 @@ void reset_port(void) {
uart_reset();
#endif
#if defined(CIRCUITPY_COUNTIO) || defined(CIRCUITPY_ROTARYIO)
#if CIRCUITPY_COUNTIO || CIRCUITPY_ROTARYIO || CIRCUITPY_FREQUENCYIO
peripherals_pcnt_reset();
#endif
@ -234,7 +256,9 @@ void reset_to_bootloader(void) {
}
void reset_cpu(void) {
#ifndef CONFIG_IDF_TARGET_ESP32C3
esp_backtrace_print(100);
#endif
esp_restart();
}

View File

@ -32,11 +32,17 @@
#include "lib/utils/interrupt_char.h"
#include "lib/mp-readline/readline.h"
#include "hal/gpio_ll.h"
#include "soc/usb_periph.h"
#include "components/driver/include/driver/gpio.h"
#include "components/driver/include/driver/periph_ctrl.h"
#ifdef CONFIG_IDF_TARGET_ESP32C3
#include "components/esp_rom/include/esp32c3/rom/gpio.h"
#elif CONFIG_IDF_TARGET_ESP32S2
#include "components/esp_rom/include/esp32s2/rom/gpio.h"
#include "components/hal/esp32s2/include/hal/gpio_ll.h"
#include "components/soc/esp32s2/include/soc/usb_periph.h"
#endif
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"

View File

@ -150,12 +150,14 @@ STATIC mp_obj_t wifi_radio_set_hostname(mp_obj_t self_in, mp_obj_t hostname_in)
mp_raise_ValueError(translate("Hostname must be between 1 and 253 characters"));
}
#ifndef CONFIG_IDF_TARGET_ESP32C3
regex_t regex; // validate hostname according to RFC 1123
regcomp(&regex,"^(([a-z0-9]|[a-z0-9][a-z0-9\\-]{0,61}[a-z0-9])\\.)*([a-z0-9]|[a-z0-9][a-z0-9\\-]{0,61}[a-z0-9])$", REG_EXTENDED | REG_ICASE | REG_NOSUB);
if (regexec(&regex, hostname.buf, 0, NULL, 0)) {
mp_raise_ValueError(translate("invalid hostname"));
}
regfree(&regex);
#endif
wifi_radio_obj_t *self = MP_OBJ_TO_PTR(self_in);
common_hal_wifi_radio_set_hostname(self, hostname.buf);

View File

@ -322,7 +322,9 @@ STATIC bool _refresh_area(displayio_display_obj_t *self, const displayio_area_t
// TODO(tannewt): Make refresh displays faster so we don't starve other
// background tasks.
#if CIRCUITPY_USB
usb_background();
#endif
}
return true;
}

View File

@ -331,7 +331,9 @@ bool displayio_epaperdisplay_refresh_area(displayio_epaperdisplay_obj_t *self, c
// TODO(tannewt): Make refresh displays faster so we don't starve other
// background tasks.
#if CIRCUITPY_USB
usb_background();
#endif
}
}

View File

@ -246,7 +246,9 @@ STATIC bool _refresh_area(framebufferio_framebufferdisplay_obj_t *self, const di
// TODO(tannewt): Make refresh displays faster so we don't starve other
// background tasks.
#if CIRCUITPY_USB
usb_background();
#endif
}
return true;
}