samd/mphalport: Add pin open-drain funcs, and improve delay and ticks.
The changes in this commit are: - Add an interface for pin open-drain mode. - Improve ticks_us() by using the us-counter. - Improve ticks_cpu() by using the CPU's SysTick.
This commit is contained in:
robert-hh
Damien George
parent
5af54ad61f
commit
3d9940bc28
@ -4,6 +4,7 @@
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Damien P. George
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* Copyright (c) 2022 Robert Hammelrath
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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@ -27,10 +28,13 @@
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#include "py/runtime.h"
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#include "py/mphal.h"
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#include "py/stream.h"
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#include "shared/runtime/interrupt_char.h"
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#include "extmod/misc.h"
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#include "samd_soc.h"
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#include "tusb.h"
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#if MICROPY_KBD_EXCEPTION
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int mp_interrupt_char = -1;
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void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char) {
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(void)itf;
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@ -40,24 +44,47 @@ void tud_cdc_rx_wanted_cb(uint8_t itf, char wanted_char) {
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}
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void mp_hal_set_interrupt_char(int c) {
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mp_interrupt_char = c;
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tud_cdc_set_wanted_char(c);
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}
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#endif
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void mp_hal_set_pin_mux(mp_hal_pin_obj_t pin, uint8_t mux) {
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int pin_grp = pin / 32;
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int port_grp = (pin % 32) / 2;
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PORT->Group[pin_grp].PINCFG[pin % 32].bit.PMUXEN = 1; // Enable Mux
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if (pin & 1) {
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PORT->Group[pin_grp].PMUX[port_grp].bit.PMUXO = mux;
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} else {
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PORT->Group[pin_grp].PMUX[port_grp].bit.PMUXE = mux;
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}
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}
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void mp_hal_delay_ms(mp_uint_t ms) {
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ms += 1;
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uint32_t t0 = systick_ms;
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while (systick_ms - t0 < ms) {
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MICROPY_EVENT_POLL_HOOK
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if (ms > 10) {
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uint32_t t0 = systick_ms;
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while (systick_ms - t0 < ms) {
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MICROPY_EVENT_POLL_HOOK
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}
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} else {
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mp_hal_delay_us(ms * 1000);
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}
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}
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void mp_hal_delay_us(mp_uint_t us) {
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uint32_t ms = us / 1000 + 1;
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uint32_t t0 = systick_ms;
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while (systick_ms - t0 < ms) {
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__WFI();
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if (us > 0) {
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uint32_t start = mp_hal_ticks_us();
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#if defined(MCU_SAMD21)
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// SAMD21 counter has effective 32 bit width
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while ((mp_hal_ticks_us() - start) < us) {
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}
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#elif defined(MCU_SAMD51)
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// SAMD51 counter has effective 29 bit width
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while (((mp_hal_ticks_us() - start) & (MICROPY_PY_UTIME_TICKS_PERIOD - 1)) < us) {
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}
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#endif
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}
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}
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@ -78,7 +105,7 @@ int mp_hal_stdin_rx_chr(void) {
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return buf[0];
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}
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}
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__WFI();
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MICROPY_EVENT_POLL_HOOK
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}
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}
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@ -90,7 +117,7 @@ void mp_hal_stdout_tx_strn(const char *str, mp_uint_t len) {
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n = CFG_TUD_CDC_EP_BUFSIZE;
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}
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while (n > tud_cdc_write_available()) {
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__WFI();
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MICROPY_EVENT_POLL_HOOK
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}
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uint32_t n2 = tud_cdc_write(str + i, n);
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tud_cdc_write_flush();
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@ -4,6 +4,7 @@
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* The MIT License (MIT)
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*
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* Copyright (c) 2019-2021 Damien P. George
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* Copyright (c) 2022 Robert Hammelrath
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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@ -27,25 +28,49 @@
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#define MICROPY_INCLUDED_SAMD_MPHALPORT_H
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#include "py/mpconfig.h"
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#include "py/ringbuf.h"
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// ASF4
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#include "hal_gpio.h"
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#include "hpl_time_measure.h"
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#include "sam.h"
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extern int mp_interrupt_char;
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extern ringbuf_t stdin_ringbuf;
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extern volatile uint32_t systick_ms;
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extern volatile uint32_t systick_ms_upper;
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void mp_hal_set_interrupt_char(int c);
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#define mp_hal_delay_us_fast mp_hal_delay_us
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static inline mp_uint_t mp_hal_ticks_ms(void) {
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return systick_ms;
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}
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static inline mp_uint_t mp_hal_ticks_us(void) {
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#if defined(MCU_SAMD21)
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return REG_TC4_COUNT32_COUNT;
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#elif defined(MCU_SAMD51)
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TC0->COUNT32.CTRLBSET.reg = TC_CTRLBSET_CMD_READSYNC;
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while (TC0->COUNT32.CTRLBSET.reg != 0) {
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}
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return REG_TC0_COUNT32_COUNT >> 3;
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#else
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return systick_ms * 1000;
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#endif
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}
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// ticks_cpu is limited to a 1 ms period, since the CPU SysTick counter
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// is used for the 1 ms SysTick_Handler interrupt.
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static inline mp_uint_t mp_hal_ticks_cpu(void) {
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return 0;
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return (system_time_t)SysTick->VAL;
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}
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static inline uint64_t mp_hal_time_ns(void) {
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return ((uint64_t)systick_ms + (uint64_t)systick_ms_upper * 0x100000000) * 1000000;
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}
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// C-level pin HAL
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@ -55,9 +80,10 @@ static inline mp_uint_t mp_hal_ticks_cpu(void) {
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#define MP_HAL_PIN_FMT "%u"
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#define mp_hal_pin_obj_t uint
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extern uint32_t machine_pin_open_drain_mask;
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extern uint32_t machine_pin_open_drain_mask[];
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mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t pin_in);
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void mp_hal_set_pin_mux(mp_hal_pin_obj_t pin, uint8_t mux);
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static inline unsigned int mp_hal_pin_name(mp_hal_pin_obj_t pin) {
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return pin;
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@ -65,18 +91,22 @@ static inline unsigned int mp_hal_pin_name(mp_hal_pin_obj_t pin) {
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static inline void mp_hal_pin_input(mp_hal_pin_obj_t pin) {
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gpio_set_pin_direction(pin, GPIO_DIRECTION_IN);
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machine_pin_open_drain_mask &= ~(1 << pin);
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machine_pin_open_drain_mask[pin / 32] &= ~(1 << (pin % 32));
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}
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static inline void mp_hal_pin_output(mp_hal_pin_obj_t pin) {
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gpio_set_pin_direction(pin, GPIO_DIRECTION_OUT);
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machine_pin_open_drain_mask &= ~(1 << pin);
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machine_pin_open_drain_mask[pin / 32] &= ~(1 << (pin % 32));
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}
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static inline void mp_hal_pin_open_drain(mp_hal_pin_obj_t pin) {
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gpio_set_pin_direction(pin, GPIO_DIRECTION_IN);
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gpio_set_pin_level(pin, 0);
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machine_pin_open_drain_mask |= 1 << pin;
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machine_pin_open_drain_mask[pin / 32] |= 1 << (pin % 32);
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}
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static inline unsigned int mp_hal_get_pin_direction(mp_hal_pin_obj_t pin) {
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return (PORT->Group[pin / 32].DIR.reg & (1 << (pin % 32))) >> (pin % 32);
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}
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static inline int mp_hal_pin_read(mp_hal_pin_obj_t pin) {
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@ -87,7 +117,14 @@ static inline void mp_hal_pin_write(mp_hal_pin_obj_t pin, int v) {
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gpio_set_pin_level(pin, v);
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}
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/*
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static inline void mp_hal_pin_low(mp_hal_pin_obj_t pin) {
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gpio_set_pin_level(pin, 0);
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}
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static inline void mp_hal_pin_high(mp_hal_pin_obj_t pin) {
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gpio_set_pin_level(pin, 1);
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}
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static inline void mp_hal_pin_od_low(mp_hal_pin_obj_t pin) {
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gpio_set_pin_direction(pin, GPIO_DIRECTION_OUT);
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}
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@ -95,6 +132,5 @@ static inline void mp_hal_pin_od_low(mp_hal_pin_obj_t pin) {
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static inline void mp_hal_pin_od_high(mp_hal_pin_obj_t pin) {
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gpio_set_pin_direction(pin, GPIO_DIRECTION_IN);
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}
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*/
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#endif // MICROPY_INCLUDED_SAMD_MPHALPORT_H
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