From 3ce6fc89a4b5bb97edc8568d1cd41aed04635b94 Mon Sep 17 00:00:00 2001
From: Lucian Copeland <hierophect@gmail.com>
Date: Tue, 4 Feb 2020 10:38:45 -0500
Subject: [PATCH] Implement new linker for external flash only

---
 ports/stm32f4/Makefile                        |   2 +-
 ports/stm32f4/boards/STM32F405_default.ld     | 107 ++++++++++++++++++
 .../mpconfigboard.mk                          |   2 +-
 3 files changed, 109 insertions(+), 2 deletions(-)
 create mode 100644 ports/stm32f4/boards/STM32F405_default.ld

diff --git a/ports/stm32f4/Makefile b/ports/stm32f4/Makefile
index 082d050390..3a6191c851 100755
--- a/ports/stm32f4/Makefile
+++ b/ports/stm32f4/Makefile
@@ -119,7 +119,7 @@ ifndef LD_FILE
         BOOTLOADER_OFFSET = $(UF2_OFFSET)
         CFLAGS += -DUF2_BOOTLOADER_ENABLED
     else
-        LD_FILE = $(LD_FS)
+        LD_FILE = $(LD_DEFAULT)
     endif
 endif
 
diff --git a/ports/stm32f4/boards/STM32F405_default.ld b/ports/stm32f4/boards/STM32F405_default.ld
new file mode 100644
index 0000000000..c2b8c843ee
--- /dev/null
+++ b/ports/stm32f4/boards/STM32F405_default.ld
@@ -0,0 +1,107 @@
+/*
+    GNU linker script for STM32F405 via Micropython
+*/
+
+/* Specify the memory areas */
+MEMORY
+{
+    FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
+    FLASH_ISR (rx)  : ORIGIN = 0x08000000, LENGTH = 16K /* sector 0 */
+    FLASH_TEXT (rx) : ORIGIN = 0x08004000, LENGTH = 1008K /* sectors 0-7*/
+    CCMRAM (xrw)    : ORIGIN = 0x10000000, LENGTH = 64K
+    RAM (xrw)       : ORIGIN = 0x20000000, LENGTH = 128K
+}
+
+/* produce a link error if there is not this amount of RAM for these sections */
+_minimum_stack_size = 2K;
+_minimum_heap_size = 16K;
+
+/* Define tho top end of the stack.  The stack is full descending so begins just
+   above last byte of RAM.  Note that EABI requires the stack to be 8-byte
+   aligned for a call. */
+_estack = ORIGIN(RAM) + LENGTH(RAM);
+
+/* RAM extents for the garbage collector */
+_ram_start = ORIGIN(RAM);
+_ram_end = ORIGIN(RAM) + LENGTH(RAM);
+
+ENTRY(Reset_Handler)
+
+/* define output sections */
+SECTIONS
+{
+    /* The startup code goes first into FLASH */
+    .isr_vector :
+    {
+        . = ALIGN(4);
+        KEEP(*(.isr_vector)) /* Startup code */
+
+        /* This first flash block is 16K annd the isr vectors only take up
+           about 400 bytes. Micropython pads this with files, but this didn't
+           work with the size of Circuitpython's ff object. */
+
+        . = ALIGN(4);
+    } >FLASH_ISR
+
+    /* The program code and other data goes into FLASH */
+    .text :
+    {
+        . = ALIGN(4);
+        *(.text*)          /* .text* sections (code) */
+        *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    /*  *(.glue_7)   */    /* glue arm to thumb code */
+    /*  *(.glue_7t)  */    /* glue thumb to arm code */
+
+        . = ALIGN(4);
+        _etext = .;        /* define a global symbol at end of code */
+    } >FLASH_TEXT
+
+    /* used by the startup to initialize data */
+    _sidata = LOADADDR(.data);
+
+    /* This is the initialized data section
+    The program executes knowing that the data is in the RAM
+    but the loader puts the initial values in the FLASH (inidata).
+    It is one task of the startup to copy the initial values from FLASH to RAM. */
+    .data :
+    {
+        . = ALIGN(4);
+        _sdata = .;        /* create a global symbol at data start; used by startup code in order to initialise the .data section in RAM */
+        *(.data*)          /* .data* sections */
+
+        . = ALIGN(4);
+        _edata = .;        /* define a global symbol at data end; used by startup code in order to initialise the .data section in RAM */
+    } >RAM AT> FLASH_TEXT
+
+    /* Uninitialized data section */
+    .bss :
+    {
+        . = ALIGN(4);
+        _sbss = .;         /* define a global symbol at bss start; used by startup code */
+        *(.bss*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        _ebss = .;         /* define a global symbol at bss end; used by startup code and GC */
+    } >RAM
+
+    /* this is to define the start of the heap, and make sure we have a minimum size */
+    .heap :
+    {
+        . = ALIGN(4);
+        . = . + _minimum_heap_size;
+        . = ALIGN(4);
+    } >RAM
+
+    /* this just checks there is enough RAM for the stack */
+    .stack :
+    {
+        . = ALIGN(4);
+        . = . + _minimum_stack_size;
+        . = ALIGN(4);
+    } >RAM
+
+    .ARM.attributes 0 : { *(.ARM.attributes) }
+}
+
+
diff --git a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk
index 3fc8581ef9..312ca6b480 100644
--- a/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk
+++ b/ports/stm32f4/boards/feather_stm32f405_express/mpconfigboard.mk
@@ -16,7 +16,7 @@ MCU_PACKAGE = 64
 CMSIS_MCU = STM32F405xx
 
 # Default includes filesystem, but uses external flash
-LD_FS = boards/STM32F405_fs.ld 
+LD_DEFAULT = boards/STM32F405_default.ld 
 LD_BOOT = boards/STM32F405_boot.ld # UF2 boot option
 UF2_OFFSET = 0x8010000