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nrf5/hal: Updating uart hal to use pointers to Pin objects instead of uint pin and port number.

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This commit is contained in:
Glenn Ruben Bakke 2017-01-26 21:57:38 +01:00
parent afcf07ca76
commit 3c6c6c6d05
2 changed files with 28 additions and 22 deletions
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20
nrf5/hal/hal_uart.h
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@ -109,18 +109,14 @@ typedef struct
} UART_HandleTypeDef; } UART_HandleTypeDef;
typedef struct { typedef struct {
uint8_t rx_pin; /**< RX pin number. */ const pin_obj_t * rx_pin; /**< RX pin. */
uint8_t tx_pin; /**< TX pin number. */ const pin_obj_t * tx_pin; /**< TX pin. */
uint8_t rts_pin; /**< RTS pin number, only used if flow control is enabled. */ const pin_obj_t * rts_pin; /**< RTS pin, only used if flow control is enabled. */
uint8_t cts_pin; /**< CTS pin number, only used if flow control is enabled. */ const pin_obj_t * cts_pin; /**< CTS pin, only used if flow control is enabled. */
uint8_t rx_pin_port; /**< RX port number. */ bool flow_control; /**< Flow control setting, if flow control is used, the system will use low power UART mode, based on CTS signal. */
uint8_t tx_pin_port; /**< TX port number. */ bool use_parity; /**< Even parity if TRUE, no parity if FALSE. */
uint8_t rts_pin_port; /**< RTS port number, only used if flow control is enabled. */ uint32_t baud_rate; /**< Baud rate configuration. */
uint8_t cts_pin_port; /**< CTS port number, only used if flow control is enabled. */ uint32_t irq_priority; /**< UARTE IRQ priority. */
bool flow_control; /**< Flow control setting, if flow control is used, the system will use low power UART mode, based on CTS signal. */
bool use_parity; /**< Even parity if TRUE, no parity if FALSE. */
uint32_t baud_rate; /**< Baud rate configuration. */
uint32_t irq_priority; /**< UARTE IRQ priority. */
} hal_uart_init_t; } hal_uart_init_t;

30
nrf5/hal/hal_uarte.c
View File

@ -83,9 +83,9 @@ void nrf_sendchar(int ch) {
} }
void nrf_uart_init(hal_uart_init_t const * p_uart_init) { void nrf_uart_init(hal_uart_init_t const * p_uart_init) {
hal_gpio_cfg_pin(p_uart_init->tx_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); hal_gpio_cfg_pin(p_uart_init->tx_pin->port, p_uart_init->tx_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED);
hal_gpio_pin_set(p_uart_init->tx_pin); hal_gpio_pin_set(p_uart_init->tx_pin->port, p_uart_init->tx_pin->pin);
hal_gpio_cfg_pin(p_uart_init->rx_pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); hal_gpio_cfg_pin(p_uart_init->tx_pin->port, p_uart_init->rx_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED);
UARTE_BASE->BAUDRATE = (hal_uart_baudrate_lookup[p_uart_init->baud_rate]); UARTE_BASE->BAUDRATE = (hal_uart_baudrate_lookup[p_uart_init->baud_rate]);
@ -99,16 +99,26 @@ void nrf_uart_init(hal_uart_init_t const * p_uart_init) {
UARTE_BASE->CONFIG = (uint32_t)hwfc | (uint32_t)parity; UARTE_BASE->CONFIG = (uint32_t)hwfc | (uint32_t)parity;
UARTE_BASE->PSEL.RXD = p_uart_init->rx_pin; UARTE_BASE->PSEL.RXD = p_uart_init->rx_pin->pin;
UARTE_BASE->PSEL.TXD = p_uart_init->tx_pin; UARTE_BASE->PSEL.TXD = p_uart_init->tx_pin->pin;
#if NRF52840_XXAA
UARTE_BASE->PSEL.RXD |= (p_uart_init->rx_pin->port << UARTE_PSEL_RXD_PORT_Pos);
UARTE_BASE->PSEL.TXD |= (p_uart_init->tx_pin->port << UARTE_PSEL_TXD_PORT_Pos);
#endif
if (hwfc) { if (hwfc) {
hal_gpio_cfg_pin(p_uart_init->cts_pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED); hal_gpio_cfg_pin(p_uart_init->cts_pin->port, p_uart_init->cts_pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED);
hal_gpio_cfg_pin(p_uart_init->rts_pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED); hal_gpio_cfg_pin(p_uart_init->rts_pin->port, p_uart_init->rts_pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED);
hal_gpio_pin_set(p_uart_init->rts_pin); hal_gpio_pin_set(p_uart_init->rts_pin->port, p_uart_init->rts_pin->pin);
UARTE_BASE->PSEL.RTS = p_uart_init->rts_pin; UARTE_BASE->PSEL.RTS = p_uart_init->rts_pin->pin;
UARTE_BASE->PSEL.CTS = p_uart_init->cts_pin; UARTE_BASE->PSEL.CTS = p_uart_init->cts_pin->pin;
#if NRF52840_XXAA
UARTE_BASE->PSEL.RTS |= (p_uart_init->rx_pin->port << UARTE_PSEL_RTS_PORT_Pos);
UARTE_BASE->PSEL.CTS |= (p_uart_init->rx_pin->port << UARTE_PSEL_CTS_PORT_Pos);
#endif
} }
nrf_uart_irq_enable(p_uart_init->irq_priority); nrf_uart_irq_enable(p_uart_init->irq_priority);