nrf5/hal: Moving hal_gpio functions, types and defines from mphalport.h to a new hal_gpio.h.
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Glenn Ruben Bakke
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800a399182
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3b15d33809
91
nrf5/hal/hal_gpio.h
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91
nrf5/hal/hal_gpio.h
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/*
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* This file is part of the Micro Python project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2017 Glenn Ruben Bakke
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef HAL_GPIO_H__
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#define HAL_GPIO_H__
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#if NRF51
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#define POINTERS (const uint32_t[]){NRF_GPIO_BASE}
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#endif
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#if NRF52
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#ifdef NRF52832_XXAA
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#define POINTERS (const uint32_t[]){NRF_P0_BASE}
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#endif
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#ifdef NRF52840_XXAA
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#define POINTERS (const uint32_t[]){NRF_P0_BASE, NRF_P1_BASE}
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#endif
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#endif
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#define GPIO_BASE(x) ((NRF_GPIO_Type *)POINTERS[x])
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#define hal_gpio_pin_high(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->OUTSET = (p)->pin_mask)
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#define hal_gpio_pin_low(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->OUTCLR = (p)->pin_mask)
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#define hal_gpio_pin_read(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->IN >> ((p)->pin) & 1)
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typedef enum {
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HAL_GPIO_PULL_DISABLED = (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos),
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HAL_GPIO_PULL_DOWN = (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos),
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HAL_GPIO_PULL_UP = (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
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} hal_gpio_pull_t;
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typedef enum {
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HAL_GPIO_MODE_OUTPUT = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos),
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HAL_GPIO_MODE_INPUT = (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos),
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} hal_gpio_mode_t;
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static inline void hal_gpio_cfg_pin(uint8_t port, uint32_t pin_number, hal_gpio_mode_t mode, hal_gpio_pull_t pull) {
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GPIO_BASE(port)->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
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| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
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| pull
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| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
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| mode;
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}
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static inline void hal_gpio_out_set(uint8_t port, uint32_t pin_mask) {
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GPIO_BASE(port)->OUTSET = pin_mask;
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}
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static inline void hal_gpio_pin_set(uint8_t port, uint32_t pin) {
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GPIO_BASE(port)->OUTSET = (1 << pin);
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}
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static inline void hal_gpio_pin_clear(uint8_t port, uint32_t pin) {
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GPIO_BASE(port)->OUTCLR = (1 << pin);
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}
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static inline void hal_gpio_pin_toggle(uint8_t port, uint32_t pin) {
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uint32_t pin_mask = (1 << pin);
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if (GPIO_BASE(port)->OUT ^ pin_mask) {
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GPIO_BASE(port)->OUTSET = pin_mask;
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} else {
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GPIO_BASE(port)->OUTCLR = pin_mask;
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}
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}
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#endif // HAL_GPIO_H__
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@ -30,6 +30,7 @@
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#include "py/mpconfig.h"
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#include NRF5_HAL_H
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#include "pin.h"
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#include "hal_gpio.h"
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typedef enum
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{
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@ -39,85 +40,6 @@ typedef enum
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HAL_TIMEOUT = 0x03
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} HAL_StatusTypeDef;
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#if NRF51
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#define POINTERS (const uint32_t[]){NRF_GPIO_BASE}
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#endif
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#if NRF52
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#ifdef NRF52832_XXAA
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#define POINTERS (const uint32_t[]){NRF_P0_BASE}
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#endif
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#ifdef NRF52840_XXAA
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#define POINTERS (const uint32_t[]){NRF_P0_BASE, NRF_P1_BASE}
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#endif
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#endif
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#define GPIO_BASE(x) ((NRF_GPIO_Type *)POINTERS[x])
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/**
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* @brief GPIO Init structure definition
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*/
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typedef struct
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{
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uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
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This parameter can be any value of @ref GPIO_pins_define */
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uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
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This parameter can be a value of @ref GPIO_mode_define */
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uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
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This parameter can be a value of @ref GPIO_pull_define */
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uint32_t Speed; /*!< Specifies the speed for the selected pins.
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This parameter can be a value of @ref GPIO_speed_define */
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uint32_t Alternate; /*!< Peripheral to be connected to the selected pins.
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This parameter can be a value of @ref GPIO_Alternat_function_selection */
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} GPIO_InitTypeDef;
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typedef enum {
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HAL_GPIO_PULL_DISABLED = (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos),
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HAL_GPIO_PULL_DOWN = (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos),
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HAL_GPIO_PULL_UP = (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
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} hal_gpio_pull_t;
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typedef enum {
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HAL_GPIO_MODE_OUTPUT = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos),
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HAL_GPIO_MODE_INPUT = (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos),
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} hal_gpio_mode_t;
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static inline void hal_gpio_cfg_pin(uint8_t port, uint32_t pin_number, hal_gpio_mode_t mode, hal_gpio_pull_t pull) {
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GPIO_BASE(port)->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
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| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
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| pull
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| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
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| mode;
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}
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static inline void hal_gpio_out_set(uint8_t port, uint32_t pin_mask) {
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GPIO_BASE(port)->OUTSET = pin_mask;
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}
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static inline void hal_gpio_pin_set(uint8_t port, uint32_t pin) {
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GPIO_BASE(port)->OUTSET = (1 << pin);
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}
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static inline void hal_gpio_pin_clear(uint8_t port, uint32_t pin) {
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GPIO_BASE(port)->OUTCLR = (1 << pin);
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}
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static inline void hal_gpio_pin_toggle(uint8_t port, uint32_t pin) {
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uint32_t pin_mask = (1 << pin);
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if (GPIO_BASE(port)->OUT ^ pin_mask) {
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GPIO_BASE(port)->OUTSET = pin_mask;
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} else {
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GPIO_BASE(port)->OUTCLR = pin_mask;
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}
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}
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static inline uint32_t hal_tick_fake(void) {
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return 0;
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}
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@ -134,9 +56,9 @@ void mp_hal_stdout_tx_str(const char *str);
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#define mp_hal_pin_obj_t const pin_obj_t*
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#define mp_hal_get_pin_obj(o) pin_find(o)
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#define mp_hal_pin_high(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->OUTSET = (p)->pin_mask)
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#define mp_hal_pin_low(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->OUTCLR = (p)->pin_mask)
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#define mp_hal_pin_read(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->IN >> ((p)->pin) & 1)
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#define mp_hal_pin_high(p) hal_gpio_pin_high(p)
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#define mp_hal_pin_low(p) hal_gpio_pin_low(p)
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#define mp_hal_pin_read(p) hal_gpio_pin_read(p)
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#define mp_hal_pin_write(p, v) do { if (v) { mp_hal_pin_high(p); } else { mp_hal_pin_low(p); } } while (0)
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#define mp_hal_pin_od_low(p) mp_hal_pin_low(p)
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#define mp_hal_pin_od_high(p) mp_hal_pin_high(p)
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