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nrf: Rewrite the DigitalInOut hal using nRFx

This commit is contained in:
arturo182 2018-07-08 17:48:32 +02:00
parent 25ece8fb3d
commit 388f554ff6
8 changed files with 81 additions and 268 deletions
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2
ports/nrf/common-hal/analogio/AnalogIn.c
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@ -37,7 +37,7 @@ void common_hal_analogio_analogin_construct(analogio_analogin_obj_t *self, const
if (pin->adc_channel == 0)
mp_raise_ValueError("Pin does not have ADC capabilities");
hal_gpio_cfg_pin(pin->port, pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED);
nrf_gpio_cfg_default(NRF_GPIO_PIN_MAP(pin->port, pin->pin));
self->pin = pin;
}

140
ports/nrf/common-hal/digitalio/DigitalInOut.c
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@ -24,146 +24,148 @@
* THE SOFTWARE.
*/
#include <stdint.h>
#include <string.h>
#include "py/runtime.h"
#include "py/mphal.h"
#include "hal/hal_gpio.h"
#include "common-hal/microcontroller/Pin.h"
#include "shared-bindings/digitalio/DigitalInOut.h"
#include "py/runtime.h"
#include "nrf_gpio.h"
digitalinout_result_t common_hal_digitalio_digitalinout_construct(
digitalio_digitalinout_obj_t* self, const mcu_pin_obj_t* pin) {
digitalio_digitalinout_obj_t *self, const mcu_pin_obj_t *pin) {
self->pin = pin;
hal_gpio_cfg_pin(pin->port, pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED);
nrf_gpio_cfg_input(NRF_GPIO_PIN_MAP(pin->port, pin->pin), NRF_GPIO_PIN_NOPULL);
return DIGITALINOUT_OK;
}
bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t* self) {
bool common_hal_digitalio_digitalinout_deinited(digitalio_digitalinout_obj_t *self) {
return self->pin == mp_const_none;
}
void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t* self) {
void common_hal_digitalio_digitalinout_deinit(digitalio_digitalinout_obj_t *self) {
if (common_hal_digitalio_digitalinout_deinited(self)) {
return;
}
reset_pin(self->pin->pin);
const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin);
nrf_gpio_cfg_default(pin);
self->pin = mp_const_none;
}
void common_hal_digitalio_digitalinout_switch_to_input(
digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) {
self->output = false;
digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) {
const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin);
nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_NOPULL);
hal_gpio_cfg_pin(self->pin->port, self->pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED);
common_hal_digitalio_digitalinout_set_pull(self, pull);
}
void common_hal_digitalio_digitalinout_switch_to_output(
digitalio_digitalinout_obj_t* self, bool value,
digitalio_digitalinout_obj_t *self, bool value,
digitalio_drive_mode_t drive_mode) {
const uint8_t pin = self->pin->pin;
const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin);
self->output = true;
self->open_drain = (drive_mode == DRIVE_MODE_OPEN_DRAIN);
hal_gpio_cfg_pin(self->pin->port, pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED);
nrf_gpio_cfg_input(pin, NRF_GPIO_PIN_NOPULL);
common_hal_digitalio_digitalinout_set_value(self, value);
}
digitalio_direction_t common_hal_digitalio_digitalinout_get_direction(
digitalio_digitalinout_obj_t* self) {
return self->output? DIRECTION_OUTPUT : DIRECTION_INPUT;
digitalio_digitalinout_obj_t *self) {
const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin);
return (nrf_gpio_pin_dir_get(pin) == NRF_GPIO_PIN_DIR_OUTPUT) ? DIRECTION_OUTPUT : DIRECTION_INPUT;
}
void common_hal_digitalio_digitalinout_set_value(
digitalio_digitalinout_obj_t* self, bool value) {
if (value) {
if (self->open_drain) {
hal_gpio_dir_set(self->pin->port, self->pin->pin, HAL_GPIO_MODE_INPUT);
} else {
hal_gpio_pin_set(self->pin->port, self->pin->pin);
hal_gpio_dir_set(self->pin->port, self->pin->pin, HAL_GPIO_MODE_OUTPUT);
}
digitalio_digitalinout_obj_t *self, bool value) {
const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin);
if (value && self->open_drain) {
nrf_gpio_pin_dir_set(pin, NRF_GPIO_PIN_DIR_INPUT);
} else {
hal_gpio_pin_clear(self->pin->port, self->pin->pin);
hal_gpio_dir_set(self->pin->port, self->pin->pin, HAL_GPIO_MODE_OUTPUT);
nrf_gpio_pin_dir_set(pin, NRF_GPIO_PIN_DIR_OUTPUT);
nrf_gpio_pin_write(pin, value);
}
}
bool common_hal_digitalio_digitalinout_get_value(
digitalio_digitalinout_obj_t* self) {
const uint8_t pin = self->pin->pin;
if (!self->output) {
return hal_gpio_pin_read(self->pin);
} else {
if (self->open_drain && hal_gpio_dir_get(self->pin->port, self->pin->pin) == HAL_GPIO_MODE_INPUT) {
digitalio_digitalinout_obj_t *self) {
const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin);
const nrf_gpio_pin_dir_t dir = nrf_gpio_pin_dir_get(pin);
if (dir == NRF_GPIO_PIN_DIR_INPUT) {
if (self->open_drain)
return true;
} else {
return (GPIO_BASE(self->pin->port)->OUT >> pin) & 1;
}
return nrf_gpio_pin_read(pin);
}
return nrf_gpio_pin_out_read(pin);
}
void common_hal_digitalio_digitalinout_set_drive_mode(
digitalio_digitalinout_obj_t* self,
digitalio_digitalinout_obj_t *self,
digitalio_drive_mode_t drive_mode) {
bool value = common_hal_digitalio_digitalinout_get_value(self);
const bool value = common_hal_digitalio_digitalinout_get_value(self);
self->open_drain = drive_mode == DRIVE_MODE_OPEN_DRAIN;
// True is implemented differently between modes so reset the value to make
// sure its correct for the new mode.
if (value) {
if (value)
common_hal_digitalio_digitalinout_set_value(self, value);
}
}
digitalio_drive_mode_t common_hal_digitalio_digitalinout_get_drive_mode(
digitalio_digitalinout_obj_t* self) {
if (self->open_drain) {
digitalio_digitalinout_obj_t *self) {
if (self->open_drain)
return DRIVE_MODE_OPEN_DRAIN;
} else {
return DRIVE_MODE_PUSH_PULL;
}
return DRIVE_MODE_PUSH_PULL;
}
void common_hal_digitalio_digitalinout_set_pull(
digitalio_digitalinout_obj_t* self, digitalio_pull_t pull) {
hal_gpio_pull_t asf_pull = HAL_GPIO_PULL_DISABLED;
digitalio_digitalinout_obj_t *self, digitalio_pull_t pull) {
const uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin);
nrf_gpio_pin_pull_t hal_pull = NRF_GPIO_PIN_NOPULL;
switch (pull) {
case PULL_UP:
asf_pull = HAL_GPIO_PULL_UP;
hal_pull = NRF_GPIO_PIN_PULLUP;
break;
case PULL_DOWN:
asf_pull = HAL_GPIO_PULL_DOWN;
hal_pull = NRF_GPIO_PIN_PULLDOWN;
break;
case PULL_NONE:
default:
break;
}
hal_gpio_pull_set(self->pin->port, self->pin->pin, asf_pull);
nrf_gpio_cfg_input(pin, hal_pull);
}
digitalio_pull_t common_hal_digitalio_digitalinout_get_pull(
digitalio_digitalinout_obj_t* self) {
uint32_t pin = self->pin->pin;
if (self->output) {
digitalio_digitalinout_obj_t *self) {
uint32_t pin = NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin);
NRF_GPIO_Type *reg = nrf_gpio_pin_port_decode(&pin);
if (nrf_gpio_pin_dir_get(pin) == NRF_GPIO_PIN_DIR_OUTPUT) {
mp_raise_AttributeError("Cannot get pull while in output mode");
return PULL_NONE;
} else {
hal_gpio_pull_t pull = hal_gpio_pull_get(self->pin->port, pin);
}
switch(pull)
{
case HAL_GPIO_PULL_UP:
return PULL_UP;
switch (reg->PIN_CNF[self->pin->pin] & GPIO_PIN_CNF_PULL_Msk) {
case NRF_GPIO_PIN_PULLUP:
return PULL_UP;
case HAL_GPIO_PULL_DOWN:
return PULL_DOWN;
case NRF_GPIO_PIN_PULLDOWN:
return PULL_DOWN;
default: return PULL_NONE;
}
default:
return PULL_NONE;
}
}

4
ports/nrf/common-hal/digitalio/DigitalInOut.h
View File

@ -28,12 +28,10 @@
#define MICROPY_INCLUDED_NRF_COMMON_HAL_DIGITALIO_DIGITALINOUT_H
#include "common-hal/microcontroller/Pin.h"
#include "py/obj.h"
typedef struct {
mp_obj_base_t base;
const mcu_pin_obj_t * pin;
bool output;
const mcu_pin_obj_t *pin;
bool open_drain;
} digitalio_digitalinout_obj_t;

46
ports/nrf/common-hal/microcontroller/Pin.c
View File

@ -25,51 +25,15 @@
*/
#include "common-hal/microcontroller/Pin.h"
#include "shared-bindings/microcontroller/Pin.h"
#include "nrf_gpio.h"
#include "py/mphal.h"
#if 0
extern volatile bool adc_in_use;
bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) {
if (pin == &pin_TOUT) {
return !adc_in_use;
}
if (pin->gpio_number == NO_GPIO || pin->gpio_number == SPECIAL_CASE) {
return false;
}
return (READ_PERI_REG(pin->peripheral) &
(PERIPHS_IO_MUX_FUNC<<PERIPHS_IO_MUX_FUNC_S)) == 0 &&
(GPIO_REG_READ(GPIO_ENABLE_ADDRESS) & (1 << pin->gpio_number)) == 0 &&
(READ_PERI_REG(pin->peripheral) & PERIPHS_IO_MUX_PULLUP) == 0;
}
void reset_pins(void) {
for (int i = 0; i < 17; i++) {
// 5 is RXD, 6 is TXD
if ((i > 4 && i < 13) || i == 12) {
continue;
}
uint32_t peripheral = PERIPHS_IO_MUX + i * 4;
PIN_FUNC_SELECT(peripheral, 0);
PIN_PULLUP_DIS(peripheral);
// Disable the pin.
gpio_output_set(0x0, 0x0, 0x0, 1 << i);
}
}
#endif
bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t* pin) {
return true;
bool common_hal_mcu_pin_is_free(const mcu_pin_obj_t *pin) {
return true;
}
void reset_all_pins(void) {
for (uint32_t pin = 0; pin < NUMBER_OF_PINS; ++pin)
nrf_gpio_cfg_default(pin);
}
void reset_pin(uint8_t pin) {
}

1
ports/nrf/common-hal/microcontroller/Pin.h
View File

@ -32,6 +32,5 @@
#define mcu_pin_obj_t pin_obj_t
void reset_all_pins(void);
void reset_pin(uint8_t pin);
#endif // MICROPY_INCLUDED_NRF_COMMON_HAL_MICROCONTROLLER_PIN_H

5
ports/nrf/common-hal/pulseio/PWMOut.c
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@ -30,6 +30,7 @@
#include "py/runtime.h"
#include "common-hal/pulseio/PWMOut.h"
#include "nrf_gpio.h"
#include "shared-bindings/pulseio/PWMOut.h"
#define PWM_MAX_MODULE 3
@ -161,7 +162,7 @@ void common_hal_pulseio_pwmout_construct(pulseio_pwmout_obj_t* self,
if (self->pwm)
{
hal_gpio_cfg_pin(pin->port, pin->pin, HAL_GPIO_MODE_OUTPUT, HAL_GPIO_PULL_DISABLED);
nrf_gpio_cfg_output(NRF_GPIO_PIN_MAP(pin->port, pin->pin));
// disable before mapping pin channel
self->pwm->ENABLE = 0;
@ -201,7 +202,7 @@ void common_hal_pulseio_pwmout_deinit(pulseio_pwmout_obj_t* self) {
}
}
hal_gpio_cfg_pin(self->pin->port, self->pin->pin, HAL_GPIO_MODE_INPUT, HAL_GPIO_PULL_DISABLED);
nrf_gpio_cfg_default(NRF_GPIO_PIN_MAP(self->pin->port, self->pin->pin));
self->pwm = NULL;
self->pin = mp_const_none;

150
ports/nrf/hal/hal_gpio.h
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@ -1,150 +0,0 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2017 Glenn Ruben Bakke
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef HAL_GPIO_H__
#define HAL_GPIO_H__
#include "nrf.h"
#ifdef NRF52832_XXAA
#define POINTERS (const uint32_t[]){NRF_P0_BASE}
#endif
#ifdef NRF52840_XXAA
#define POINTERS (const uint32_t[]){NRF_P0_BASE, NRF_P1_BASE}
#endif
#define GPIO_BASE(x) ((NRF_GPIO_Type *)POINTERS[x])
#define hal_gpio_pin_high(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->OUTSET = (1 << (p)->pin) )
#define hal_gpio_pin_low(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->OUTCLR = (1 << (p)->pin) )
#define hal_gpio_pin_read(p) (((NRF_GPIO_Type *)(GPIO_BASE((p)->port)))->IN >> ((p)->pin) & 1)
typedef enum {
HAL_GPIO_POLARITY_EVENT_LOW_TO_HIGH = GPIOTE_CONFIG_POLARITY_LoToHi << GPIOTE_CONFIG_POLARITY_Pos,
HAL_GPIO_POLARITY_EVENT_HIGH_TO_LOW = GPIOTE_CONFIG_POLARITY_HiToLo << GPIOTE_CONFIG_POLARITY_Pos,
HAL_GPIO_POLARITY_EVENT_TOGGLE = GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos
} hal_gpio_polarity_event_t;
typedef enum {
HAL_GPIO_PULL_DISABLED = (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos),
HAL_GPIO_PULL_DOWN = (GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos),
HAL_GPIO_PULL_UP = (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
} hal_gpio_pull_t;
typedef enum {
HAL_GPIO_MODE_OUTPUT = (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos),
HAL_GPIO_MODE_INPUT = (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos),
} hal_gpio_mode_t;
static inline void hal_gpio_cfg_pin(uint8_t port, uint32_t pin_number, hal_gpio_mode_t mode, hal_gpio_pull_t pull) {
GPIO_BASE(port)->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| pull
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| mode;
}
static inline void hal_gpio_dir_set(uint8_t port, uint32_t pin, hal_gpio_mode_t mode)
{
GPIO_BASE(port)->PIN_CNF[pin] &= ~GPIO_PIN_CNF_DIR_Msk;
GPIO_BASE(port)->PIN_CNF[pin] |= mode;
}
static inline hal_gpio_mode_t hal_gpio_dir_get(uint8_t port, uint32_t pin)
{
return GPIO_BASE(port)->PIN_CNF[pin] & GPIO_PIN_CNF_DIR_Msk;
}
static inline void hal_gpio_pull_set(uint8_t port, uint32_t pin, hal_gpio_pull_t pull)
{
GPIO_BASE(port)->PIN_CNF[pin] &= ~GPIO_PIN_CNF_PULL_Msk;
GPIO_BASE(port)->PIN_CNF[pin] |= pull;
}
static inline hal_gpio_pull_t hal_gpio_pull_get(uint8_t port, uint32_t pin)
{
return GPIO_BASE(port)->PIN_CNF[pin] & GPIO_PIN_CNF_PULL_Msk;
}
static inline void hal_gpio_out_set(uint8_t port, uint32_t pin_mask) {
GPIO_BASE(port)->OUTSET = pin_mask;
}
static inline void hal_gpio_out_clear(uint8_t port, uint32_t pin_mask) {
GPIO_BASE(port)->OUTCLR = pin_mask;
}
static inline void hal_gpio_pin_set(uint8_t port, uint32_t pin) {
GPIO_BASE(port)->OUTSET = (1 << pin);
}
static inline void hal_gpio_pin_clear(uint8_t port, uint32_t pin) {
GPIO_BASE(port)->OUTCLR = (1 << pin);
}
static inline void hal_gpio_pin_set_value(uint8_t port, uint32_t pin, uint8_t value) {
if (value) {
hal_gpio_pin_set(port, pin);
}else {
hal_gpio_pin_clear(port, pin);
}
}
static inline void hal_gpio_pin_toggle(uint8_t port, uint32_t pin) {
uint32_t pin_mask = (1 << pin);
uint32_t pins_state = NRF_GPIO->OUT;
GPIO_BASE(port)->OUTSET = (~pins_state) & pin_mask;
GPIO_BASE(port)->OUTCLR = pins_state & pin_mask;
}
typedef enum {
HAL_GPIO_EVENT_CHANNEL_0 = 0,
HAL_GPIO_EVENT_CHANNEL_1,
HAL_GPIO_EVENT_CHANNEL_2,
HAL_GPIO_EVENT_CHANNEL_3,
HAL_GPIO_EVENT_CHANNEL_4,
HAL_GPIO_EVENT_CHANNEL_5,
HAL_GPIO_EVENT_CHANNEL_6,
HAL_GPIO_EVENT_CHANNEL_7
} hal_gpio_event_channel_t;
typedef struct {
hal_gpio_event_channel_t channel;
hal_gpio_polarity_event_t event;
uint32_t pin;
uint8_t port;
uint8_t init_level;
} hal_gpio_event_config_t;
typedef void (*hal_gpio_event_callback_t)(hal_gpio_event_channel_t channel);
void hal_gpio_register_callback(hal_gpio_event_callback_t cb);
void hal_gpio_event_config(hal_gpio_event_config_t const * p_config);
#endif // HAL_GPIO_H__

1
ports/nrf/mphalport.h
View File

@ -30,7 +30,6 @@
#include <stdbool.h>
#include <stdint.h>
#include "hal_gpio.h"
#include "lib/utils/interrupt_char.h"
#include "nrf.h"
#include NRF5_HAL_H