diff --git a/ports/stm32f4/boards/feather_stm32f405_express/stm32f4xx_hal_conf.h b/ports/stm32f4/boards/feather_stm32f405_express/stm32f4xx_hal_conf.h index 7a1a9428f8..68a49b4ba8 100644 --- a/ports/stm32f4/boards/feather_stm32f405_express/stm32f4xx_hal_conf.h +++ b/ports/stm32f4/boards/feather_stm32f405_express/stm32f4xx_hal_conf.h @@ -63,7 +63,7 @@ #define HAL_SPI_MODULE_ENABLED #define HAL_TIM_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED -/* #define HAL_USART_MODULE_ENABLED */ +#define HAL_USART_MODULE_ENABLED /* #define HAL_IRDA_MODULE_ENABLED */ /* #define HAL_SMARTCARD_MODULE_ENABLED */ /* #define HAL_WWDG_MODULE_ENABLED */ diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk index 509a244106..d642f243ef 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk +++ b/ports/stm32f4/boards/stm32f412zg_discovery/mpconfigboard.mk @@ -2,6 +2,7 @@ USB_VID = 0x239A USB_PID = 0x8056 USB_PRODUCT = "STM32F412ZG Discovery Board - CPy" USB_MANUFACTURER = "STMicroelectronics" +USB_DEVICES = "CDC,MSC,HID" INTERNAL_FLASH_FILESYSTEM = 1 LONGINT_IMPL = NONE diff --git a/ports/stm32f4/boards/stm32f412zg_discovery/pins.c b/ports/stm32f4/boards/stm32f412zg_discovery/pins.c index b92f212700..ab90b04558 100644 --- a/ports/stm32f4/boards/stm32f412zg_discovery/pins.c +++ b/ports/stm32f4/boards/stm32f412zg_discovery/pins.c @@ -74,8 +74,8 @@ STATIC const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_PG12) }, { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_PF04) }, { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_PG13) }, - { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PG14) }, - { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PG09) }, + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_PG14) }, //USART6 TX + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_PG09) }, //USART6 RX { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_PA01) }, { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_PC01) }, { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_PC03) }, diff --git a/ports/stm32f4/common-hal/busio/UART.c b/ports/stm32f4/common-hal/busio/UART.c index e1810b131e..c4ab237cd1 100644 --- a/ports/stm32f4/common-hal/busio/UART.c +++ b/ports/stm32f4/common-hal/busio/UART.c @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Damien P. George + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -36,45 +36,554 @@ #include "supervisor/shared/translate.h" #include "tick.h" +#include "stm32f4xx_hal.h" -void common_hal_busio_uart_construct(busio_uart_obj_t *self, - const mcu_pin_obj_t * tx, const mcu_pin_obj_t * rx, uint32_t baudrate, +#define ALL_UARTS 0xFFFF + +STATIC bool reserved_uart[MAX_UART]; +int errflag; //Used to restart read halts + +STATIC void uart_clock_enable(uint16_t mask); +STATIC void uart_clock_disable(uint16_t mask); +STATIC void uart_assign_irq(busio_uart_obj_t* self, USART_TypeDef* USARTx); + +void uart_reset(void) { + for (uint8_t i = 0; i < MAX_UART; i++) { + reserved_uart[i] = false; + MP_STATE_PORT(cpy_uart_obj_all)[i] = NULL; + } + uart_clock_disable(ALL_UARTS); +} + +STATIC USART_TypeDef * assign_uart_or_throw(busio_uart_obj_t* self, bool pin_eval, + int uart_index, bool uart_taken) { + if (pin_eval) { + //assign a root pointer pointer for IRQ + MP_STATE_PORT(cpy_uart_obj_all)[uart_index] = self; + return mcu_uart_banks[uart_index]; + } else { + if (uart_taken) { + mp_raise_ValueError(translate("Hardware in use, try alternative pins")); + } else { + mp_raise_ValueError(translate("Invalid UART pin selection")); + } + } +} + +void common_hal_busio_uart_construct(busio_uart_obj_t* self, + const mcu_pin_obj_t* tx, const mcu_pin_obj_t* rx, uint32_t baudrate, uint8_t bits, uart_parity_t parity, uint8_t stop, mp_float_t timeout, uint16_t receiver_buffer_size) { - mp_raise_NotImplementedError(translate("UART not yet supported")); + + //match pins to UART objects + USART_TypeDef * USARTx; + + uint8_t tx_len = sizeof(mcu_uart_tx_list)/sizeof(*mcu_uart_tx_list); + uint8_t rx_len = sizeof(mcu_uart_rx_list)/sizeof(*mcu_uart_rx_list); + bool uart_taken = false; + uint8_t uart_index = 0; //origin 0 corrected + + //Can have both pins, or either + if ((tx != mp_const_none) && (rx != mp_const_none)) { + //normal find loop if both pins exist + for (uint i = 0; i < tx_len; i++) { + if (mcu_uart_tx_list[i].pin == tx) { + //rx + for (uint j = 0; j < rx_len; j++) { + if (mcu_uart_rx_list[j].pin == rx + && mcu_uart_rx_list[j].uart_index == mcu_uart_tx_list[i].uart_index) { + //keep looking if the UART is taken, edge case + if (reserved_uart[mcu_uart_tx_list[i].uart_index - 1]) { + uart_taken = true; + continue; + } + //store pins if not + self->tx = &mcu_uart_tx_list[i]; + self->rx = &mcu_uart_rx_list[j]; + break; + } + } + } + } + uart_index = self->tx->uart_index - 1; + USARTx = assign_uart_or_throw(self, (self->tx != NULL && self->rx != NULL), + uart_index, uart_taken); + } else if (tx == mp_const_none) { + //If there is no tx, run only rx + for (uint i = 0; i < rx_len; i++) { + if (mcu_uart_rx_list[i].pin == rx) { + //keep looking if the UART is taken, edge case + if (reserved_uart[mcu_uart_rx_list[i].uart_index - 1]) { + uart_taken = true; + continue; + } + //store pins if not + self->rx = &mcu_uart_rx_list[i]; + break; + } + } + uart_index = self->rx->uart_index - 1; + USARTx = assign_uart_or_throw(self, (self->rx != NULL), + uart_index, uart_taken); + } else if (rx == mp_const_none) { + //If there is no rx, run only tx + for (uint i = 0; i < tx_len; i++) { + if (mcu_uart_tx_list[i].pin == tx) { + //keep looking if the UART is taken, edge case + if (reserved_uart[mcu_uart_tx_list[i].uart_index - 1]) { + uart_taken = true; + continue; + } + //store pins if not + self->tx = &mcu_uart_tx_list[i]; + break; + } + } + uart_index = self->tx->uart_index - 1; + USARTx = assign_uart_or_throw(self, (self->tx != NULL), + uart_index, uart_taken); + } else { + //both pins cannot be empty + mp_raise_ValueError(translate("Supply at least one UART pin")); + } + + //Other errors + if ( receiver_buffer_size == 0 ) { + mp_raise_ValueError(translate("Invalid buffer size")); + } + if ( bits != 8 && bits != 9 ) { + mp_raise_ValueError(translate("Invalid word/bit length")); + } + if ( USARTx == NULL) { //this can only be hit if the periph file is wrong + mp_raise_ValueError(translate("Internal define error")); + } + + //GPIO Init + GPIO_InitTypeDef GPIO_InitStruct = {0}; + if (self->tx != NULL) { + GPIO_InitStruct.Pin = pin_mask(tx->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->tx->altfn_index; + HAL_GPIO_Init(pin_port(tx->port), &GPIO_InitStruct); + } + if (self->rx != NULL) { + GPIO_InitStruct.Pin = pin_mask(rx->number); + GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; + GPIO_InitStruct.Pull = GPIO_PULLUP; + GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; + GPIO_InitStruct.Alternate = self->rx->altfn_index; + HAL_GPIO_Init(pin_port(rx->port), &GPIO_InitStruct); + } + + //reserve uart and enable the peripheral + reserved_uart[uart_index] = true; + uart_clock_enable(1 << (uart_index)); + uart_assign_irq(self, USARTx); + + self->handle.Instance = USARTx; + self->handle.Init.BaudRate = baudrate; + self->handle.Init.WordLength = (bits == 9) ? UART_WORDLENGTH_9B : UART_WORDLENGTH_8B; + self->handle.Init.StopBits = (stop > 1) ? UART_STOPBITS_2 : UART_STOPBITS_1; + self->handle.Init.Parity = (parity == PARITY_ODD) ? UART_PARITY_ODD : + (parity == PARITY_EVEN) ? UART_PARITY_EVEN : + UART_PARITY_NONE; + self->handle.Init.Mode = (self->tx != NULL && self->rx != NULL) ? UART_MODE_TX_RX : + (self->tx != NULL) ? UART_MODE_TX : + UART_MODE_RX; + self->handle.Init.HwFlowCtl = UART_HWCONTROL_NONE; + self->handle.Init.OverSampling = UART_OVERSAMPLING_16; + if (HAL_UART_Init(&self->handle) != HAL_OK) + { + mp_raise_ValueError(translate("UART Init Error")); + + } + + // Init buffer for rx and claim pins + if (self->rx != NULL) { + ringbuf_alloc(&self->rbuf, receiver_buffer_size, true); + if (!self->rbuf.buf) { + mp_raise_ValueError(translate("UART Buffer allocation error")); + } + claim_pin(rx); + } + if (self->tx != NULL) { + claim_pin(tx); + } + self->baudrate = baudrate; + self->timeout_ms = timeout * 1000; + + //start the interrupt series + if ((HAL_UART_GetState(&self->handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) { + mp_raise_ValueError(translate("Could not start interrupt, RX busy")); + } + + //start the receive interrupt chain + HAL_NVIC_DisableIRQ(self->irq); //prevent handle lock contention + HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + HAL_NVIC_SetPriority(self->irq, UART_IRQPRI, UART_IRQSUB_PRI); + HAL_NVIC_EnableIRQ(self->irq); + + errflag = HAL_OK; } bool common_hal_busio_uart_deinited(busio_uart_obj_t *self) { - return 0; + return self->tx->pin == mp_const_none; } void common_hal_busio_uart_deinit(busio_uart_obj_t *self) { + if (common_hal_busio_uart_deinited(self)) return; + + reset_pin_number(self->tx->pin->port,self->tx->pin->number); + reset_pin_number(self->rx->pin->port,self->rx->pin->number); + self->tx = mp_const_none; + self->rx = mp_const_none; + gc_free(self->rbuf.buf); + self->rbuf.size = 0; + self->rbuf.iput = self->rbuf.iget = 0; } -// Read characters. size_t common_hal_busio_uart_read(busio_uart_obj_t *self, uint8_t *data, size_t len, int *errcode) { - return 0; + if (self->rx == NULL) { + mp_raise_ValueError(translate("No RX pin")); + } + + size_t rx_bytes = 0; + uint64_t start_ticks = ticks_ms; + + // Wait for all bytes received or timeout, same as nrf + while ( (ringbuf_count(&self->rbuf) < len) && (ticks_ms - start_ticks < self->timeout_ms) ) { + RUN_BACKGROUND_TASKS; + //restart if it failed in the callback + if (errflag != HAL_OK) { + errflag = HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + } + // Allow user to break out of a timeout with a KeyboardInterrupt. + if ( mp_hal_is_interrupted() ) { + return 0; + } + } + + // Halt reception + HAL_NVIC_DisableIRQ(self->irq); + // copy received data + rx_bytes = ringbuf_count(&self->rbuf); + rx_bytes = MIN(rx_bytes, len); + for (uint16_t i = 0; i < rx_bytes; i++) { + data[i] = ringbuf_get(&self->rbuf); + } + HAL_NVIC_EnableIRQ(self->irq); + + if (rx_bytes == 0) { + *errcode = EAGAIN; + return MP_STREAM_ERROR; + } + return rx_bytes; } // Write characters. size_t common_hal_busio_uart_write(busio_uart_obj_t *self, const uint8_t *data, size_t len, int *errcode) { - return 0; + if (self->tx == NULL) { + mp_raise_ValueError(translate("No TX pin")); + } + bool write_err = false; //write error shouldn't disable interrupts + + HAL_NVIC_DisableIRQ(self->irq); + if (HAL_UART_Transmit(&self->handle, (uint8_t*)data, len, self->timeout_ms) != HAL_OK) { + write_err = true; + } + HAL_UART_Receive_IT(&self->handle, &self->rx_char, 1); + HAL_NVIC_EnableIRQ(self->irq); + + if (write_err) mp_raise_ValueError(translate("UART write error")); + return len; +} + +void HAL_UART_RxCpltCallback(UART_HandleTypeDef *handle) +{ + for (int i = 0; i < 7; i++) { + //get context pointer and cast it as struct pointer + busio_uart_obj_t * context = (busio_uart_obj_t*)MP_STATE_PORT(cpy_uart_obj_all)[i]; + if (handle == &context->handle) { + //check if transaction is ongoing + if ((HAL_UART_GetState(handle) & HAL_UART_STATE_BUSY_RX) == HAL_UART_STATE_BUSY_RX) { + return; + } + ringbuf_put_n(&context->rbuf, &context->rx_char, 1); + errflag = HAL_UART_Receive_IT(handle, &context->rx_char, 1); + + return; + } + } +} + +void HAL_UART_ErrorCallback(UART_HandleTypeDef *UartHandle) +{ + if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_PE) != RESET) { + __HAL_UART_CLEAR_PEFLAG(UartHandle); + } else if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_FE) != RESET) { + __HAL_UART_CLEAR_FEFLAG(UartHandle); + } else if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_NE) != RESET) { + __HAL_UART_CLEAR_NEFLAG(UartHandle); + } else if (__HAL_UART_GET_FLAG(UartHandle, UART_FLAG_ORE) != RESET) { + __HAL_UART_CLEAR_OREFLAG(UartHandle); + } + //restart serial read after an error + for (int i = 0; i < 7; i++) { + busio_uart_obj_t * context = (busio_uart_obj_t *)MP_STATE_PORT(cpy_uart_obj_all)[i]; + if (UartHandle == &context->handle) { + HAL_UART_Receive_IT(UartHandle, &context->rx_char, 1); + return; + } + } + } uint32_t common_hal_busio_uart_get_baudrate(busio_uart_obj_t *self) { - return 0; + return self->baudrate; } void common_hal_busio_uart_set_baudrate(busio_uart_obj_t *self, uint32_t baudrate) { + //Don't reset if it's the same value + if (baudrate == self->baudrate) return; + + //Otherwise de-init and set new rate + if (HAL_UART_DeInit(&self->handle) != HAL_OK) { + mp_raise_ValueError(translate("UART De-init error")); + } + self->handle.Init.BaudRate = baudrate; + if (HAL_UART_Init(&self->handle) != HAL_OK) { + mp_raise_ValueError(translate("UART Re-init error")); + } + + self->baudrate = baudrate; } uint32_t common_hal_busio_uart_rx_characters_available(busio_uart_obj_t *self) { - return 0; + return ringbuf_count(&self->rbuf); } void common_hal_busio_uart_clear_rx_buffer(busio_uart_obj_t *self) { + // Halt reception + HAL_NVIC_DisableIRQ(self->irq); + ringbuf_clear(&self->rbuf); + HAL_NVIC_EnableIRQ(self->irq); } bool common_hal_busio_uart_ready_to_tx(busio_uart_obj_t *self) { - return 0; + return __HAL_UART_GET_FLAG(&self->handle, UART_FLAG_TXE); +} + +STATIC void call_hal_irq(int uart_num) { + //Create casted context pointer + busio_uart_obj_t * context = (busio_uart_obj_t*)MP_STATE_PORT(cpy_uart_obj_all)[uart_num - 1]; + if (context != NULL) { + HAL_NVIC_ClearPendingIRQ(context->irq); + HAL_UART_IRQHandler(&context->handle); + } +} + +// UART/USART IRQ handlers +void USART1_IRQHandler(void) { + call_hal_irq(1); +} + +void USART2_IRQHandler(void) { + call_hal_irq(2); +} + +void USART3_IRQHandler(void) { + call_hal_irq(3); +} + +void UART4_IRQHandler(void) { + call_hal_irq(4); +} + +void UART5_IRQHandler(void) { + call_hal_irq(5); +} + +void USART6_IRQHandler(void) { + call_hal_irq(6); +} + +STATIC void uart_clock_enable(uint16_t mask) { + #ifdef USART1 + if (mask & (1 << 0)) { + __HAL_RCC_USART1_FORCE_RESET(); + __HAL_RCC_USART1_RELEASE_RESET(); + __HAL_RCC_USART1_CLK_ENABLE(); + } + #endif + #ifdef USART2 + if (mask & (1 << 1)) { + __HAL_RCC_USART2_FORCE_RESET(); + __HAL_RCC_USART2_RELEASE_RESET(); + __HAL_RCC_USART2_CLK_ENABLE(); + } + #endif + #ifdef USART3 + if (mask & (1 << 2)) { + __HAL_RCC_USART3_FORCE_RESET(); + __HAL_RCC_USART3_RELEASE_RESET(); + __HAL_RCC_USART3_CLK_ENABLE(); + } + #endif + #ifdef UART4 + if (mask & (1 << 3)) { + __HAL_RCC_UART4_FORCE_RESET(); + __HAL_RCC_UART4_RELEASE_RESET(); + __HAL_RCC_UART4_CLK_ENABLE(); + } + #endif + #ifdef UART5 + if (mask & (1 << 4)) { + __HAL_RCC_UART5_FORCE_RESET(); + __HAL_RCC_UART5_RELEASE_RESET(); + __HAL_RCC_UART5_CLK_ENABLE(); + } + #endif + #ifdef USART6 + if (mask & (1 << 5)) { + __HAL_RCC_USART6_FORCE_RESET(); + __HAL_RCC_USART6_RELEASE_RESET(); + __HAL_RCC_USART6_CLK_ENABLE(); + } + #endif + #ifdef UART7 + if (mask & (1 << 6)) { + __HAL_RCC_UART7_FORCE_RESET(); + __HAL_RCC_UART7_RELEASE_RESET(); + __HAL_RCC_UART7_CLK_ENABLE(); + } + #endif + #ifdef UART8 + if (mask & (1 << 7)) { + __HAL_RCC_UART8_FORCE_RESET(); + __HAL_RCC_UART8_RELEASE_RESET(); + __HAL_RCC_UART8_CLK_ENABLE(); + } + #endif + #ifdef UART9 + if (mask & (1 << 8)) { + __HAL_RCC_UART9_FORCE_RESET(); + __HAL_RCC_UART9_RELEASE_RESET(); + __HAL_RCC_UART9_CLK_ENABLE(); + } + #endif + #ifdef UART10 + if (mask & (1 << 9)) { + __HAL_RCC_UART10_FORCE_RESET(); + __HAL_RCC_UART10_RELEASE_RESET(); + __HAL_RCC_UART10_CLK_ENABLE(); + } + #endif +} + +STATIC void uart_clock_disable(uint16_t mask) { + #ifdef USART1 + if (mask & (1 << 0)) { + __HAL_RCC_USART1_FORCE_RESET(); + __HAL_RCC_USART1_RELEASE_RESET(); + __HAL_RCC_USART1_CLK_DISABLE(); + } + #endif + #ifdef USART2 + if (mask & (1 << 1)) { + __HAL_RCC_USART2_FORCE_RESET(); + __HAL_RCC_USART2_RELEASE_RESET(); + __HAL_RCC_USART2_CLK_DISABLE(); + } + #endif + #ifdef USART3 + if (mask & (1 << 2)) { + __HAL_RCC_USART3_FORCE_RESET(); + __HAL_RCC_USART3_RELEASE_RESET(); + __HAL_RCC_USART3_CLK_DISABLE(); + } + #endif + #ifdef UART4 + if (mask & (1 << 3)) { + __HAL_RCC_UART4_FORCE_RESET(); + __HAL_RCC_UART4_RELEASE_RESET(); + __HAL_RCC_UART4_CLK_DISABLE(); + } + #endif + #ifdef UART5 + if (mask & (1 << 4)) { + __HAL_RCC_UART5_FORCE_RESET(); + __HAL_RCC_UART5_RELEASE_RESET(); + __HAL_RCC_UART5_CLK_DISABLE(); + } + #endif + #ifdef USART6 + if (mask & (1 << 5)) { + __HAL_RCC_USART6_FORCE_RESET(); + __HAL_RCC_USART6_RELEASE_RESET(); + __HAL_RCC_USART6_CLK_DISABLE(); + } + #endif + #ifdef UART7 + if (mask & (1 << 6)) { + __HAL_RCC_UART7_FORCE_RESET(); + __HAL_RCC_UART7_RELEASE_RESET(); + __HAL_RCC_UART7_CLK_DISABLE(); + } + #endif + #ifdef UART8 + if (mask & (1 << 7)) { + __HAL_RCC_UART8_FORCE_RESET(); + __HAL_RCC_UART8_RELEASE_RESET(); + __HAL_RCC_UART8_CLK_DISABLE(); + } + #endif + #ifdef UART9 + if (mask & (1 << 8)) { + __HAL_RCC_UART9_FORCE_RESET(); + __HAL_RCC_UART9_RELEASE_RESET(); + __HAL_RCC_UART9_CLK_DISABLE(); + } + #endif + #ifdef UART10 + if (mask & (1 << 9)) { + __HAL_RCC_UART10_FORCE_RESET(); + __HAL_RCC_UART10_RELEASE_RESET(); + __HAL_RCC_UART10_CLK_DISABLE(); + } + #endif +} + +STATIC void uart_assign_irq(busio_uart_obj_t *self, USART_TypeDef * USARTx) { + #ifdef USART1 + if (USARTx == USART1) self->irq = USART1_IRQn; + #endif + #ifdef USART2 + if (USARTx == USART2) self->irq = USART2_IRQn; + #endif + #ifdef USART3 + if (USARTx == USART3) self->irq = USART3_IRQn; + #endif + #ifdef UART4 + if (USARTx == UART4) self->irq = UART4_IRQn; + #endif + #ifdef UART5 + if (USARTx == UART5) self->irq = UART5_IRQn; + #endif + #ifdef USART6 + if (USARTx == USART6) self->irq = USART6_IRQn; + #endif + #ifdef UART7 + if (USARTx == UART7) self->irq = UART7_IRQn; + #endif + #ifdef UART8 + if (USARTx == UART8) self->irq = UART8_IRQn; + #endif + #ifdef UART9 + if (USARTx == UART9) self->irq = UART9_IRQn; + #endif + #ifdef UART10 + if (USARTx == UART10) self->irq = UART10_IRQn; + #endif } diff --git a/ports/stm32f4/common-hal/busio/UART.h b/ports/stm32f4/common-hal/busio/UART.h index 6992339340..cde5fadd00 100644 --- a/ports/stm32f4/common-hal/busio/UART.h +++ b/ports/stm32f4/common-hal/busio/UART.h @@ -3,7 +3,7 @@ * * The MIT License (MIT) * - * Copyright (c) 2016 Scott Shawcroft + * Copyright (c) 2019 Lucian Copeland for Adafruit Industries * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal @@ -28,19 +28,33 @@ #define MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H #include "common-hal/microcontroller/Pin.h" +#include "stm32f4/periph.h" +#include "stm32f4xx_hal.h" #include "py/obj.h" +#include "py/ringbuf.h" + +#ifndef UART_IRQPRI +#define UART_IRQPRI 1 +#endif +#ifndef UART_IRQSUB_PRI +#define UART_IRQSUB_PRI 0 +#endif typedef struct { mp_obj_base_t base; - uint8_t rx_pin; - uint8_t tx_pin; - uint8_t character_bits; - bool rx_error; + UART_HandleTypeDef handle; + IRQn_Type irq; + const mcu_uart_tx_obj_t *tx; + const mcu_uart_rx_obj_t *rx; + + ringbuf_t rbuf; + uint8_t rx_char; + uint32_t baudrate; uint32_t timeout_ms; - uint32_t buffer_length; - uint8_t* buffer; } busio_uart_obj_t; +void uart_reset(void); + #endif // MICROPY_INCLUDED_STM32F4_COMMON_HAL_BUSIO_UART_H diff --git a/ports/stm32f4/mpconfigport.h b/ports/stm32f4/mpconfigport.h index 543a55942e..7737bda8d4 100644 --- a/ports/stm32f4/mpconfigport.h +++ b/ports/stm32f4/mpconfigport.h @@ -39,7 +39,10 @@ #include "py/circuitpy_mpconfig.h" +#define MAX_UART 10 //how many UART are implemented + #define MICROPY_PORT_ROOT_POINTERS \ + void *cpy_uart_obj_all[MAX_UART]; \ CIRCUITPY_COMMON_ROOT_POINTERS #endif // __INCLUDED_MPCONFIGPORT_H diff --git a/ports/stm32f4/peripherals/stm32f4/periph.h b/ports/stm32f4/peripherals/stm32f4/periph.h index d066b2be77..4b00ce1d92 100644 --- a/ports/stm32f4/peripherals/stm32f4/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/periph.h @@ -34,8 +34,8 @@ #include "stm32f4/pins.h" // I2C -//TODO: these objects should be condensed into a single 'periph_pin' unless we -//find a compelling reason to store more unique data in them. +// TODO: these objects should be condensed into a single 'periph_pin' unless we +// find a compelling reason to store more unique data in them. typedef struct { uint8_t i2c_index:4; // Index of the I2C unit (1 to 3) @@ -65,8 +65,8 @@ typedef struct { } // SPI -//TODO: these objects should be condensed into a single 'periph_pin' unless we -//find a compelling reason to store more unique data in them. +// TODO: these objects should be condensed into a single 'periph_pin' unless we +// find a compelling reason to store more unique data in them. typedef struct { uint8_t spi_index:4; //Up to 6 SPI units @@ -99,6 +99,29 @@ typedef struct { .pin = spi_pin, \ } +// UART +// TODO: these objects should be condensed into a single 'periph_pin' unless we +// find a compelling reason to store more unique data in them. + +typedef struct { + uint8_t uart_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_uart_tx_obj_t; + +typedef struct { + uint8_t uart_index:4; + uint8_t altfn_index:4; + const mcu_pin_obj_t * pin; +} mcu_uart_rx_obj_t; + +#define UART(index, alt, uart_pin) \ +{ \ + .uart_index = index, \ + .altfn_index = alt, \ + .pin = uart_pin, \ +} + //Timers typedef struct { uint8_t tim_index:4; diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c index 67faacdf6b..bc03f7c7be 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.c @@ -86,6 +86,39 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[6] = { SPI(3, 6, &pin_PA15), }; +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, UART4, UART5, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[12] = { + UART(4, 8, &pin_PA00), + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PB06), + UART(3, 7, &pin_PB10), + UART(6, 8, &pin_PC06), + UART(3, 7, &pin_PC10), + UART(4, 8, &pin_PC10), + UART(5, 8, &pin_PC12), + UART(2, 7, &pin_PD05), + UART(3, 7, &pin_PD08), + UART(6, 8, &pin_PG14), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { + UART(4, 8, &pin_PA01), + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(1, 7, &pin_PB07), + UART(3, 7, &pin_PB11), + UART(6, 8, &pin_PC07), + UART(3, 7, &pin_PC11), + UART(4, 8, &pin_PC11), + UART(5, 8, &pin_PD02), + UART(2, 7, &pin_PD06), + UART(3, 7, &pin_PD09), + UART(6, 8, &pin_PG09), +}; + //Timers //TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins TIM_TypeDef * mcu_tim_banks[14] = {TIM1, TIM2, TIM3, TIM4, TIM5, NULL, NULL, TIM8, TIM9, TIM10, @@ -159,4 +192,3 @@ const mcu_tim_pin_obj_t mcu_tim_pin_list[56] = { // TIM(8,3,2,&pin_PI06), // TIM(8,3,3,&pin_PI07), }; - diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h index 89298cdab4..e87e798574 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f405xx/periph.h @@ -41,10 +41,17 @@ extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[6]; extern const mcu_spi_miso_obj_t mcu_spi_miso_list[6]; extern const mcu_spi_nss_obj_t mcu_spi_nss_list[6]; +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[12]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; + +//Timers #define TIM_BANK_ARRAY_LEN 14 #define TIM_PIN_ARRAY_LEN 56 TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; - #endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F405XX_PERIPH_H \ No newline at end of file diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c index 1d4034bbf1..b7d9edf4f7 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.c @@ -119,7 +119,28 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { SPI(5, 6, &pin_PE11) }; -//UART, Etc +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, NULL, NULL, NULL, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, false, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[7] = { + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PA15), + UART(6, 8, &pin_PA11), + UART(1, 7, &pin_PB06), + UART(6, 8, &pin_PC06), + UART(2, 7, &pin_PD05), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[7] = { + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(6, 8, &pin_PA12), + UART(1, 7, &pin_PB03), + UART(1, 7, &pin_PB07), + UART(6, 8, &pin_PC07), + UART(2, 7, &pin_PD06), +}; //Timers //TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins @@ -171,4 +192,3 @@ const mcu_tim_pin_obj_t mcu_tim_pin_list[44] = { TIM(1,1,3,&pin_PE13), TIM(1,1,4,&pin_PE14), }; - diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h index 3045397a35..d657d73b68 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f411xe/periph.h @@ -41,9 +41,17 @@ extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[7]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[7]; + +//Timers #define TIM_BANK_ARRAY_LEN 14 -TIM_TypeDef * mcu_tim_banks[14]; #define TIM_PIN_ARRAY_LEN 44 -const mcu_tim_pin_obj_t mcu_tim_pin_list[44]; +TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; #endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c index edce2845b8..f5effa80ed 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.c @@ -120,7 +120,39 @@ const mcu_spi_nss_obj_t mcu_spi_nss_list[12] = { SPI(5, 6, &pin_PE11) }; -//UART, Etc +//UART + +USART_TypeDef * mcu_uart_banks[MAX_UART] = {USART1, USART2, USART3, NULL, NULL, USART6}; +bool mcu_uart_has_usart[MAX_UART] = {true, true, true, false, false, true}; + +const mcu_uart_tx_obj_t mcu_uart_tx_list[11] = { + UART(2, 7, &pin_PA02), + UART(1, 7, &pin_PA09), + UART(1, 7, &pin_PA15), + UART(6, 8, &pin_PA11), + UART(1, 7, &pin_PB06), + UART(3, 7, &pin_PB10), + UART(6, 8, &pin_PC06), + UART(3, 7, &pin_PC10), + UART(2, 7, &pin_PD05), + UART(3, 7, &pin_PD08), + UART(6, 8, &pin_PG14), +}; + +const mcu_uart_rx_obj_t mcu_uart_rx_list[12] = { + UART(2, 7, &pin_PA03), + UART(1, 7, &pin_PA10), + UART(6, 8, &pin_PA12), + UART(1, 7, &pin_PB03), + UART(1, 7, &pin_PB07), + UART(3, 7, &pin_PB11), + UART(3, 7, &pin_PC05), + UART(6, 8, &pin_PC07), + UART(3, 7, &pin_PC11), + UART(2, 7, &pin_PD06), + UART(3, 7, &pin_PD09), + UART(6, 8, &pin_PG09), +}; //Timers //TIM6 and TIM7 are basic timers that are only used by DAC, and don't have pins diff --git a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h index 49ba108273..e0141e6dab 100644 --- a/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h +++ b/ports/stm32f4/peripherals/stm32f4/stm32f412zx/periph.h @@ -42,9 +42,17 @@ extern const mcu_spi_mosi_obj_t mcu_spi_mosi_list[14]; extern const mcu_spi_miso_obj_t mcu_spi_miso_list[12]; extern const mcu_spi_nss_obj_t mcu_spi_nss_list[12]; +//UART +extern USART_TypeDef * mcu_uart_banks[MAX_UART]; +extern bool mcu_uart_has_usart[MAX_UART]; + +extern const mcu_uart_tx_obj_t mcu_uart_tx_list[11]; +extern const mcu_uart_rx_obj_t mcu_uart_rx_list[12]; + +//Timers #define TIM_BANK_ARRAY_LEN 14 -TIM_TypeDef * mcu_tim_banks[14]; #define TIM_PIN_ARRAY_LEN 60 -const mcu_tim_pin_obj_t mcu_tim_pin_list[60]; +TIM_TypeDef * mcu_tim_banks[TIM_BANK_ARRAY_LEN]; +const mcu_tim_pin_obj_t mcu_tim_pin_list[TIM_PIN_ARRAY_LEN]; #endif // MICROPY_INCLUDED_STM32F4_PERIPHERALS_STM32F411VE_PERIPH_H \ No newline at end of file diff --git a/ports/stm32f4/supervisor/port.c b/ports/stm32f4/supervisor/port.c index 602bec4be8..df5a70cd12 100644 --- a/ports/stm32f4/supervisor/port.c +++ b/ports/stm32f4/supervisor/port.c @@ -33,6 +33,7 @@ #include "common-hal/microcontroller/Pin.h" #include "common-hal/busio/I2C.h" #include "common-hal/busio/SPI.h" +#include "common-hal/busio/UART.h" #include "common-hal/pulseio/PWMOut.h" #include "stm32f4/clocks.h" @@ -41,12 +42,12 @@ #include "stm32f4xx_hal.h" safe_mode_t port_init(void) { - HAL_Init(); + HAL_Init(); __HAL_RCC_SYSCFG_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE(); - stm32f4_peripherals_clocks_init(); - stm32f4_peripherals_gpio_init(); + stm32f4_peripherals_clocks_init(); + stm32f4_peripherals_gpio_init(); tick_init(); board_init(); @@ -55,9 +56,10 @@ safe_mode_t port_init(void) { } void reset_port(void) { - reset_all_pins(); + reset_all_pins(); i2c_reset(); spi_reset(); + uart_reset(); pwmout_reset(); } @@ -66,7 +68,7 @@ void reset_to_bootloader(void) { } void reset_cpu(void) { - NVIC_SystemReset(); + NVIC_SystemReset(); } uint32_t *port_stack_get_limit(void) { @@ -88,7 +90,7 @@ uint32_t port_get_saved_word(void) { } void HardFault_Handler(void) { - reset_into_safe_mode(HARD_CRASH); + reset_into_safe_mode(HARD_CRASH); while (true) { asm("nop;"); } diff --git a/ports/stm32f4/tick.c b/ports/stm32f4/tick.c index 43521fb516..688f71dbd4 100644 --- a/ports/stm32f4/tick.c +++ b/ports/stm32f4/tick.c @@ -62,6 +62,11 @@ uint32_t HAL_GetTick(void) //override ST HAL void tick_init() { uint32_t ticks_per_ms = SystemCoreClock/ 1000; SysTick_Config(ticks_per_ms); // interrupt is enabled + + NVIC_EnableIRQ(SysTick_IRQn); + // Bump up the systick interrupt so nothing else interferes with timekeeping. + NVIC_SetPriority(SysTick_IRQn, 0); + NVIC_SetPriority(OTG_FS_IRQn, 1); } void tick_delay(uint32_t us) {