Merge pull request #1165 from tannewt/grandcentral

Initial Grand Central definition
This commit is contained in:
Dan Halbert 2018-09-07 15:00:13 -04:00 committed by GitHub
commit 34bcb069cf
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GPG Key ID: 4AEE18F83AFDEB23
11 changed files with 271 additions and 4 deletions

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@ -14,6 +14,7 @@ env:
- TRAVIS_BOARD=pca10056
- TRAVIS_BOARD=trinket_m0
- TRAVIS_BOARD=feather_m4_express
- TRAVIS_BOARD=grandcentral_m4_express
- TRAVIS_BOARD=feather_radiofruit_zigbee
- TRAVIS_BOARD=arduino_zero
- TRAVIS_BOARD=circuitplayground_express_crickit

3
main.c
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@ -325,7 +325,6 @@ void __attribute__ ((noinline)) run_boot_py(safe_mode_t safe_mode) {
}
#endif
stack_init();
// TODO(tannewt): Allocate temporary space to hold custom usb descriptors.
filesystem_flush();
supervisor_allocation* heap = allocate_remaining_memory();
@ -381,6 +380,8 @@ int __attribute__((used)) main(void) {
rgb_led_status_init();
stack_init();
// Create a new filesystem only if we're not in a safe mode.
// A power brownout here could make it appear as if there's
// no SPI flash filesystem, and we might erase the existing one.

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@ -0,0 +1,46 @@
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2018 Scott Shawcroft for Adafruit Industries
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "boards/board.h"
#include "mpconfigboard.h"
#include "hal/include/hal_gpio.h"
void board_init(void) {
gpio_set_pin_function(MICROPY_HW_LED_TX, GPIO_PIN_FUNCTION_OFF);
gpio_set_pin_direction(MICROPY_HW_LED_TX, GPIO_DIRECTION_OUT);
gpio_set_pin_level(MICROPY_HW_LED_TX, true);
gpio_set_pin_function(MICROPY_HW_LED_RX, GPIO_PIN_FUNCTION_OFF);
gpio_set_pin_direction(MICROPY_HW_LED_RX, GPIO_DIRECTION_OUT);
gpio_set_pin_level(MICROPY_HW_LED_RX, true);
}
bool board_requests_safe_mode(void) {
return false;
}
void reset_board(void) {
}

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@ -0,0 +1,53 @@
#define MICROPY_HW_BOARD_NAME "Adafruit Grand Central M4 Express"
#define MICROPY_HW_MCU_NAME "samd51p20"
#define CIRCUITPY_MCU_FAMILY samd51
// This is for Rev A which is green
#define MICROPY_HW_LED_TX PIN_PC30
#define MICROPY_HW_LED_RX PIN_PC31
#define MICROPY_HW_NEOPIXEL (&pin_PC24)
// These are pins not to reset.
// QSPI Data pins
#define MICROPY_PORT_A ( PORT_PA08 | PORT_PA09 | PORT_PA10 | PORT_PA11 )
// QSPI CS, and QSPI SCK
#define MICROPY_PORT_B ( PORT_PB10 | PORT_PB11 )
// NeoPixel pin, RX LED, TX LED
#define MICROPY_PORT_C ( PORT_PC24 | PORT_PC30 | PORT_PC31 )
#define MICROPY_PORT_D (0)
#define AUTORESET_DELAY_MS 500
// If you change this, then make sure to update the linker scripts as well to
// make sure you don't overwrite code
#define CIRCUITPY_INTERNAL_NVM_SIZE 8192
#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000 - CIRCUITPY_INTERNAL_NVM_SIZE)
#include "external_flash/devices.h"
#define EXTERNAL_FLASH_DEVICE_COUNT 1
#define EXTERNAL_FLASH_DEVICES GD25Q64C
#include "external_flash/external_flash.h"
#define BOARD_HAS_CRYSTAL 1
#define DEFAULT_I2C_BUS_SCL (&pin_PB21)
#define DEFAULT_I2C_BUS_SDA (&pin_PB20)
#define DEFAULT_SPI_BUS_SCK (&pin_PD09)
#define DEFAULT_SPI_BUS_MOSI (&pin_PD08)
#define DEFAULT_SPI_BUS_MISO (&pin_PD11)
#define DEFAULT_UART_BUS_RX (&pin_PB25)
#define DEFAULT_UART_BUS_TX (&pin_PB24)
// USB is always used internally so skip the pin objects for it.
#define IGNORE_PIN_PA24 1
#define IGNORE_PIN_PA25 1
#define CIRCUITPY_I2CSLAVE

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@ -0,0 +1,11 @@
LD_FILE = boards/samd51x20-bootloader-external-flash.ld
USB_VID = 0x239A
USB_PID = 0x8032
USB_PRODUCT = "Grand Central M4 Express"
USB_MANUFACTURER = "Adafruit Industries LLC"
QSPI_FLASH_FILESYSTEM = 1
LONGINT_IMPL = MPZ
CHIP_VARIANT = SAMD51P20A
CHIP_FAMILY = samd51

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@ -0,0 +1,133 @@
#include "shared-bindings/board/__init__.h"
#include "board_busses.h"
// This mapping only includes functional names because pins broken
// out on connectors are labeled with their MCU name available from
// microcontroller.pin.
STATIC const mp_map_elem_t board_global_dict_table[] = {
{ MP_OBJ_NEW_QSTR(MP_QSTR_AREF), (mp_obj_t)&pin_PA03 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A0), (mp_obj_t)&pin_PA02 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A1), (mp_obj_t)&pin_PA05 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A2), (mp_obj_t)&pin_PB03 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A3), (mp_obj_t)&pin_PC00 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A4), (mp_obj_t)&pin_PC01 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A5), (mp_obj_t)&pin_PC02 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A6), (mp_obj_t)&pin_PC03 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A7), (mp_obj_t)&pin_PB04 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A8), (mp_obj_t)&pin_PB05 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A9), (mp_obj_t)&pin_PB06 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A10), (mp_obj_t)&pin_PB07 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A11), (mp_obj_t)&pin_PB08 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A12), (mp_obj_t)&pin_PB09 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A13), (mp_obj_t)&pin_PA04 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A14), (mp_obj_t)&pin_PA06 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_A15), (mp_obj_t)&pin_PA07 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D0), (mp_obj_t)&pin_PB25 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_RX), (mp_obj_t)&pin_PB25 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D1), (mp_obj_t)&pin_PB24 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_TX), (mp_obj_t)&pin_PB24 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D2), (mp_obj_t)&pin_PC18 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D3), (mp_obj_t)&pin_PC19 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D4), (mp_obj_t)&pin_PC20 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D5), (mp_obj_t)&pin_PC21 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D6), (mp_obj_t)&pin_PD20 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D7), (mp_obj_t)&pin_PD21 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D8), (mp_obj_t)&pin_PB18 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D9), (mp_obj_t)&pin_PB19 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D10), (mp_obj_t)&pin_PB22 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D11), (mp_obj_t)&pin_PB23 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D12), (mp_obj_t)&pin_PB00 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D13), (mp_obj_t)&pin_PB01 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_TX3), (mp_obj_t)&pin_PB16 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D14), (mp_obj_t)&pin_PB16 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_RX3), (mp_obj_t)&pin_PB17 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D15), (mp_obj_t)&pin_PB17 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_TX2), (mp_obj_t)&pin_PC22 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D16), (mp_obj_t)&pin_PC22 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_RX2), (mp_obj_t)&pin_PC23 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D17), (mp_obj_t)&pin_PC23 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_TX1), (mp_obj_t)&pin_PB12 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D18), (mp_obj_t)&pin_PB12 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_RX1), (mp_obj_t)&pin_PB13 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D19), (mp_obj_t)&pin_PB13 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D20), (mp_obj_t)&pin_PB20 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D21), (mp_obj_t)&pin_PB21 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SDA), (mp_obj_t)&pin_PB20 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCL), (mp_obj_t)&pin_PB21 },
// Not connected but probably should be.
//{ MP_OBJ_NEW_QSTR(MP_QSTR_D22), (mp_obj_t)&pin_PB01 },
//{ MP_OBJ_NEW_QSTR(MP_QSTR_D23), (mp_obj_t)&pin_PB01 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D24), (mp_obj_t)&pin_PC17 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCL1), (mp_obj_t)&pin_PC17 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D25), (mp_obj_t)&pin_PC16 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SDA1), (mp_obj_t)&pin_PC16 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D26), (mp_obj_t)&pin_PA12 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_DEN1), (mp_obj_t)&pin_PA12 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D27), (mp_obj_t)&pin_PA13 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_DEN2), (mp_obj_t)&pin_PA13 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D28), (mp_obj_t)&pin_PA14 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_CLK), (mp_obj_t)&pin_PA14 },
// { MP_OBJ_NEW_QSTR(MP_QSTR_D29), (mp_obj_t)&pin_PB01 }, // TODO GCLK
{ MP_OBJ_NEW_QSTR(MP_QSTR_D30), (mp_obj_t)&pin_PA23 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D7), (mp_obj_t)&pin_PA23 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D31), (mp_obj_t)&pin_PA22 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D6), (mp_obj_t)&pin_PA22 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D32), (mp_obj_t)&pin_PA21 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D5), (mp_obj_t)&pin_PA21 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D33), (mp_obj_t)&pin_PA20 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D4), (mp_obj_t)&pin_PA20 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D34), (mp_obj_t)&pin_PA19 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D3), (mp_obj_t)&pin_PA19 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D35), (mp_obj_t)&pin_PA18 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D2), (mp_obj_t)&pin_PA18 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D36), (mp_obj_t)&pin_PA17 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D1), (mp_obj_t)&pin_PA17 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D37), (mp_obj_t)&pin_PA16 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D0), (mp_obj_t)&pin_PA16 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D38), (mp_obj_t)&pin_PB15 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D9), (mp_obj_t)&pin_PB15 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D39), (mp_obj_t)&pin_PB14 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D8), (mp_obj_t)&pin_PB14 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D40), (mp_obj_t)&pin_PC13 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D11), (mp_obj_t)&pin_PC13 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D41), (mp_obj_t)&pin_PC12 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D10), (mp_obj_t)&pin_PC12 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D42), (mp_obj_t)&pin_PC15 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D13), (mp_obj_t)&pin_PC15 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D43), (mp_obj_t)&pin_PC14 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_PCC_D12), (mp_obj_t)&pin_PC14 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D44), (mp_obj_t)&pin_PC11 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D45), (mp_obj_t)&pin_PC10 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D46), (mp_obj_t)&pin_PC06 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D47), (mp_obj_t)&pin_PC07 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D48), (mp_obj_t)&pin_PC04 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D49), (mp_obj_t)&pin_PC05 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D50), (mp_obj_t)&pin_PD11 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_MISO), (mp_obj_t)&pin_PD11 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D51), (mp_obj_t)&pin_PD08 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_MOSI), (mp_obj_t)&pin_PD08 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D52), (mp_obj_t)&pin_PD09 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SCK), (mp_obj_t)&pin_PD09 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_D53), (mp_obj_t)&pin_PD10 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SS), (mp_obj_t)&pin_PD10 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_MOSI), (mp_obj_t)&pin_PB26 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_SCK), (mp_obj_t)&pin_PB27 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_CS), (mp_obj_t)&pin_PB28 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_SD_MISO), (mp_obj_t)&pin_PB29 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_NEOPIXEL), (mp_obj_t)&pin_PC24 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_LED_RX), (mp_obj_t)&pin_PC31 },
{ MP_OBJ_NEW_QSTR(MP_QSTR_LED_TX), (mp_obj_t)&pin_PC30 },
{ MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) },
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
};
MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);

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@ -37,6 +37,7 @@
#define CMD_READ_STATUS 0x05
#define CMD_READ_STATUS2 0x35
#define CMD_WRITE_STATUS_BYTE1 0x01
#define CMD_WRITE_STATUS_BYTE2 0x31
#define CMD_DUAL_READ 0x3b
#define CMD_QUAD_READ 0x6b
#define CMD_ENABLE_RESET 0x66

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@ -54,6 +54,10 @@ typedef struct {
// Supports the quad input page program command 0x32. This is known as 1-1-4 because it only
// uses all four lines for data.
bool supports_qspi_writes: 1;
// Requires a separate command 0x31 to write to the second byte of the status register.
// Otherwise two byte are written via 0x01.
bool write_status_register_split: 1;
} external_flash_device;
// Settings for the Adesto Tech AT25DF081A 1MiB SPI flash. Its on the SAMD21
@ -71,6 +75,7 @@ typedef struct {
.supports_qspi = false, \
.has_quad_enable = false, \
.supports_qspi_writes = false, \
.write_status_register_split = false, \
}
// Settings for the Gigadevice GD25Q16C 2MiB SPI flash.
@ -87,6 +92,7 @@ typedef struct {
.supports_qspi = true, \
.has_quad_enable = true, \
.supports_qspi_writes = true, \
.write_status_register_split = false, \
}
// Settings for the Gigadevice GD25Q64C 8MiB SPI flash.
@ -103,6 +109,7 @@ typedef struct {
.supports_qspi = true, \
.has_quad_enable = true, \
.supports_qspi_writes = true, \
.write_status_register_split = true, \
}
// Settings for the Cypress (was Spansion) S25FL064L 8MiB SPI flash.
@ -119,6 +126,7 @@ typedef struct {
.supports_qspi = true, \
.has_quad_enable = true, \
.supports_qspi_writes = true, \
.write_status_register_split = false, \
}
// Settings for the Cypress (was Spansion) S25FL116K 2MiB SPI flash.
@ -135,6 +143,7 @@ typedef struct {
.supports_qspi = true, \
.has_quad_enable = true, \
.supports_qspi_writes = false, \
.write_status_register_split = false, \
}
// Settings for the Cypress (was Spansion) S25FL216K 2MiB SPI flash.
@ -151,6 +160,7 @@ typedef struct {
.supports_qspi = false, \
.has_quad_enable = false, \
.supports_qspi_writes = false, \
.write_status_register_split = false, \
}
// Settings for the Winbond W25Q16FW 2MiB SPI flash.
@ -167,6 +177,7 @@ typedef struct {
.supports_qspi = true, \
.has_quad_enable = true, \
.supports_qspi_writes = true, \
.write_status_register_split = false, \
}
// Settings for the Winbond W25Q16JV 2MiB SPI flash.
@ -183,6 +194,7 @@ typedef struct {
.supports_qspi = true, \
.has_quad_enable = true, \
.supports_qspi_writes = true, \
.write_status_register_split = false, \
}
// Settings for the Winbond W25Q32BV 4MiB SPI flash.
@ -199,6 +211,7 @@ typedef struct {
.supports_qspi = true, \
.has_quad_enable = true, \
.supports_qspi_writes = false, \
.write_status_register_split = false, \
}
// Settings for the Winbond W25Q64JV-IM 8MiB SPI flash. Note that JV-IQ has a different .memory_type (0x40)
@ -215,6 +228,7 @@ typedef struct {
.supports_qspi = true, \
.has_quad_enable = true, \
.supports_qspi_writes = true, \
.write_status_register_split = false, \
}
// Settings for the Winbond W25Q64JV-IQ 8MiB SPI flash. Note that JV-IM has a different .memory_type (0x70)
@ -231,6 +245,7 @@ typedef struct {
.supports_qspi = true, \
.has_quad_enable = true, \
.supports_qspi_writes = true, \
.write_status_register_split = false, \
}
// Settings for the Winbond W25Q80DL 1MiB SPI flash.
@ -247,6 +262,7 @@ typedef struct {
.supports_qspi = true, \
.has_quad_enable = true, \
.supports_qspi_writes = false, \
.write_status_register_split = false, \
}

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@ -231,8 +231,12 @@ void spi_flash_init_device(const external_flash_device* device) {
// Bit 1 is Quad Enable
if ((status & 0x2) == 0) {
uint8_t full_status[2] = { 0x0, 0x2};
uint8_t full_status[2] = {0x0, 0x2};
spi_flash_command(CMD_ENABLE_WRITE);
spi_flash_write_command(CMD_WRITE_STATUS_BYTE1, full_status, 2);
if (device->write_status_register_split) {
spi_flash_write_command(CMD_WRITE_STATUS_BYTE2, full_status + 1, 1);
} else {
spi_flash_write_command(CMD_WRITE_STATUS_BYTE1, full_status, 2);
}
}
}

@ -1 +1 @@
Subproject commit b099a172dfb6345a8dac30633df4f6267489c38e
Subproject commit d0dcba251c27f629c0a89b5ced4433dd0a609ca3

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@ -16,6 +16,7 @@ feather_m0_rfm9x \
feather_m4_express \
feather_nrf52832 \
feather_nrf52840_express \
grandcentral_m4_express \
pca10056 \
feather_radiofruit_zigbee \
gemma_m0 \