allow multiple I2C and SPI; improve nrfx_config.h
This commit is contained in:
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2309e60c0d
commit
2c15d12f2f
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@ -34,8 +34,27 @@
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#include "nrfx_twim.h"
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#include "nrfx_twim.h"
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#include "nrf_gpio.h"
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#include "nrf_gpio.h"
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#include "nrfx_spim.h"
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#include "nrf_gpio.h"
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STATIC twim_peripheral_t twim_peripherals[] = {
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#if NRFX_CHECK(NRFX_TWIM0_ENABLED)
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// SPIM0 and TWIM0 share an address.
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{ .twim = NRFX_TWIM_INSTANCE(0),
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.in_use = false,
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.max_xfer_size = TWIM0_EASYDMA_MAXCNT_SIZE,
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},
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#endif
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#if NRFX_CHECK(NRFX_TWIM1_ENABLED)
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// SPIM1 and TWIM1 share an address.
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{ .twim = NRFX_TWIM_INSTANCE(1),
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.in_use = false,
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.max_xfer_size = TWIM1_EASYDMA_MAXCNT_SIZE,
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},
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#endif
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};
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#define INST_NO 0
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#define INST_NO 0
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#define MAX_XFER_SIZE ((1U << NRFX_CONCAT_3(TWIM, INST_NO, _EASYDMA_MAXCNT_SIZE)) - 1)
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static uint8_t twi_error_to_mp(const nrfx_err_t err) {
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static uint8_t twi_error_to_mp(const nrfx_err_t err) {
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switch (err) {
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switch (err) {
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@ -54,11 +73,23 @@ static uint8_t twi_error_to_mp(const nrfx_err_t err) {
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}
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}
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void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) {
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void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *scl, const mcu_pin_obj_t *sda, uint32_t frequency, uint32_t timeout) {
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if (scl->number == sda->number)
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if (scl->number == sda->number) {
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mp_raise_ValueError(translate("Invalid pins"));
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mp_raise_ValueError(translate("Invalid pins"));
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}
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const nrfx_twim_t instance = NRFX_TWIM_INSTANCE(INST_NO);
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// Find a free instance.
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self->twim = instance;
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self->twim_peripheral = NULL;
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for (size_t i = 0 ; i < MP_ARRAY_SIZE(twim_peripherals); i++) {
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if (!twim_peripherals[i].in_use) {
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self->twim_peripheral = &twim_peripherals[i];
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self->twim_peripheral->in_use = true;
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break;
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}
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}
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if (self->twim_peripheral == NULL) {
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mp_raise_ValueError(translate("All I2C peripherals are in use"));
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}
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nrfx_twim_config_t config = NRFX_TWIM_DEFAULT_CONFIG;
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nrfx_twim_config_t config = NRFX_TWIM_DEFAULT_CONFIG;
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config.scl = scl->number;
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config.scl = scl->number;
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@ -76,12 +107,12 @@ void common_hal_busio_i2c_construct(busio_i2c_obj_t *self, const mcu_pin_obj_t *
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claim_pin(sda);
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claim_pin(sda);
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claim_pin(scl);
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claim_pin(scl);
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nrfx_err_t err = nrfx_twim_init(&self->twim, &config, NULL, NULL);
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nrfx_err_t err = nrfx_twim_init(&self->twim_peripheral->twim, &config, NULL, NULL);
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// A soft reset doesn't uninit the driver so we might end up with a invalid state
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// A soft reset doesn't uninit the driver so we might end up with a invalid state
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if (err == NRFX_ERROR_INVALID_STATE) {
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if (err == NRFX_ERROR_INVALID_STATE) {
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nrfx_twim_uninit(&self->twim);
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nrfx_twim_uninit(&self->twim_peripheral->twim);
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err = nrfx_twim_init(&self->twim, &config, NULL, NULL);
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err = nrfx_twim_init(&self->twim_peripheral->twim, &config, NULL, NULL);
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}
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}
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if (err != NRFX_SUCCESS) {
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if (err != NRFX_SUCCESS) {
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@ -99,20 +130,22 @@ void common_hal_busio_i2c_deinit(busio_i2c_obj_t *self) {
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if (common_hal_busio_i2c_deinited(self))
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if (common_hal_busio_i2c_deinited(self))
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return;
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return;
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nrfx_twim_uninit(&self->twim);
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nrfx_twim_uninit(&self->twim_peripheral->twim);
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reset_pin_number(self->sda_pin_number);
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reset_pin_number(self->sda_pin_number);
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reset_pin_number(self->scl_pin_number);
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reset_pin_number(self->scl_pin_number);
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self->sda_pin_number = NO_PIN;
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self->sda_pin_number = NO_PIN;
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self->scl_pin_number = NO_PIN;
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self->scl_pin_number = NO_PIN;
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self->twim_peripheral->in_use = false;
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}
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}
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// nrfx_twim_tx doesn't support 0-length data so we fall back to the hal API
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// nrfx_twim_tx doesn't support 0-length data so we fall back to the hal API
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bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) {
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bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) {
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NRF_TWIM_Type *reg = self->twim.p_twim;
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NRF_TWIM_Type *reg = self->twim_peripheral->twim.p_twim;
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bool found = true;
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bool found = true;
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nrfx_twim_enable(&self->twim);
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nrfx_twim_enable(&self->twim_peripheral->twim);
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nrf_twim_address_set(reg, addr);
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nrf_twim_address_set(reg, addr);
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nrf_twim_tx_buffer_set(reg, NULL, 0);
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nrf_twim_tx_buffer_set(reg, NULL, 0);
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@ -135,19 +168,19 @@ bool common_hal_busio_i2c_probe(busio_i2c_obj_t *self, uint8_t addr) {
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found = false;
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found = false;
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}
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}
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nrfx_twim_disable(&self->twim);
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nrfx_twim_disable(&self->twim_peripheral->twim);
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return found;
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return found;
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}
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}
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bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) {
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bool common_hal_busio_i2c_try_lock(busio_i2c_obj_t *self) {
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bool grabbed_lock = false;
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bool grabbed_lock = false;
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// CRITICAL_SECTION_ENTER()
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// NRFX_CRITICAL_SECTION_ENTER();
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if (!self->has_lock) {
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if (!self->has_lock) {
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grabbed_lock = true;
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grabbed_lock = true;
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self->has_lock = true;
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self->has_lock = true;
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}
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}
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// CRITICAL_SECTION_LEAVE();
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// NRFX_CRITICAL_SECTION_EXIT();
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return grabbed_lock;
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return grabbed_lock;
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}
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}
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@ -163,22 +196,23 @@ uint8_t common_hal_busio_i2c_write(busio_i2c_obj_t *self, uint16_t addr, const u
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if(len == 0)
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if(len == 0)
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return common_hal_busio_i2c_probe(self, addr) ? 0 : MP_ENODEV;
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return common_hal_busio_i2c_probe(self, addr) ? 0 : MP_ENODEV;
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const uint32_t parts = len / MAX_XFER_SIZE;
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const uint32_t max_xfer_size = self->twim_peripheral->max_xfer_size;
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const uint32_t remainder = len % MAX_XFER_SIZE;
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const uint32_t parts = len / max_xfer_size;
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const uint32_t remainder = len % max_xfer_size;
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nrfx_err_t err = NRFX_SUCCESS;
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nrfx_err_t err = NRFX_SUCCESS;
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nrfx_twim_enable(&self->twim);
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nrfx_twim_enable(&self->twim_peripheral->twim);
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for (uint32_t i = 0; i < parts; ++i) {
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for (uint32_t i = 0; i < parts; ++i) {
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err = nrfx_twim_tx(&self->twim, addr, data + i * MAX_XFER_SIZE, MAX_XFER_SIZE, !stopBit);
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err = nrfx_twim_tx(&self->twim_peripheral->twim, addr, data + i * max_xfer_size, max_xfer_size, !stopBit);
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if (err != NRFX_SUCCESS)
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if (err != NRFX_SUCCESS)
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break;
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break;
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}
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}
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if ((remainder > 0) && (err == NRFX_SUCCESS))
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if ((remainder > 0) && (err == NRFX_SUCCESS))
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err = nrfx_twim_tx(&self->twim, addr, data + parts * MAX_XFER_SIZE, remainder, !stopBit);
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err = nrfx_twim_tx(&self->twim_peripheral->twim, addr, data + parts * max_xfer_size, remainder, !stopBit);
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nrfx_twim_disable(&self->twim);
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nrfx_twim_disable(&self->twim_peripheral->twim);
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return twi_error_to_mp(err);
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return twi_error_to_mp(err);
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}
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}
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@ -187,22 +221,23 @@ uint8_t common_hal_busio_i2c_read(busio_i2c_obj_t *self, uint16_t addr, uint8_t
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if(len == 0)
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if(len == 0)
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return 0;
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return 0;
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const uint32_t parts = len / MAX_XFER_SIZE;
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const uint32_t max_xfer_size = self->twim_peripheral->max_xfer_size;
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const uint32_t remainder = len % MAX_XFER_SIZE;
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const uint32_t parts = len / max_xfer_size;
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const uint32_t remainder = len % max_xfer_size;
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nrfx_err_t err = NRFX_SUCCESS;
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nrfx_err_t err = NRFX_SUCCESS;
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nrfx_twim_enable(&self->twim);
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nrfx_twim_enable(&self->twim_peripheral->twim);
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for (uint32_t i = 0; i < parts; ++i) {
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for (uint32_t i = 0; i < parts; ++i) {
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err = nrfx_twim_rx(&self->twim, addr, data + i * MAX_XFER_SIZE, MAX_XFER_SIZE);
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err = nrfx_twim_rx(&self->twim_peripheral->twim, addr, data + i * max_xfer_size, max_xfer_size);
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if (err != NRFX_SUCCESS)
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if (err != NRFX_SUCCESS)
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break;
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break;
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}
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}
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if ((remainder > 0) && (err == NRFX_SUCCESS))
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if ((remainder > 0) && (err == NRFX_SUCCESS))
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err = nrfx_twim_rx(&self->twim, addr, data + parts * MAX_XFER_SIZE, remainder);
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err = nrfx_twim_rx(&self->twim_peripheral->twim, addr, data + parts * max_xfer_size, remainder);
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nrfx_twim_disable(&self->twim);
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nrfx_twim_disable(&self->twim_peripheral->twim);
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return twi_error_to_mp(err);
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return twi_error_to_mp(err);
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}
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}
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#include "py/obj.h"
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#include "py/obj.h"
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typedef struct {
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typedef struct {
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mp_obj_base_t base;
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nrfx_twim_t twim;
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nrfx_twim_t twim;
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bool in_use;
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uint8_t max_xfer_size;
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} twim_peripheral_t;
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typedef struct {
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mp_obj_base_t base;
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twim_peripheral_t* twim_peripheral;
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bool has_lock;
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bool has_lock;
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uint8_t scl_pin_number;
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uint8_t scl_pin_number;
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uint8_t sda_pin_number;
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uint8_t sda_pin_number;
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@ -186,12 +186,12 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self, uint32_t baudrate, ui
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bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {
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bool common_hal_busio_spi_try_lock(busio_spi_obj_t *self) {
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bool grabbed_lock = false;
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bool grabbed_lock = false;
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// CRITICAL_SECTION_ENTER()
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// NRFX_CRITICAL_SECTION_ENTER();
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// if (!self->has_lock) {
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if (!self->has_lock) {
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grabbed_lock = true;
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grabbed_lock = true;
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self->has_lock = true;
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self->has_lock = true;
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// }
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}
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// CRITICAL_SECTION_LEAVE();
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// NRFX_CRITICAL_SECTION_EXIT();
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return grabbed_lock;
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return grabbed_lock;
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}
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}
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@ -5,11 +5,27 @@
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#define NRFX_POWER_ENABLED 1
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#define NRFX_POWER_ENABLED 1
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#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7
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#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7
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// Turn on nrfx supported workarounds for errata in Rev1/Rev2 of nRF52832
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#ifdef NRF52832_XXAA
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#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 1
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#endif
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// Turn on nrfx supported workarounds for errata in Rev1 of nRF52840
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#ifdef NRF52840_XXAA
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#define NRFX_SPIM3_NRF52840_ANOMALY_198_WORKAROUND_ENABLED 1
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#endif
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// SPI
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// SPI
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#define NRFX_SPIM_ENABLED 1
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#define NRFX_SPIM_ENABLED 1
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#define NRFX_SPIM0_ENABLED 1
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// TWIM0 and TWIM1 are the same peripherals as SPIM0 and SPIM1.
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#define NRFX_SPIM1_ENABLED 1
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// The IRQ handlers for these peripherals are set up at compile time,
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// so out of the box TWIM0/SPIM0 and TWIM1/SPIM1 cannot be shared
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// between common-hal/busio/I2C.c and SPI.c.
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// We could write an interrupt handler that checks whether it's
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// being used for SPI or I2C, but perhaps two I2C's and 1-2 SPI's are good enough for now.
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// Enable SPIM2 and SPIM3 (if available)
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#define NRFX_SPIM2_ENABLED 1
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#define NRFX_SPIM2_ENABLED 1
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#ifdef NRF52840_XXAA
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#ifdef NRF52840_XXAA
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#define NRFX_SPIM3_ENABLED 1
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#define NRFX_SPIM3_ENABLED 1
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@ -19,7 +35,7 @@
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#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
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#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 7
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#define NRFX_SPIM_MISO_PULL_CFG 1
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#define NRFX_SPIM_MISO_PULL_CFG 1
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// TWI aka. I2C
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// TWI aka. I2C; enable TWIM0 and TWIM1 (no conflict with SPIM choices)
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#define NRFX_TWIM_ENABLED 1
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#define NRFX_TWIM_ENABLED 1
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#define NRFX_TWIM0_ENABLED 1
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#define NRFX_TWIM0_ENABLED 1
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#define NRFX_TWIM1_ENABLED 1
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#define NRFX_TWIM1_ENABLED 1
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