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atmel-samd/samd21: Use XOSC32K on boards with a crystal

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Use XOSC32K on boards that have BOARD_HAS_CRYSTAL defined and set to 1.
This commit is contained in:
Noralf Trønnes 2018-05-03 19:43:30 +02:00
parent 4adba51569
commit 2893e795fc
4 changed files with 28 additions and 2 deletions
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2
ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h
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@ -46,3 +46,5 @@
GD25Q16C GD25Q16C
#include "external_flash/external_flash.h" #include "external_flash/external_flash.h"
#define BOARD_HAS_CRYSTAL 1

2
ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h
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@ -47,3 +47,5 @@
GD25Q16C GD25Q16C
#include "external_flash/external_flash.h" #include "external_flash/external_flash.h"
#define BOARD_HAS_CRYSTAL 1

9
ports/atmel-samd/clocks.h
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@ -31,6 +31,7 @@
#include <stdint.h> #include <stdint.h>
#include "include/sam.h" #include "include/sam.h"
#include "mpconfigboard.h" // for BOARD_HAS_CRYSTAL
#ifdef SAMD51 #ifdef SAMD51
#define CLOCK_48MHZ GCLK_GENCTRL_SRC_DFLL_Val #define CLOCK_48MHZ GCLK_GENCTRL_SRC_DFLL_Val
@ -53,6 +54,14 @@ void disconnect_gclk_from_peripheral(uint8_t gclk, uint8_t peripheral);
void enable_clock_generator(uint8_t gclk, uint32_t source, uint16_t divisor); void enable_clock_generator(uint8_t gclk, uint32_t source, uint16_t divisor);
void disable_clock_generator(uint8_t gclk); void disable_clock_generator(uint8_t gclk);
static inline bool board_has_crystal(void) {
#ifdef BOARD_HAS_CRYSTAL
return BOARD_HAS_CRYSTAL == 1;
#else
return false;
#endif
}
void clock_init(void); void clock_init(void);
#endif // MICROPY_INCLUDED_ATMEL_SAMD_CLOCKS_H #endif // MICROPY_INCLUDED_ATMEL_SAMD_CLOCKS_H

17
ports/atmel-samd/samd21_clocks.c
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@ -94,6 +94,13 @@ static void init_clock_source_osc32k(void) {
while (!SYSCTRL->PCLKSR.bit.OSC32KRDY) {} while (!SYSCTRL->PCLKSR.bit.OSC32KRDY) {}
} }
static void init_clock_source_xosc32k(void) {
SYSCTRL->XOSC32K.reg = SYSCTRL_XOSC32K_EN32K |
SYSCTRL_XOSC32K_XTALEN |
SYSCTRL_XOSC32K_ENABLE;
while (!SYSCTRL->PCLKSR.bit.XOSC32KRDY) {}
}
static void init_clock_source_dfll48m(void) { static void init_clock_source_dfll48m(void) {
SYSCTRL->DFLLCTRL.reg = SYSCTRL_DFLLCTRL_ENABLE; SYSCTRL->DFLLCTRL.reg = SYSCTRL_DFLLCTRL_ENABLE;
while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {} while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {}
@ -116,9 +123,15 @@ static void init_clock_source_dfll48m(void) {
void clock_init(void) void clock_init(void)
{ {
init_clock_source_osc8m(); init_clock_source_osc8m();
init_clock_source_osc32k(); if (board_has_crystal())
init_clock_source_xosc32k();
else
init_clock_source_osc32k();
enable_clock_generator(0, GCLK_GENCTRL_SRC_DFLL48M_Val, 1); enable_clock_generator(0, GCLK_GENCTRL_SRC_DFLL48M_Val, 1);
enable_clock_generator(1, GCLK_GENCTRL_SRC_DFLL48M_Val, 150); enable_clock_generator(1, GCLK_GENCTRL_SRC_DFLL48M_Val, 150);
init_clock_source_dfll48m(); init_clock_source_dfll48m();
enable_clock_generator(2, GCLK_GENCTRL_SRC_OSC32K_Val, 32); if (board_has_crystal())
enable_clock_generator(2, GCLK_GENCTRL_SRC_XOSC32K_Val, 32);
else
enable_clock_generator(2, GCLK_GENCTRL_SRC_OSC32K_Val, 32);
} }