From 2893e795fcbe0b36313a409d7d994880a3602689 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= Date: Thu, 3 May 2018 19:43:30 +0200 Subject: [PATCH] atmel-samd/samd21: Use XOSC32K on boards with a crystal Use XOSC32K on boards that have BOARD_HAS_CRYSTAL defined and set to 1. --- .../boards/feather_m0_express/mpconfigboard.h | 2 ++ .../boards/metro_m0_express/mpconfigboard.h | 2 ++ ports/atmel-samd/clocks.h | 9 +++++++++ ports/atmel-samd/samd21_clocks.c | 17 +++++++++++++++-- 4 files changed, 28 insertions(+), 2 deletions(-) diff --git a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h index 56e9c8bb71..c85f553ba9 100644 --- a/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/feather_m0_express/mpconfigboard.h @@ -46,3 +46,5 @@ GD25Q16C #include "external_flash/external_flash.h" + +#define BOARD_HAS_CRYSTAL 1 diff --git a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h index a433e99495..e635acd593 100644 --- a/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h +++ b/ports/atmel-samd/boards/metro_m0_express/mpconfigboard.h @@ -47,3 +47,5 @@ GD25Q16C #include "external_flash/external_flash.h" + +#define BOARD_HAS_CRYSTAL 1 diff --git a/ports/atmel-samd/clocks.h b/ports/atmel-samd/clocks.h index e78e6173d9..6a61e49c7f 100644 --- a/ports/atmel-samd/clocks.h +++ b/ports/atmel-samd/clocks.h @@ -31,6 +31,7 @@ #include #include "include/sam.h" +#include "mpconfigboard.h" // for BOARD_HAS_CRYSTAL #ifdef SAMD51 #define CLOCK_48MHZ GCLK_GENCTRL_SRC_DFLL_Val @@ -53,6 +54,14 @@ void disconnect_gclk_from_peripheral(uint8_t gclk, uint8_t peripheral); void enable_clock_generator(uint8_t gclk, uint32_t source, uint16_t divisor); void disable_clock_generator(uint8_t gclk); +static inline bool board_has_crystal(void) { +#ifdef BOARD_HAS_CRYSTAL + return BOARD_HAS_CRYSTAL == 1; +#else + return false; +#endif +} + void clock_init(void); #endif // MICROPY_INCLUDED_ATMEL_SAMD_CLOCKS_H diff --git a/ports/atmel-samd/samd21_clocks.c b/ports/atmel-samd/samd21_clocks.c index b695a7fe8a..4fc039a588 100644 --- a/ports/atmel-samd/samd21_clocks.c +++ b/ports/atmel-samd/samd21_clocks.c @@ -94,6 +94,13 @@ static void init_clock_source_osc32k(void) { while (!SYSCTRL->PCLKSR.bit.OSC32KRDY) {} } +static void init_clock_source_xosc32k(void) { + SYSCTRL->XOSC32K.reg = SYSCTRL_XOSC32K_EN32K | + SYSCTRL_XOSC32K_XTALEN | + SYSCTRL_XOSC32K_ENABLE; + while (!SYSCTRL->PCLKSR.bit.XOSC32KRDY) {} +} + static void init_clock_source_dfll48m(void) { SYSCTRL->DFLLCTRL.reg = SYSCTRL_DFLLCTRL_ENABLE; while (!SYSCTRL->PCLKSR.bit.DFLLRDY) {} @@ -116,9 +123,15 @@ static void init_clock_source_dfll48m(void) { void clock_init(void) { init_clock_source_osc8m(); - init_clock_source_osc32k(); + if (board_has_crystal()) + init_clock_source_xosc32k(); + else + init_clock_source_osc32k(); enable_clock_generator(0, GCLK_GENCTRL_SRC_DFLL48M_Val, 1); enable_clock_generator(1, GCLK_GENCTRL_SRC_DFLL48M_Val, 150); init_clock_source_dfll48m(); - enable_clock_generator(2, GCLK_GENCTRL_SRC_OSC32K_Val, 32); + if (board_has_crystal()) + enable_clock_generator(2, GCLK_GENCTRL_SRC_XOSC32K_Val, 32); + else + enable_clock_generator(2, GCLK_GENCTRL_SRC_OSC32K_Val, 32); }