update frequencyin interrupt handler

This commit is contained in:
sommersoft 2019-02-22 17:19:09 -06:00
parent a1060747f8
commit 2437ab9605
3 changed files with 9 additions and 3 deletions

View File

@ -154,7 +154,8 @@ void frequencyin_reference_tc_init() {
if (dpll_gclk == 0xff) {
frequencyin_samd51_start_dpll();
}
turn_on_clocks(true, reference_tc, dpll_gclk, TC_HANDLER_FREQUENCYIN);
set_timer_handler(reference_tc, dpll_gclk, TC_HANDLER_FREQUENCYIN);
turn_on_clocks(true, reference_tc, dpll_gclk);
#endif
Tc *tc = tc_insts[reference_tc];
@ -289,7 +290,8 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t*
// SAMD21: We use GCLK0 generated from DFLL running at 48mhz
// SAMD51: We use a GCLK generated from DPLL1 running at <100mhz
#ifdef SAMD21
turn_on_clocks(true, timer_index, 0, TC_HANDLER_NO_INTERRUPT);
set_timer_handler(timer_index, 0, TC_HANDLER_NO_INTERRUPT);
turn_on_clocks(true, timer_index, 0);
#endif
#ifdef SAMD51
frequencyin_samd51_start_dpll();
@ -297,7 +299,8 @@ void common_hal_frequencyio_frequencyin_construct(frequencyio_frequencyin_obj_t*
common_hal_frequencyio_frequencyin_deinit(self);
mp_raise_RuntimeError(translate("No available clocks"));
}
turn_on_clocks(true, timer_index, dpll_gclk, TC_HANDLER_NO_INTERRUPT);
set_timer_handler(timer_index, dpll_gclk, TC_HANDLER_NO_INTERRUPT);
turn_on_clocks(true, timer_index, dpll_gclk);
#endif
// Ensure EIC is on

View File

@ -46,6 +46,8 @@ void shared_timer_handler(bool is_tc, uint8_t index) {
uint8_t handler = tc_handler[index];
if (handler == TC_HANDLER_PULSEOUT) {
pulseout_interrupt_handler(index);
} else if (handler == TC_HANDLER_FREQUENCYIN) {
frequencyin_interrupt_handler(index);
}
}
}

View File

@ -28,6 +28,7 @@
#define TC_HANDLER_NO_INTERRUPT 0x0
#define TC_HANDLER_PULSEOUT 0x1
#define TC_HANDLER_FREQUENCYIN 0x2
void set_timer_handler(bool is_tc, uint8_t index, uint8_t timer_handler);
void shared_timer_handler(bool is_tc, uint8_t index);