mimxrt10xx: Use the proper "betweenTransferDelay" (et al) values
Set the betweenTransferDelay to the SCK low-time, to avoid long pauses between bytes (transfers) while preventing the last SCK cycle in a byte from being a runt pulse. Compared to an earlier revision of this change, which just set the delays all to zero, this doesn't break using an AirLift, which was sensitive to the runt pulses (the simple loopback-wire test didn't detect the problem)
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@ -238,15 +238,10 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
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baudrate = 30000000; // "Absolute maximum frequency of operation (fop) is 30 MHz" -- IMXRT1010CEC.pdf
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}
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LPSPI_Enable(self->spi, false);
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uint32_t tcrPrescaleValue;
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self->baudrate = LPSPI_MasterSetBaudRate(self->spi, baudrate, LPSPI_MASTER_CLK_FREQ, &tcrPrescaleValue);
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self->spi->TCR = (self->spi->TCR & ~LPSPI_TCR_PRESCALE_MASK) | LPSPI_TCR_PRESCALE(tcrPrescaleValue);
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LPSPI_Enable(self->spi, true);
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if ((polarity == common_hal_busio_spi_get_polarity(self)) &&
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(phase == common_hal_busio_spi_get_phase(self)) &&
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(bits == ((self->spi->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT)) + 1) {
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(bits == ((self->spi->TCR & LPSPI_TCR_FRAMESZ_MASK) >> LPSPI_TCR_FRAMESZ_SHIFT)) + 1 &&
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(baudrate == common_hal_busio_spi_get_frequency(self))) {
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return true;
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}
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@ -257,10 +252,22 @@ bool common_hal_busio_spi_configure(busio_spi_obj_t *self,
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config.cpol = polarity;
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config.cpha = phase;
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config.bitsPerFrame = bits;
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// The between-transfer-delay must be equal to the SCK low-time.
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// Setting it lower introduces runt pulses, while setting it higher
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// wastes time.
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config.betweenTransferDelayInNanoSec = 1000000000 / config.baudRate / 2;
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LPSPI_Deinit(self->spi);
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LPSPI_MasterInit(self->spi, &config, LPSPI_MASTER_CLK_FREQ);
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// Recompute the actual baudrate so that we can set the baudrate
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// (frequency) property. We don't need to set TCR because it was
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// established by LPSPI_MasterInit, above
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uint32_t tcrPrescaleValue;
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LPSPI_Enable(self->spi, false);
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self->baudrate = LPSPI_MasterSetBaudRate(self->spi, baudrate, LPSPI_MASTER_CLK_FREQ, &tcrPrescaleValue);
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LPSPI_Enable(self->spi, true);
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return true;
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}
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