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Fix 8 bit recordings on CPX. 

The DMA trigger source was incorrect when using serializer 1 on
the SAMD21.

Playback register was incorrect for 8 bit as well. Now fixed.
This commit is contained in:
Scott Shawcroft 2018-05-02 15:15:25 -07:00
parent cfea51ec68
commit 22b7cd3d51
3 changed files with 17 additions and 3 deletions
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9
ports/atmel-samd/audio_dma.c
View File

@ -274,11 +274,16 @@ audio_dma_result audio_dma_setup_playback(audio_dma_t* dma,
MP_STATE_PORT(playing_audio)[dma->dma_channel] = dma->sample; MP_STATE_PORT(playing_audio)[dma->dma_channel] = dma->sample;
} }
dma->beat_size = 1;
dma->bytes_per_sample = 1;
if (audiosample_bits_per_sample(sample) == 16) { if (audiosample_bits_per_sample(sample) == 16) {
dma->beat_size = 2; dma->beat_size = 2;
dma->bytes_per_sample = 2; dma->bytes_per_sample = 2;
} else {
dma->beat_size = 1;
dma->bytes_per_sample = 1;
if (single_channel) {
output_register_address += 1;
}
} }
// Transfer both channels at once. // Transfer both channels at once.
if (!single_channel && audiosample_channel_count(sample) == 2) { if (!single_channel && audiosample_channel_count(sample) == 2) {

7
ports/atmel-samd/common-hal/audiobusio/PDMIn.c
View File

@ -371,7 +371,12 @@ uint32_t common_hal_audiobusio_pdmin_record_to_buffer(audiobusio_pdmin_obj_t* se
setup_dma(self, output_buffer_length, dma_descriptor(dma_channel), &second_descriptor, setup_dma(self, output_buffer_length, dma_descriptor(dma_channel), &second_descriptor,
words_per_buffer, words_per_sample, first_buffer, second_buffer); words_per_buffer, words_per_sample, first_buffer, second_buffer);
dma_configure(dma_channel, I2S_DMAC_ID_RX_0, true); uint8_t trigger_source = I2S_DMAC_ID_RX_0;
#ifdef SAMD21
trigger_source += self->serializer;
#endif
dma_configure(dma_channel, trigger_source, true);
init_event_channel_interrupt(event_channel, CORE_GCLK, EVSYS_ID_GEN_DMAC_CH_0 + dma_channel); init_event_channel_interrupt(event_channel, CORE_GCLK, EVSYS_ID_GEN_DMAC_CH_0 + dma_channel);
dma_enable_channel(dma_channel); dma_enable_channel(dma_channel);

4
ports/atmel-samd/shared_dma.c
View File

@ -99,6 +99,8 @@ void dma_enable_channel(uint8_t channel_number) {
common_hal_mcu_disable_interrupts(); common_hal_mcu_disable_interrupts();
/** Select the DMA channel and clear software trigger */ /** Select the DMA channel and clear software trigger */
DMAC->CHID.reg = DMAC_CHID_ID(channel_number); DMAC->CHID.reg = DMAC_CHID_ID(channel_number);
// Clear any previous interrupts.
DMAC->CHINTFLAG.reg = DMAC_CHINTFLAG_MASK;
DMAC->CHCTRLA.bit.ENABLE = true; DMAC->CHCTRLA.bit.ENABLE = true;
common_hal_mcu_enable_interrupts(); common_hal_mcu_enable_interrupts();
#endif #endif
@ -106,6 +108,8 @@ void dma_enable_channel(uint8_t channel_number) {
#ifdef SAMD51 #ifdef SAMD51
DmacChannel* channel = &DMAC->Channel[channel_number]; DmacChannel* channel = &DMAC->Channel[channel_number];
channel->CHCTRLA.bit.ENABLE = true; channel->CHCTRLA.bit.ENABLE = true;
// Clear any previous interrupts.
channel->CHINTFLAG.reg = DMAC_CHINTFLAG_MASK;
#endif #endif
} }