atmel-samd: Rework pin definitions to share most of the data structures and included based on ASF defines.
This commit is contained in:
parent
73848f4cd0
commit
2098515f6a
|
@ -173,6 +173,7 @@ SRC_C = \
|
|||
asf/sam0/utils/cmsis/samd21/source/gcc/startup_samd21.c \
|
||||
asf/sam0/utils/cmsis/samd21/source/system_samd21.c \
|
||||
asf/sam0/utils/syscalls/gcc/syscalls.c \
|
||||
boards/samd21_pins.c \
|
||||
boards/$(BOARD)/init.c \
|
||||
boards/$(BOARD)/pins.c \
|
||||
lib/fatfs/ff.c \
|
||||
|
|
|
@ -1,139 +1,4 @@
|
|||
#include "pins.h"
|
||||
#include "asf/sam0/drivers/system/system.h"
|
||||
|
||||
PIN(PA02, true, ADC_POSITIVE_INPUT_PIN0, NO_TIMER, NO_TIMER, NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
PIN(PB08, true, ADC_POSITIVE_INPUT_PIN2,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PB08E_TC4_WO0, MUX_PB08E_TC4_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM4, 0, PINMUX_PB08D_SERCOM4_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PB09, true, ADC_POSITIVE_INPUT_PIN3,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PB09E_TC4_WO1, MUX_PB09E_TC4_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM4, 1, PINMUX_PB09D_SERCOM4_PAD1),
|
||||
NO_SERCOM);
|
||||
PIN(PA04, true, ADC_POSITIVE_INPUT_PIN4,
|
||||
TIMER(0, TCC0, 0, 0, PIN_PA04E_TCC0_WO0, MUX_PA04E_TCC0_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 0, PINMUX_PA04D_SERCOM0_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PA05, true, ADC_POSITIVE_INPUT_PIN5,
|
||||
TIMER(0, TCC0, 1, 1, PIN_PA05E_TCC0_WO1, MUX_PA05E_TCC0_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 1, PINMUX_PA05D_SERCOM0_PAD1),
|
||||
NO_SERCOM);
|
||||
PIN(PB02, true, ADC_POSITIVE_INPUT_PIN10,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 0, PINMUX_PB02D_SERCOM5_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PA11, true, ADC_POSITIVE_INPUT_PIN19,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA11E_TCC1_WO1, MUX_PA11E_TCC1_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA11F_TCC0_WO3, MUX_PA11F_TCC0_WO3),
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA11C_SERCOM0_PAD3),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA11D_SERCOM2_PAD3));
|
||||
PIN(PA10, true, ADC_POSITIVE_INPUT_PIN18,
|
||||
TIMER(0, TCC1, 0, 0, PIN_PA10E_TCC1_WO0, MUX_PA10E_TCC1_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA10F_TCC0_WO2, MUX_PA10F_TCC0_WO2),
|
||||
SERCOM(SERCOM0, 2, PINMUX_PA10C_SERCOM0_PAD2),
|
||||
SERCOM(SERCOM2, 2, PINMUX_PA10D_SERCOM2_PAD2));
|
||||
PIN(PA14, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 0, 0, PIN_PA14E_TC3_WO0, MUX_PA14E_TC3_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PA14F_TCC0_WO4, MUX_PA14F_TCC0_WO4),
|
||||
SERCOM(SERCOM2, 2, PINMUX_PA14C_SERCOM2_PAD2),
|
||||
SERCOM(SERCOM4, 2, PINMUX_PA14D_SERCOM4_PAD2));
|
||||
PIN(PA09, true, ADC_POSITIVE_INPUT_PIN17,
|
||||
TIMER(0, TCC0, 1, 1, PIN_PA09E_TCC0_WO1, MUX_PA09E_TCC0_WO1),
|
||||
TIMER(0, TCC1, 3, 3, PIN_PA09F_TCC1_WO3, MUX_PA09F_TCC1_WO3),
|
||||
SERCOM(SERCOM0, 1, PINMUX_PA09C_SERCOM0_PAD1),
|
||||
SERCOM(SERCOM2, 1, PINMUX_PA09D_SERCOM2_PAD1));
|
||||
PIN(PA08, true, ADC_POSITIVE_INPUT_PIN16,
|
||||
TIMER(0, TCC0, 0, 0, PIN_PA08E_TCC0_WO0, MUX_PA08E_TCC0_WO0),
|
||||
TIMER(0, TCC1, 2, 2, PIN_PA08F_TCC1_WO2, MUX_PA08F_TCC1_WO2),
|
||||
SERCOM(SERCOM0, 0, PINMUX_PA08C_SERCOM0_PAD0),
|
||||
SERCOM(SERCOM2, 0, PINMUX_PA08D_SERCOM2_PAD0));
|
||||
PIN(PA15, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA15E_TC3_WO1, MUX_PA15E_TC3_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA15F_TCC0_WO5, MUX_PA15F_TCC0_WO5),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA15C_SERCOM2_PAD3),
|
||||
SERCOM(SERCOM4, 3, PINMUX_PA15D_SERCOM4_PAD3));
|
||||
PIN(PA20, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA20F_TCC0_WO6, MUX_PA20F_TCC0_WO6),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 2, PINMUX_PA20C_SERCOM5_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA20D_SERCOM3_PAD2));
|
||||
PIN(PA21, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA21F_TCC0_WO7, MUX_PA21F_TCC0_WO7),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 3, PINMUX_PA21C_SERCOM5_PAD3),
|
||||
SERCOM(SERCOM3, 3, PINMUX_PA21D_SERCOM3_PAD3));
|
||||
PIN(PA06, true, ADC_POSITIVE_INPUT_PIN6,
|
||||
TIMER(0, TCC1, 0, 0, PIN_PA06E_TCC1_WO0, MUX_PA06E_TCC1_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 2, PINMUX_PA06D_SERCOM0_PAD2),
|
||||
NO_SERCOM);
|
||||
PIN(PA07, true, ADC_POSITIVE_INPUT_PIN7,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA07E_TCC1_WO1, MUX_PA07E_TCC1_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA07D_SERCOM0_PAD3),
|
||||
NO_SERCOM);
|
||||
PIN(PA18, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 0, 0, PIN_PA18E_TC3_WO0, MUX_PA18E_TC3_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA18F_TCC0_WO2, MUX_PA18F_TCC0_WO2),
|
||||
SERCOM(SERCOM1, 2, PINMUX_PA18C_SERCOM1_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA18D_SERCOM3_PAD2));
|
||||
PIN(PA16, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA16E_TCC2_WO0, MUX_PA16E_TCC2_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA16F_TCC0_WO6, MUX_PA16F_TCC0_WO6),
|
||||
SERCOM(SERCOM1, 0, PINMUX_PA16C_SERCOM1_PAD0),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA16D_SERCOM3_PAD0));
|
||||
PIN(PA19, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA19E_TC3_WO1, MUX_PA19E_TC3_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA19F_TCC0_WO3, MUX_PA19F_TCC0_WO3),
|
||||
SERCOM(SERCOM1, 3, PINMUX_PA19C_SERCOM1_PAD3),
|
||||
SERCOM(SERCOM3, 3, PINMUX_PA19C_SERCOM1_PAD3));
|
||||
PIN(PA17, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 1, 1, PIN_PA17E_TCC2_WO1, MUX_PA17E_TCC2_WO1),
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA17F_TCC0_WO7, MUX_PA17F_TCC0_WO7),
|
||||
SERCOM(SERCOM1, 1, PINMUX_PA17C_SERCOM1_PAD1),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA17D_SERCOM3_PAD1));
|
||||
PIN(PA22, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PA22E_TC4_WO0, MUX_PA22E_TC4_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PA22F_TCC0_WO4, MUX_PA22F_TCC0_WO4),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA22C_SERCOM3_PAD0),
|
||||
SERCOM(SERCOM5, 0, PINMUX_PA22D_SERCOM5_PAD0));
|
||||
PIN(PA23, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PA23E_TC4_WO1, MUX_PA23E_TC4_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA23F_TCC0_WO5, MUX_PA23F_TCC0_WO5),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA23C_SERCOM3_PAD1),
|
||||
SERCOM(SERCOM5, 1, PINMUX_PA23C_SERCOM3_PAD1));
|
||||
|
||||
STATIC const mp_map_elem_t pin_cpu_pins_locals_dict_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA02), (mp_obj_t)&pin_PA02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB08), (mp_obj_t)&pin_PB08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB09), (mp_obj_t)&pin_PB09 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA04), (mp_obj_t)&pin_PA04 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA05), (mp_obj_t)&pin_PA05 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB02), (mp_obj_t)&pin_PB02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA11), (mp_obj_t)&pin_PA11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA10), (mp_obj_t)&pin_PA10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA14), (mp_obj_t)&pin_PA14 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA09), (mp_obj_t)&pin_PA09 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA08), (mp_obj_t)&pin_PA08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA15), (mp_obj_t)&pin_PA15 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA20), (mp_obj_t)&pin_PA20 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA21), (mp_obj_t)&pin_PA21 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA06), (mp_obj_t)&pin_PA06 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA07), (mp_obj_t)&pin_PA07 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA18), (mp_obj_t)&pin_PA18 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA16), (mp_obj_t)&pin_PA16 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA19), (mp_obj_t)&pin_PA19 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA17), (mp_obj_t)&pin_PA17 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA22), (mp_obj_t)&pin_PA22 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA23), (mp_obj_t)&pin_PA23 },
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(pin_cpu_pins_locals_dict, pin_cpu_pins_locals_dict_table);
|
||||
#include "boards/samd21_pins.h"
|
||||
|
||||
STATIC const mp_map_elem_t pin_board_pins_locals_dict_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A0), (mp_obj_t)&pin_PA02 },
|
||||
|
|
|
@ -1,28 +0,0 @@
|
|||
|
||||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_ARDUINO_ZERO_PINS_H__
|
||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_ARDUINO_ZERO_PINS_H__
|
||||
|
||||
#include "modmachine_pin.h"
|
||||
|
||||
extern const pin_obj_t pin_PA02;
|
||||
extern const pin_obj_t pin_PB08;
|
||||
extern const pin_obj_t pin_PB09;
|
||||
extern const pin_obj_t pin_PA04;
|
||||
extern const pin_obj_t pin_PA05;
|
||||
extern const pin_obj_t pin_PB02;
|
||||
extern const pin_obj_t pin_PB11;
|
||||
extern const pin_obj_t pin_PB10;
|
||||
extern const pin_obj_t pin_PB21;
|
||||
extern const pin_obj_t pin_PA11;
|
||||
extern const pin_obj_t pin_PA10;
|
||||
extern const pin_obj_t pin_PA22;
|
||||
extern const pin_obj_t pin_PA23;
|
||||
extern const pin_obj_t pin_PA15;
|
||||
extern const pin_obj_t pin_PA20;
|
||||
extern const pin_obj_t pin_PA07;
|
||||
extern const pin_obj_t pin_PA18;
|
||||
extern const pin_obj_t pin_PA16;
|
||||
extern const pin_obj_t pin_PA19;
|
||||
extern const pin_obj_t pin_PA17;
|
||||
|
||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_ARDUINO_ZERO_PINS_H__
|
|
@ -1,133 +1,4 @@
|
|||
#include "pins.h"
|
||||
#include "asf/sam0/drivers/system/system.h"
|
||||
|
||||
PIN(PA02, true, ADC_POSITIVE_INPUT_PIN0, NO_TIMER, NO_TIMER, NO_SERCOM, \
|
||||
NO_SERCOM);
|
||||
PIN(PB08, true, ADC_POSITIVE_INPUT_PIN2,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PB08E_TC4_WO0, MUX_PB08E_TC4_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM4, 0, PINMUX_PB08D_SERCOM4_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PB09, true, ADC_POSITIVE_INPUT_PIN3,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PB09E_TC4_WO1, MUX_PB09E_TC4_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM4, 1, PINMUX_PB09D_SERCOM4_PAD1),
|
||||
NO_SERCOM);
|
||||
PIN(PA04, true, ADC_POSITIVE_INPUT_PIN4,
|
||||
TIMER(0, TCC0, 0, 0, PIN_PA04E_TCC0_WO0, MUX_PA04E_TCC0_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 0, PINMUX_PA04D_SERCOM0_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PA05, true, ADC_POSITIVE_INPUT_PIN5,
|
||||
TIMER(0, TCC0, 1, 1, PIN_PA05E_TCC0_WO1, MUX_PA05E_TCC0_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 1, PINMUX_PA05D_SERCOM0_PAD1),
|
||||
NO_SERCOM);
|
||||
PIN(PA08, false, NO_ADC_INPUT,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
PIN(PB02, true, ADC_POSITIVE_INPUT_PIN10,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 0, PINMUX_PB02D_SERCOM5_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PB11, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 1, 1, PIN_PB11E_TC5_WO1, MUX_PB11E_TC5_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PB11F_TCC0_WO5, MUX_PB11F_TCC0_WO5),
|
||||
SERCOM(SERCOM4, 3, PINMUX_PB11D_SERCOM4_PAD3),
|
||||
NO_SERCOM);
|
||||
PIN(PB10, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 0, 0, PIN_PB10E_TC5_WO0, MUX_PB10E_TC5_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PB10F_TCC0_WO4, MUX_PB10F_TCC0_WO4),
|
||||
SERCOM(SERCOM4, 2, PINMUX_PB10D_SERCOM4_PAD2),
|
||||
NO_SERCOM);
|
||||
PIN(PA12, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA12E_TCC2_WO0, MUX_PA12E_TCC2_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA12F_TCC0_WO6, MUX_PA12F_TCC0_WO6),
|
||||
SERCOM(SERCOM2, 0, PINMUX_PA12C_SERCOM2_PAD0),
|
||||
SERCOM(SERCOM4, 0, PINMUX_PA12D_SERCOM4_PAD0));
|
||||
PIN(PA11, true, ADC_POSITIVE_INPUT_PIN19,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA11E_TCC1_WO1, MUX_PA11E_TCC1_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA11F_TCC0_WO3, MUX_PA11F_TCC0_WO3),
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA11C_SERCOM0_PAD3),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA11D_SERCOM2_PAD3));
|
||||
PIN(PA10, true, ADC_POSITIVE_INPUT_PIN18,
|
||||
TIMER(0, TCC1, 0, 0, PIN_PA10E_TCC1_WO0, MUX_PA10E_TCC1_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA10F_TCC0_WO2, MUX_PA10F_TCC0_WO2),
|
||||
SERCOM(SERCOM0, 2, PINMUX_PA10C_SERCOM0_PAD2),
|
||||
SERCOM(SERCOM2, 2, PINMUX_PA10D_SERCOM2_PAD2));
|
||||
PIN(PA22, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PA22E_TC4_WO0, MUX_PA22E_TC4_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PA22F_TCC0_WO4, MUX_PA22F_TCC0_WO4),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA22C_SERCOM3_PAD0),
|
||||
SERCOM(SERCOM5, 0, PINMUX_PA22D_SERCOM5_PAD0));
|
||||
PIN(PA23, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PA23E_TC4_WO1, MUX_PA23E_TC4_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA23F_TCC0_WO5, MUX_PA23F_TCC0_WO5),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA23C_SERCOM3_PAD1),
|
||||
SERCOM(SERCOM5, 1, PINMUX_PA23C_SERCOM3_PAD1));
|
||||
PIN(PA15, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA15E_TC3_WO1, MUX_PA15E_TC3_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA15F_TCC0_WO5, MUX_PA15F_TCC0_WO5),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA15C_SERCOM2_PAD3),
|
||||
SERCOM(SERCOM4, 3, PINMUX_PA15D_SERCOM4_PAD3));
|
||||
PIN(PA20, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA20F_TCC0_WO6, MUX_PA20F_TCC0_WO6),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 2, PINMUX_PA20C_SERCOM5_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA20D_SERCOM3_PAD2));
|
||||
PIN(PA07, true, ADC_POSITIVE_INPUT_PIN7,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA07E_TCC1_WO1, MUX_PA07E_TCC1_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA07D_SERCOM0_PAD3),
|
||||
NO_SERCOM);
|
||||
PIN(PA18, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 0, 0, PIN_PA18E_TC3_WO0, MUX_PA18E_TC3_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA18F_TCC0_WO2, MUX_PA18F_TCC0_WO2),
|
||||
SERCOM(SERCOM1, 2, PINMUX_PA18C_SERCOM1_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA18D_SERCOM3_PAD2));
|
||||
PIN(PA16, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA16E_TCC2_WO0, MUX_PA16E_TCC2_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA16F_TCC0_WO6, MUX_PA16F_TCC0_WO6),
|
||||
SERCOM(SERCOM1, 0, PINMUX_PA16C_SERCOM1_PAD0),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA16D_SERCOM3_PAD0));
|
||||
PIN(PA19, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA19E_TC3_WO1, MUX_PA19E_TC3_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA19F_TCC0_WO3, MUX_PA19F_TCC0_WO3),
|
||||
SERCOM(SERCOM1, 3, PINMUX_PA19C_SERCOM1_PAD3),
|
||||
SERCOM(SERCOM3, 3, PINMUX_PA19C_SERCOM1_PAD3));
|
||||
PIN(PA17, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 1, 1, PIN_PA17E_TCC2_WO1, MUX_PA17E_TCC2_WO1),
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA17F_TCC0_WO7, MUX_PA17F_TCC0_WO7),
|
||||
SERCOM(SERCOM1, 1, PINMUX_PA17C_SERCOM1_PAD1),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA17D_SERCOM3_PAD1));
|
||||
|
||||
STATIC const mp_map_elem_t pin_cpu_pins_locals_dict_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA02), (mp_obj_t)&pin_PA02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB08), (mp_obj_t)&pin_PB08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB09), (mp_obj_t)&pin_PB09 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA04), (mp_obj_t)&pin_PA04 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA05), (mp_obj_t)&pin_PA05 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA05), (mp_obj_t)&pin_PA08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB02), (mp_obj_t)&pin_PB02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB11), (mp_obj_t)&pin_PB11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB10), (mp_obj_t)&pin_PB10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA12), (mp_obj_t)&pin_PA12 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA11), (mp_obj_t)&pin_PA11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA10), (mp_obj_t)&pin_PA10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA22), (mp_obj_t)&pin_PA22 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA23), (mp_obj_t)&pin_PA23 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA15), (mp_obj_t)&pin_PA15 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA20), (mp_obj_t)&pin_PA20 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA07), (mp_obj_t)&pin_PA07 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA18), (mp_obj_t)&pin_PA18 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA16), (mp_obj_t)&pin_PA16 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA19), (mp_obj_t)&pin_PA19 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA17), (mp_obj_t)&pin_PA17 },
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(pin_cpu_pins_locals_dict, pin_cpu_pins_locals_dict_table);
|
||||
#include "boards/samd21_pins.h"
|
||||
|
||||
STATIC const mp_map_elem_t pin_board_pins_locals_dict_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A0), (mp_obj_t)&pin_PA02 },
|
||||
|
|
|
@ -1,28 +0,0 @@
|
|||
|
||||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_ADALOGGER_PINS_H__
|
||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_ADALOGGER_PINS_H__
|
||||
|
||||
#include "modmachine_pin.h"
|
||||
|
||||
extern const pin_obj_t pin_PA02;
|
||||
extern const pin_obj_t pin_PB08;
|
||||
extern const pin_obj_t pin_PB09;
|
||||
extern const pin_obj_t pin_PA04;
|
||||
extern const pin_obj_t pin_PA05;
|
||||
extern const pin_obj_t pin_PB02;
|
||||
extern const pin_obj_t pin_PB11;
|
||||
extern const pin_obj_t pin_PB10;
|
||||
extern const pin_obj_t pin_PB21;
|
||||
extern const pin_obj_t pin_PA11;
|
||||
extern const pin_obj_t pin_PA10;
|
||||
extern const pin_obj_t pin_PA22;
|
||||
extern const pin_obj_t pin_PA23;
|
||||
extern const pin_obj_t pin_PA15;
|
||||
extern const pin_obj_t pin_PA20;
|
||||
extern const pin_obj_t pin_PA07;
|
||||
extern const pin_obj_t pin_PA18;
|
||||
extern const pin_obj_t pin_PA16;
|
||||
extern const pin_obj_t pin_PA19;
|
||||
extern const pin_obj_t pin_PA17;
|
||||
|
||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_BASIC_PINS_H__
|
|
@ -1,127 +1,4 @@
|
|||
#include "pins.h"
|
||||
#include "asf/sam0/drivers/system/system.h"
|
||||
|
||||
PIN(PA02, true, ADC_POSITIVE_INPUT_PIN0, NO_TIMER, NO_TIMER, NO_SERCOM, \
|
||||
NO_SERCOM);
|
||||
PIN(PB08, true, ADC_POSITIVE_INPUT_PIN2,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PB08E_TC4_WO0, MUX_PB08E_TC4_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM4, 0, PINMUX_PB08D_SERCOM4_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PB09, true, ADC_POSITIVE_INPUT_PIN3,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PB09E_TC4_WO1, MUX_PB09E_TC4_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM4, 1, PINMUX_PB09D_SERCOM4_PAD1),
|
||||
NO_SERCOM);
|
||||
PIN(PA04, true, ADC_POSITIVE_INPUT_PIN4,
|
||||
TIMER(0, TCC0, 0, 0, PIN_PA04E_TCC0_WO0, MUX_PA04E_TCC0_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 0, PINMUX_PA04D_SERCOM0_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PA05, true, ADC_POSITIVE_INPUT_PIN5,
|
||||
TIMER(0, TCC0, 1, 1, PIN_PA05E_TCC0_WO1, MUX_PA05E_TCC0_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 1, PINMUX_PA05D_SERCOM0_PAD1),
|
||||
NO_SERCOM);
|
||||
PIN(PB02, true, ADC_POSITIVE_INPUT_PIN10,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 0, PINMUX_PB02D_SERCOM5_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PB11, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 1, 1, PIN_PB11E_TC5_WO1, MUX_PB11E_TC5_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PB11F_TCC0_WO5, MUX_PB11F_TCC0_WO5),
|
||||
SERCOM(SERCOM4, 3, PINMUX_PB11D_SERCOM4_PAD3),
|
||||
NO_SERCOM);
|
||||
PIN(PB10, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 0, 0, PIN_PB10E_TC5_WO0, MUX_PB10E_TC5_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PB10F_TCC0_WO4, MUX_PB10F_TCC0_WO4),
|
||||
SERCOM(SERCOM4, 2, PINMUX_PB10D_SERCOM4_PAD2),
|
||||
NO_SERCOM);
|
||||
PIN(PA12, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA12E_TCC2_WO0, MUX_PA12E_TCC2_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA12F_TCC0_WO6, MUX_PA12F_TCC0_WO6),
|
||||
SERCOM(SERCOM2, 0, PINMUX_PA12C_SERCOM2_PAD0),
|
||||
SERCOM(SERCOM4, 0, PINMUX_PA12D_SERCOM4_PAD0));
|
||||
PIN(PA11, true, ADC_POSITIVE_INPUT_PIN19,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA11E_TCC1_WO1, MUX_PA11E_TCC1_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA11F_TCC0_WO3, MUX_PA11F_TCC0_WO3),
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA11C_SERCOM0_PAD3),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA11D_SERCOM2_PAD3));
|
||||
PIN(PA10, true, ADC_POSITIVE_INPUT_PIN18,
|
||||
TIMER(0, TCC1, 0, 0, PIN_PA10E_TCC1_WO0, MUX_PA10E_TCC1_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA10F_TCC0_WO2, MUX_PA10F_TCC0_WO2),
|
||||
SERCOM(SERCOM0, 2, PINMUX_PA10C_SERCOM0_PAD2),
|
||||
SERCOM(SERCOM2, 2, PINMUX_PA10D_SERCOM2_PAD2));
|
||||
PIN(PA22, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PA22E_TC4_WO0, MUX_PA22E_TC4_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PA22F_TCC0_WO4, MUX_PA22F_TCC0_WO4),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA22C_SERCOM3_PAD0),
|
||||
SERCOM(SERCOM5, 0, PINMUX_PA22D_SERCOM5_PAD0));
|
||||
PIN(PA23, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PA23E_TC4_WO1, MUX_PA23E_TC4_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA23F_TCC0_WO5, MUX_PA23F_TCC0_WO5),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA23C_SERCOM3_PAD1),
|
||||
SERCOM(SERCOM5, 1, PINMUX_PA23C_SERCOM3_PAD1));
|
||||
PIN(PA15, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA15E_TC3_WO1, MUX_PA15E_TC3_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA15F_TCC0_WO5, MUX_PA15F_TCC0_WO5),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA15C_SERCOM2_PAD3),
|
||||
SERCOM(SERCOM4, 3, PINMUX_PA15D_SERCOM4_PAD3));
|
||||
PIN(PA20, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA20F_TCC0_WO6, MUX_PA20F_TCC0_WO6),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 2, PINMUX_PA20C_SERCOM5_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA20D_SERCOM3_PAD2));
|
||||
PIN(PA07, true, ADC_POSITIVE_INPUT_PIN7,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA07E_TCC1_WO1, MUX_PA07E_TCC1_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA07D_SERCOM0_PAD3),
|
||||
NO_SERCOM);
|
||||
PIN(PA18, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 0, 0, PIN_PA18E_TC3_WO0, MUX_PA18E_TC3_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA18F_TCC0_WO2, MUX_PA18F_TCC0_WO2),
|
||||
SERCOM(SERCOM1, 2, PINMUX_PA18C_SERCOM1_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA18D_SERCOM3_PAD2));
|
||||
PIN(PA16, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA16E_TCC2_WO0, MUX_PA16E_TCC2_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA16F_TCC0_WO6, MUX_PA16F_TCC0_WO6),
|
||||
SERCOM(SERCOM1, 0, PINMUX_PA16C_SERCOM1_PAD0),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA16D_SERCOM3_PAD0));
|
||||
PIN(PA19, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA19E_TC3_WO1, MUX_PA19E_TC3_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA19F_TCC0_WO3, MUX_PA19F_TCC0_WO3),
|
||||
SERCOM(SERCOM1, 3, PINMUX_PA19C_SERCOM1_PAD3),
|
||||
SERCOM(SERCOM3, 3, PINMUX_PA19C_SERCOM1_PAD3));
|
||||
PIN(PA17, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 1, 1, PIN_PA17E_TCC2_WO1, MUX_PA17E_TCC2_WO1),
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA17F_TCC0_WO7, MUX_PA17F_TCC0_WO7),
|
||||
SERCOM(SERCOM1, 1, PINMUX_PA17C_SERCOM1_PAD1),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA17D_SERCOM3_PAD1));
|
||||
|
||||
STATIC const mp_map_elem_t pin_cpu_pins_locals_dict_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA02), (mp_obj_t)&pin_PA02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB08), (mp_obj_t)&pin_PB08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB09), (mp_obj_t)&pin_PB09 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA04), (mp_obj_t)&pin_PA04 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA05), (mp_obj_t)&pin_PA05 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB02), (mp_obj_t)&pin_PB02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB11), (mp_obj_t)&pin_PB11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB10), (mp_obj_t)&pin_PB10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA12), (mp_obj_t)&pin_PA12 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA11), (mp_obj_t)&pin_PA11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA10), (mp_obj_t)&pin_PA10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA22), (mp_obj_t)&pin_PA22 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA23), (mp_obj_t)&pin_PA23 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA15), (mp_obj_t)&pin_PA15 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA20), (mp_obj_t)&pin_PA20 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA07), (mp_obj_t)&pin_PA07 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA18), (mp_obj_t)&pin_PA18 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA16), (mp_obj_t)&pin_PA16 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA19), (mp_obj_t)&pin_PA19 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA17), (mp_obj_t)&pin_PA17 },
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(pin_cpu_pins_locals_dict, pin_cpu_pins_locals_dict_table);
|
||||
#include "boards/samd21_pins.h"
|
||||
|
||||
STATIC const mp_map_elem_t pin_board_pins_locals_dict_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A0), (mp_obj_t)&pin_PA02 },
|
||||
|
|
|
@ -1,28 +0,0 @@
|
|||
|
||||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_BASIC_PINS_H__
|
||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_BASIC_PINS_H__
|
||||
|
||||
#include "modmachine_pin.h"
|
||||
|
||||
extern const pin_obj_t pin_PA02;
|
||||
extern const pin_obj_t pin_PB08;
|
||||
extern const pin_obj_t pin_PB09;
|
||||
extern const pin_obj_t pin_PA04;
|
||||
extern const pin_obj_t pin_PA05;
|
||||
extern const pin_obj_t pin_PB02;
|
||||
extern const pin_obj_t pin_PB11;
|
||||
extern const pin_obj_t pin_PB10;
|
||||
extern const pin_obj_t pin_PB21;
|
||||
extern const pin_obj_t pin_PA11;
|
||||
extern const pin_obj_t pin_PA10;
|
||||
extern const pin_obj_t pin_PA22;
|
||||
extern const pin_obj_t pin_PA23;
|
||||
extern const pin_obj_t pin_PA15;
|
||||
extern const pin_obj_t pin_PA20;
|
||||
extern const pin_obj_t pin_PA07;
|
||||
extern const pin_obj_t pin_PA18;
|
||||
extern const pin_obj_t pin_PA16;
|
||||
extern const pin_obj_t pin_PA19;
|
||||
extern const pin_obj_t pin_PA17;
|
||||
|
||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_BASIC_PINS_H__
|
|
@ -1,163 +1,4 @@
|
|||
#include "pins.h"
|
||||
#include "asf/sam0/drivers/system/system.h"
|
||||
|
||||
PIN(PA02, true, ADC_POSITIVE_INPUT_PIN0, NO_TIMER, NO_TIMER, NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
PIN(PB08, true, ADC_POSITIVE_INPUT_PIN2,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PB08E_TC4_WO0, MUX_PB08E_TC4_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM4, 0, PINMUX_PB08D_SERCOM4_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PB09, true, ADC_POSITIVE_INPUT_PIN3,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PB09E_TC4_WO1, MUX_PB09E_TC4_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM4, 1, PINMUX_PB09D_SERCOM4_PAD1),
|
||||
NO_SERCOM);
|
||||
PIN(PA04, true, ADC_POSITIVE_INPUT_PIN4,
|
||||
TIMER(0, TCC0, 0, 0, PIN_PA04E_TCC0_WO0, MUX_PA04E_TCC0_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 0, PINMUX_PA04D_SERCOM0_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PA05, true, ADC_POSITIVE_INPUT_PIN5,
|
||||
TIMER(0, TCC0, 1, 1, PIN_PA05E_TCC0_WO1, MUX_PA05E_TCC0_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 1, PINMUX_PA05D_SERCOM0_PAD1),
|
||||
NO_SERCOM);
|
||||
PIN(PB02, true, ADC_POSITIVE_INPUT_PIN10,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 0, PINMUX_PB02D_SERCOM5_PAD0),
|
||||
NO_SERCOM);
|
||||
PIN(PA11, true, ADC_POSITIVE_INPUT_PIN19,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA11E_TCC1_WO1, MUX_PA11E_TCC1_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA11F_TCC0_WO3, MUX_PA11F_TCC0_WO3),
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA11C_SERCOM0_PAD3),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA11D_SERCOM2_PAD3));
|
||||
PIN(PA10, true, ADC_POSITIVE_INPUT_PIN18,
|
||||
TIMER(0, TCC1, 0, 0, PIN_PA10E_TCC1_WO0, MUX_PA10E_TCC1_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA10F_TCC0_WO2, MUX_PA10F_TCC0_WO2),
|
||||
SERCOM(SERCOM0, 2, PINMUX_PA10C_SERCOM0_PAD2),
|
||||
SERCOM(SERCOM2, 2, PINMUX_PA10D_SERCOM2_PAD2));
|
||||
PIN(PA14, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 0, 0, PIN_PA14E_TC3_WO0, MUX_PA14E_TC3_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PA14F_TCC0_WO4, MUX_PA14F_TCC0_WO4),
|
||||
SERCOM(SERCOM2, 2, PINMUX_PA14C_SERCOM2_PAD2),
|
||||
SERCOM(SERCOM4, 2, PINMUX_PA14D_SERCOM4_PAD2));
|
||||
PIN(PA09, true, ADC_POSITIVE_INPUT_PIN17,
|
||||
TIMER(0, TCC0, 1, 1, PIN_PA09E_TCC0_WO1, MUX_PA09E_TCC0_WO1),
|
||||
TIMER(0, TCC1, 3, 3, PIN_PA09F_TCC1_WO3, MUX_PA09F_TCC1_WO3),
|
||||
SERCOM(SERCOM0, 1, PINMUX_PA09C_SERCOM0_PAD1),
|
||||
SERCOM(SERCOM2, 1, PINMUX_PA09D_SERCOM2_PAD1));
|
||||
PIN(PA08, true, ADC_POSITIVE_INPUT_PIN16,
|
||||
TIMER(0, TCC0, 0, 0, PIN_PA08E_TCC0_WO0, MUX_PA08E_TCC0_WO0),
|
||||
TIMER(0, TCC1, 2, 2, PIN_PA08F_TCC1_WO2, MUX_PA08F_TCC1_WO2),
|
||||
SERCOM(SERCOM0, 0, PINMUX_PA08C_SERCOM0_PAD0),
|
||||
SERCOM(SERCOM2, 0, PINMUX_PA08D_SERCOM2_PAD0));
|
||||
PIN(PA15, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA15E_TC3_WO1, MUX_PA15E_TC3_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA15F_TCC0_WO5, MUX_PA15F_TCC0_WO5),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA15C_SERCOM2_PAD3),
|
||||
SERCOM(SERCOM4, 3, PINMUX_PA15D_SERCOM4_PAD3));
|
||||
PIN(PA20, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA20F_TCC0_WO6, MUX_PA20F_TCC0_WO6),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 2, PINMUX_PA20C_SERCOM5_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA20D_SERCOM3_PAD2));
|
||||
PIN(PA21, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA21F_TCC0_WO7, MUX_PA21F_TCC0_WO7),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM5, 3, PINMUX_PA21C_SERCOM5_PAD3),
|
||||
SERCOM(SERCOM3, 3, PINMUX_PA21D_SERCOM3_PAD3));
|
||||
PIN(PA06, true, ADC_POSITIVE_INPUT_PIN6,
|
||||
TIMER(0, TCC1, 0, 0, PIN_PA06E_TCC1_WO0, MUX_PA06E_TCC1_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 2, PINMUX_PA06D_SERCOM0_PAD2),
|
||||
NO_SERCOM);
|
||||
PIN(PA07, true, ADC_POSITIVE_INPUT_PIN7,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA07E_TCC1_WO1, MUX_PA07E_TCC1_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA07D_SERCOM0_PAD3),
|
||||
NO_SERCOM);
|
||||
PIN(PA18, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 0, 0, PIN_PA18E_TC3_WO0, MUX_PA18E_TC3_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA18F_TCC0_WO2, MUX_PA18F_TCC0_WO2),
|
||||
SERCOM(SERCOM1, 2, PINMUX_PA18C_SERCOM1_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA18D_SERCOM3_PAD2));
|
||||
PIN(PA16, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA16E_TCC2_WO0, MUX_PA16E_TCC2_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA16F_TCC0_WO6, MUX_PA16F_TCC0_WO6),
|
||||
SERCOM(SERCOM1, 0, PINMUX_PA16C_SERCOM1_PAD0),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA16D_SERCOM3_PAD0));
|
||||
PIN(PA19, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA19E_TC3_WO1, MUX_PA19E_TC3_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA19F_TCC0_WO3, MUX_PA19F_TCC0_WO3),
|
||||
SERCOM(SERCOM1, 3, PINMUX_PA19C_SERCOM1_PAD3),
|
||||
SERCOM(SERCOM3, 3, PINMUX_PA19D_SERCOM3_PAD3));
|
||||
PIN(PA17, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 1, 1, PIN_PA17E_TCC2_WO1, MUX_PA17E_TCC2_WO1),
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA17F_TCC0_WO7, MUX_PA17F_TCC0_WO7),
|
||||
SERCOM(SERCOM1, 1, PINMUX_PA17C_SERCOM1_PAD1),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA17D_SERCOM3_PAD1));
|
||||
PIN(PA22, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PA22E_TC4_WO0, MUX_PA22E_TC4_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PA22F_TCC0_WO4, MUX_PA22F_TCC0_WO4),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA22C_SERCOM3_PAD0),
|
||||
SERCOM(SERCOM5, 0, PINMUX_PA22D_SERCOM5_PAD0));
|
||||
PIN(PA23, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PA23E_TC4_WO1, MUX_PA23E_TC4_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA23F_TCC0_WO5, MUX_PA23F_TCC0_WO5),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA23C_SERCOM3_PAD1),
|
||||
SERCOM(SERCOM5, 1, PINMUX_PA23C_SERCOM3_PAD1));
|
||||
PIN(PB11, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 1, 1, PIN_PB11E_TC5_WO1, MUX_PB11E_TC5_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PB11F_TCC0_WO5, MUX_PB11F_TCC0_WO5),
|
||||
SERCOM(SERCOM4, 3, PINMUX_PB11D_SERCOM4_PAD3),
|
||||
NO_SERCOM);
|
||||
PIN(PB10, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 0, 0, PIN_PA23E_TC4_WO1, MUX_PA23E_TC4_WO1),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PA23F_TCC0_WO5, MUX_PA23F_TCC0_WO5),
|
||||
SERCOM(SERCOM4, 2, PINMUX_PB10D_SERCOM4_PAD2),
|
||||
NO_SERCOM);
|
||||
PIN(PA12, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA12E_TCC2_WO0, MUX_PA12E_TCC2_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA12F_TCC0_WO6, MUX_PA12F_TCC0_WO6),
|
||||
SERCOM(SERCOM4, 0, PINMUX_PA12D_SERCOM4_PAD0),
|
||||
SERCOM(SERCOM2, 0, PINMUX_PA12C_SERCOM2_PAD0));
|
||||
PIN(PA13, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 1, 1, PIN_PA13E_TCC2_WO1, MUX_PA13E_TCC2_WO1),
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA13F_TCC0_WO7, MUX_PA13F_TCC0_WO7),
|
||||
SERCOM(SERCOM4, 1, PINMUX_PA13D_SERCOM4_PAD1),
|
||||
SERCOM(SERCOM2, 1, PINMUX_PA13C_SERCOM2_PAD1));
|
||||
|
||||
STATIC const mp_map_elem_t pin_cpu_pins_locals_dict_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA02), (mp_obj_t)&pin_PA02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB08), (mp_obj_t)&pin_PB08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB09), (mp_obj_t)&pin_PB09 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA04), (mp_obj_t)&pin_PA04 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA05), (mp_obj_t)&pin_PA05 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB02), (mp_obj_t)&pin_PB02 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA11), (mp_obj_t)&pin_PA11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA10), (mp_obj_t)&pin_PA10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA14), (mp_obj_t)&pin_PA14 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA09), (mp_obj_t)&pin_PA09 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA08), (mp_obj_t)&pin_PA08 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA15), (mp_obj_t)&pin_PA15 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA20), (mp_obj_t)&pin_PA20 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA21), (mp_obj_t)&pin_PA21 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA06), (mp_obj_t)&pin_PA06 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA07), (mp_obj_t)&pin_PA07 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA18), (mp_obj_t)&pin_PA18 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA16), (mp_obj_t)&pin_PA16 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA19), (mp_obj_t)&pin_PA19 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA17), (mp_obj_t)&pin_PA17 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA22), (mp_obj_t)&pin_PA22 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA23), (mp_obj_t)&pin_PA23 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB11), (mp_obj_t)&pin_PB11 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB10), (mp_obj_t)&pin_PB10 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA12), (mp_obj_t)&pin_PA12 },
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA13), (mp_obj_t)&pin_PA13 },
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(pin_cpu_pins_locals_dict, pin_cpu_pins_locals_dict_table);
|
||||
#include "boards/samd21_pins.h"
|
||||
|
||||
STATIC const mp_map_elem_t pin_board_pins_locals_dict_table[] = {
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_A0), (mp_obj_t)&pin_PA02 },
|
||||
|
|
|
@ -1,32 +0,0 @@
|
|||
|
||||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_BLE_PINS_H__
|
||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_BLE_PINS_H__
|
||||
|
||||
#include "modmachine_pin.h"
|
||||
|
||||
extern const pin_obj_t pin_PA02;
|
||||
extern const pin_obj_t pin_PB08;
|
||||
extern const pin_obj_t pin_PB09;
|
||||
extern const pin_obj_t pin_PA04;
|
||||
extern const pin_obj_t pin_PA05;
|
||||
extern const pin_obj_t pin_PB02;
|
||||
extern const pin_obj_t pin_PB11;
|
||||
extern const pin_obj_t pin_PB10;
|
||||
extern const pin_obj_t pin_PB21;
|
||||
extern const pin_obj_t pin_PA11;
|
||||
extern const pin_obj_t pin_PA10;
|
||||
extern const pin_obj_t pin_PA22;
|
||||
extern const pin_obj_t pin_PA23;
|
||||
extern const pin_obj_t pin_PA15;
|
||||
extern const pin_obj_t pin_PA20;
|
||||
extern const pin_obj_t pin_PA07;
|
||||
extern const pin_obj_t pin_PA18;
|
||||
extern const pin_obj_t pin_PA16;
|
||||
extern const pin_obj_t pin_PA19;
|
||||
extern const pin_obj_t pin_PA17;
|
||||
extern const pin_obj_t pin_PB11;
|
||||
extern const pin_obj_t pin_PB10;
|
||||
extern const pin_obj_t pin_PA12;
|
||||
extern const pin_obj_t pin_PA13;
|
||||
|
||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_FEATHER_M0_BLE_PINS_H__
|
|
@ -0,0 +1,572 @@
|
|||
#include "boards/samd21_pins.h"
|
||||
|
||||
// Pins in datasheet order.
|
||||
#ifdef PIN_PA00
|
||||
PIN(PA00, false, NO_ADC_INPUT, \
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA00E_TCC2_WO0, MUX_PA00E_TCC2_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM1, 0, PINMUX_PA00D_SERCOM1_PAD0),
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PA01
|
||||
PIN(PA01, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 1, 1, PIN_PA01E_TCC2_WO1, MUX_PA01E_TCC2_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM1, 1, PINMUX_PA01D_SERCOM1_PAD1),
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PA02
|
||||
PIN(PA02, true, ADC_POSITIVE_INPUT_PIN0,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PA03
|
||||
PIN(PA03, true, ADC_POSITIVE_INPUT_PIN1,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PB04
|
||||
PIN(PB04, true, ADC_POSITIVE_INPUT_PIN12,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PB05
|
||||
PIN(PB05, true, ADC_POSITIVE_INPUT_PIN13,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PB06
|
||||
PIN(PB06, true, ADC_POSITIVE_INPUT_PIN14,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PB07
|
||||
PIN(PB07, true, ADC_POSITIVE_INPUT_PIN15,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PB08
|
||||
PIN(PB08, true, ADC_POSITIVE_INPUT_PIN2,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PB08E_TC4_WO0, MUX_PB08E_TC4_WO0),
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM4, 0, PINMUX_PB08D_SERCOM4_PAD0));
|
||||
#endif
|
||||
#ifdef PIN_PB09
|
||||
PIN(PB09, true, ADC_POSITIVE_INPUT_PIN3,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PB09E_TC4_WO1, MUX_PB09E_TC4_WO1),
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM4, 1, PINMUX_PB09D_SERCOM4_PAD1));
|
||||
#endif
|
||||
#ifdef PIN_PA04
|
||||
PIN(PA04, true, ADC_POSITIVE_INPUT_PIN4,
|
||||
TIMER(0, TCC0, 0, 0, PIN_PA04E_TCC0_WO0, MUX_PA04E_TCC0_WO0),
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM0, 0, PINMUX_PA04D_SERCOM0_PAD0));
|
||||
#endif
|
||||
#ifdef PIN_PA05
|
||||
PIN(PA05, true, ADC_POSITIVE_INPUT_PIN5,
|
||||
TIMER(0, TCC0, 1, 1, PIN_PA05E_TCC0_WO1, MUX_PA05E_TCC0_WO1),
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM0, 1, PINMUX_PA05D_SERCOM0_PAD1));
|
||||
#endif
|
||||
#ifdef PIN_PA06
|
||||
PIN(PA06, true, ADC_POSITIVE_INPUT_PIN6,
|
||||
TIMER(0, TCC1, 0, 0, PIN_PA06E_TCC1_WO0, MUX_PA06E_TCC1_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 2, PINMUX_PA06D_SERCOM0_PAD2),
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PA07
|
||||
PIN(PA07, true, ADC_POSITIVE_INPUT_PIN7,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA07E_TCC1_WO1, MUX_PA07E_TCC1_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA07D_SERCOM0_PAD3),
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PA08
|
||||
PIN(PA08, true, ADC_POSITIVE_INPUT_PIN17,
|
||||
TIMER(0, TCC0, 0, 0, PIN_PA08E_TCC0_WO0, MUX_PA08E_TCC0_WO0),
|
||||
TIMER(0, TCC1, 2, 2, PIN_PA08F_TCC1_WO2, MUX_PA08F_TCC1_WO2),
|
||||
SERCOM(SERCOM0, 0, PINMUX_PA08C_SERCOM0_PAD0),
|
||||
SERCOM(SERCOM2, 0, PINMUX_PA08D_SERCOM2_PAD0));
|
||||
#endif
|
||||
#ifdef PIN_PA09
|
||||
PIN(PA09, true, ADC_POSITIVE_INPUT_PIN17,
|
||||
TIMER(0, TCC0, 1, 1, PIN_PA09E_TCC0_WO1, MUX_PA09E_TCC0_WO1),
|
||||
TIMER(0, TCC1, 3, 3, PIN_PA09F_TCC1_WO3, MUX_PA09F_TCC1_WO3),
|
||||
SERCOM(SERCOM0, 1, PINMUX_PA09C_SERCOM0_PAD1),
|
||||
SERCOM(SERCOM2, 1, PINMUX_PA09D_SERCOM2_PAD1));
|
||||
#endif
|
||||
#ifdef PIN_PA10
|
||||
PIN(PA10, true, ADC_POSITIVE_INPUT_PIN18,
|
||||
TIMER(0, TCC1, 0, 0, PIN_PA10E_TCC1_WO0, MUX_PA10E_TCC1_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA10F_TCC0_WO2, MUX_PA10F_TCC0_WO2),
|
||||
SERCOM(SERCOM0, 2, PINMUX_PA10C_SERCOM0_PAD2),
|
||||
SERCOM(SERCOM2, 2, PINMUX_PA10D_SERCOM2_PAD2));
|
||||
#endif
|
||||
#ifdef PIN_PA11
|
||||
PIN(PA11, true, ADC_POSITIVE_INPUT_PIN19,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA11E_TCC1_WO1, MUX_PA11E_TCC1_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA11F_TCC0_WO3, MUX_PA11F_TCC0_WO3),
|
||||
SERCOM(SERCOM0, 3, PINMUX_PA11C_SERCOM0_PAD3),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA11D_SERCOM2_PAD3));
|
||||
#endif
|
||||
#ifdef PIN_PB10
|
||||
PIN(PB10, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 0, 0, PIN_PB10E_TC5_WO0, MUX_PB10E_TC5_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PB10F_TCC0_WO4, MUX_PB10F_TCC0_WO4),
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM4, 2, PINMUX_PB10D_SERCOM4_PAD2));
|
||||
#endif
|
||||
#ifdef PIN_PB11
|
||||
PIN(PB11, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 1, 1, PIN_PB11E_TC5_WO1, MUX_PB11E_TC5_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PB11F_TCC0_WO5, MUX_PB11F_TCC0_WO5),
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM4, 3, PINMUX_PB11D_SERCOM4_PAD3));
|
||||
#endif
|
||||
#ifdef PIN_PB12
|
||||
PIN(PB12, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PB12E_TC4_WO0, MUX_PB12E_TC4_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PB12F_TCC0_WO6, MUX_PB12F_TCC0_WO6),
|
||||
SERCOM(SERCOM4, 0, PINMUX_PB12C_SERCOM4_PAD0),
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PB13
|
||||
PIN(PB13, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PB13E_TC4_WO1, MUX_PB13E_TC4_WO1),
|
||||
TIMER(0, TCC0, 3, 7, PIN_PB13F_TCC0_WO7, MUX_PB13F_TCC0_WO7),
|
||||
SERCOM(SERCOM4, 1, PINMUX_PB13C_SERCOM4_PAD1),
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PB14
|
||||
PIN(PB14, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 0, 0, PIN_PB14E_TC5_WO0, MUX_PB14E_TC5_WO0),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM4, 2, PINMUX_PB14C_SERCOM4_PAD2),
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
|
||||
// Second page.
|
||||
#ifdef PIN_PB15
|
||||
PIN(PB15, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 1, 1, PIN_PB15E_TC5_WO1, MUX_PB15E_TC5_WO1),
|
||||
NO_TIMER,
|
||||
SERCOM(SERCOM4, 3, PINMUX_PB15C_SERCOM4_PAD3),
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PA12
|
||||
PIN(PA12, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA12E_TCC2_WO0, MUX_PA12E_TCC2_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA12F_TCC0_WO6, MUX_PA12F_TCC0_WO6),
|
||||
SERCOM(SERCOM2, 0, PINMUX_PA12C_SERCOM2_PAD0),
|
||||
SERCOM(SERCOM4, 0, PINMUX_PA12D_SERCOM4_PAD0));
|
||||
#endif
|
||||
#ifdef PIN_PA13
|
||||
PIN(PA13, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 1, 1, PIN_PA13E_TCC2_WO1, MUX_PA13E_TCC2_WO1),
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA13F_TCC0_WO7, MUX_PA13F_TCC0_WO7),
|
||||
SERCOM(SERCOM2, 1, PINMUX_PA13C_SERCOM2_PAD1),
|
||||
SERCOM(SERCOM4, 1, PINMUX_PA13D_SERCOM4_PAD1));
|
||||
#endif
|
||||
#ifdef PIN_PA14
|
||||
PIN(PA14, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 0, 0, PIN_PA14E_TC3_WO0, MUX_PA14E_TC3_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PA14F_TCC0_WO4, MUX_PA14F_TCC0_WO4),
|
||||
SERCOM(SERCOM2, 2, PINMUX_PA14C_SERCOM2_PAD2),
|
||||
SERCOM(SERCOM4, 2, PINMUX_PA14D_SERCOM4_PAD2));
|
||||
#endif
|
||||
#ifdef PIN_PA15
|
||||
PIN(PA15, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA15E_TC3_WO1, MUX_PA15E_TC3_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA15F_TCC0_WO5, MUX_PA15F_TCC0_WO5),
|
||||
SERCOM(SERCOM2, 3, PINMUX_PA15C_SERCOM2_PAD3),
|
||||
SERCOM(SERCOM4, 3, PINMUX_PA15D_SERCOM4_PAD3));
|
||||
#endif
|
||||
#ifdef PIN_PA16
|
||||
PIN(PA16, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 0, 0, PIN_PA16E_TCC2_WO0, MUX_PA16E_TCC2_WO0),
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA16F_TCC0_WO6, MUX_PA16F_TCC0_WO6),
|
||||
SERCOM(SERCOM1, 0, PINMUX_PA16C_SERCOM1_PAD0),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA16D_SERCOM3_PAD0));
|
||||
#endif
|
||||
#ifdef PIN_PA17
|
||||
PIN(PA17, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC2, 1, 1, PIN_PA17E_TCC2_WO1, MUX_PA17E_TCC2_WO1),
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA17F_TCC0_WO7, MUX_PA17F_TCC0_WO7),
|
||||
SERCOM(SERCOM1, 1, PINMUX_PA17C_SERCOM1_PAD1),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA17D_SERCOM3_PAD1));
|
||||
#endif
|
||||
#ifdef PIN_PA18
|
||||
PIN(PA18, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 0, 0, PIN_PA18E_TC3_WO0, MUX_PA18E_TC3_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA18F_TCC0_WO2, MUX_PA18F_TCC0_WO2),
|
||||
SERCOM(SERCOM1, 2, PINMUX_PA18C_SERCOM1_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA18D_SERCOM3_PAD2));
|
||||
#endif
|
||||
#ifdef PIN_PA19
|
||||
PIN(PA19, false, NO_ADC_INPUT,
|
||||
TIMER(TC3, 0, 1, 1, PIN_PA19E_TC3_WO1, MUX_PA19E_TC3_WO1),
|
||||
TIMER(0, TCC0, 3, 3, PIN_PA19F_TCC0_WO3, MUX_PA19F_TCC0_WO3),
|
||||
SERCOM(SERCOM1, 3, PINMUX_PA19C_SERCOM1_PAD3),
|
||||
SERCOM(SERCOM3, 3, PINMUX_PA19C_SERCOM1_PAD3));
|
||||
#endif
|
||||
#ifdef PIN_PB16
|
||||
PIN(PB16, false, NO_ADC_INPUT,
|
||||
#ifdef _SAMD21_TC6_INSTANCE_
|
||||
TIMER(TC6, 0, 0, 0, PIN_PB16E_TC6_WO0, MUX_PB16E_TC6_WO0),
|
||||
#else
|
||||
NO_TIMER,
|
||||
#endif
|
||||
TIMER(0, TCC0, 0, 4, PIN_PB16F_TCC0_WO4, MUX_PB16F_TCC0_WO4),
|
||||
SERCOM(SERCOM5, 0, PINMUX_PB16C_SERCOM5_PAD0),
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PB17
|
||||
PIN(PB17, false, NO_ADC_INPUT,
|
||||
#ifdef _SAMD21_TC6_INSTANCE_
|
||||
TIMER(TC6, 0, 0, 0, PIN_PB17E_TC6_WO1, MUX_PB17E_TC6_WO1),
|
||||
#else
|
||||
NO_TIMER,
|
||||
#endif
|
||||
TIMER(0, TCC0, 1, 5, PIN_PB17F_TCC0_WO5, MUX_PB17F_TCC0_WO5),
|
||||
SERCOM(SERCOM5, 1, PINMUX_PB17C_SERCOM5_PAD1),
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PA20
|
||||
PIN(PA20, false, NO_ADC_INPUT,
|
||||
#ifdef _SAMD21_TC7_INSTANCE_
|
||||
TIMER(TC7, 0, 0, 0, PIN_PA20E_TC7_WO0, MUX_PA20E_TC7_WO0),
|
||||
#else
|
||||
NO_TIMER,
|
||||
#endif
|
||||
TIMER(0, TCC0, 2, 6, PIN_PA20F_TCC0_WO6, MUX_PA20F_TCC0_WO6),
|
||||
SERCOM(SERCOM5, 2, PINMUX_PA20C_SERCOM5_PAD2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA20D_SERCOM3_PAD2));
|
||||
#endif
|
||||
#ifdef PIN_PA21
|
||||
PIN(PA21, false, NO_ADC_INPUT,
|
||||
#ifdef _SAMD21_TC7_INSTANCE_
|
||||
TIMER(TC7, 0, 1, 1, PIN_PA21E_TC7_WO1, MUX_PA21E_TC7_WO1),
|
||||
#else
|
||||
NO_TIMER,
|
||||
#endif
|
||||
TIMER(0, TCC0, 3, 7, PIN_PA21F_TCC0_WO7, MUX_PA21F_TCC0_WO7),
|
||||
SERCOM(SERCOM5, 3, PINMUX_PA21C_SERCOM5_PAD3),
|
||||
SERCOM(SERCOM3, 3, PINMUX_PA21D_SERCOM3_PAD3));
|
||||
#endif
|
||||
#ifdef PIN_PA22
|
||||
PIN(PA22, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 0, 0, PIN_PA22E_TC4_WO0, MUX_PA22E_TC4_WO0),
|
||||
TIMER(0, TCC0, 0, 4, PIN_PA22F_TCC0_WO4, MUX_PA22F_TCC0_WO4),
|
||||
SERCOM(SERCOM3, 0, PINMUX_PA22C_SERCOM3_PAD0),
|
||||
SERCOM(SERCOM5, 0, PINMUX_PA22D_SERCOM5_PAD0));
|
||||
#endif
|
||||
#ifdef PIN_PA23
|
||||
PIN(PA23, false, NO_ADC_INPUT,
|
||||
TIMER(TC4, 0, 1, 1, PIN_PA23E_TC4_WO1, MUX_PA23E_TC4_WO1),
|
||||
TIMER(0, TCC0, 1, 5, PIN_PA23F_TCC0_WO5, MUX_PA23F_TCC0_WO5),
|
||||
SERCOM(SERCOM3, 1, PINMUX_PA23C_SERCOM3_PAD1),
|
||||
SERCOM(SERCOM5, 1, PINMUX_PA23D_SERCOM5_PAD1));
|
||||
#endif
|
||||
#ifdef PIN_PA24
|
||||
PIN(PA24, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 0, 0, PIN_PA24E_TC5_WO0, MUX_PA24E_TC5_WO0),
|
||||
TIMER(0, TCC0, 2, 2, PIN_PA24F_TCC1_WO2, MUX_PA24F_TCC1_WO2),
|
||||
SERCOM(SERCOM3, 2, PINMUX_PA24C_SERCOM3_PAD2),
|
||||
SERCOM(SERCOM5, 2, PINMUX_PA24D_SERCOM5_PAD2));
|
||||
#endif
|
||||
#ifdef PIN_PA25
|
||||
PIN(PA25, false, NO_ADC_INPUT,
|
||||
TIMER(TC5, 0, 1, 1, PIN_PA25E_TC5_WO1, MUX_PA25E_TC5_WO1),
|
||||
TIMER(0, TCC1, 3, 3, PIN_PA25F_TCC1_WO3, MUX_PA25F_TCC1_WO3),
|
||||
SERCOM(SERCOM3, 3, PINMUX_PA25C_SERCOM3_PAD3),
|
||||
SERCOM(SERCOM5, 3, PINMUX_PA25C_SERCOM3_PAD3));
|
||||
#endif
|
||||
#ifdef PIN_PB22
|
||||
PIN(PB22, false, NO_ADC_INPUT,
|
||||
#ifdef _SAMD21_TC7_INSTANCE_
|
||||
TIMER(TC7, 0, 1, 1, PIN_PB22E_TC7_WO0, MUX_PB22E_TC7_WO0),
|
||||
#else
|
||||
NO_TIMER,
|
||||
#endif
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM5, 2, PINMUX_PB22D_SERCOM5_PAD2));
|
||||
#endif
|
||||
#ifdef PIN_PB23
|
||||
PIN(PB23, false, NO_ADC_INPUT,
|
||||
#ifdef _SAMD21_TC7_INSTANCE_
|
||||
TIMER(TC7, 0, 1, 1, PIN_PB23E_TC7_WO1, MUX_PB23E_TC7_WO1),
|
||||
#else
|
||||
NO_TIMER,
|
||||
#endif
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM5, 3, PINMUX_PB23D_SERCOM5_PAD3));
|
||||
#endif
|
||||
#ifdef PIN_PA27
|
||||
PIN(PA27, false, NO_ADC_INPUT,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PA28
|
||||
PIN(PA28, false, NO_ADC_INPUT,
|
||||
NO_TIMER,
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
NO_SERCOM);
|
||||
#endif
|
||||
#ifdef PIN_PA30
|
||||
PIN(PA30, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC1, 0, 0, PIN_PA30E_TCC1_WO0, MUX_PA30E_TCC1_WO0),
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM1, 2, PINMUX_PA30D_SERCOM1_PAD2));
|
||||
#endif
|
||||
#ifdef PIN_PA31
|
||||
PIN(PA31, false, NO_ADC_INPUT,
|
||||
TIMER(0, TCC1, 1, 1, PIN_PA31E_TCC1_WO1, MUX_PA31E_TCC1_WO1),
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM1, 3, PINMUX_PA31D_SERCOM1_PAD3));
|
||||
#endif
|
||||
#ifdef PIN_PB30
|
||||
PIN(PB30, false, NO_ADC_INPUT,
|
||||
TIMER(TCC0, 0, 0, 0, PIN_PB30E_TCC0_WO0, MUX_PB30E_TCC0_WO0),
|
||||
TIMER(TCC1, 0, 2, 2, PIN_PB30F_TCC1_WO2, MUX_PB30F_TCC1_WO2),
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM5, 0, PINMUX_PB30D_SERCOM5_PAD0));
|
||||
#endif
|
||||
#ifdef PIN_PB31
|
||||
PIN(PB31, false, NO_ADC_INPUT,
|
||||
TIMER(TCC0, 0, 1, 1, PIN_PB31E_TCC0_WO1, MUX_PB31E_TCC0_WO1),
|
||||
TIMER(TCC1, 0, 3, 3, PIN_PB31F_TCC1_WO3, MUX_PB31F_TCC1_WO3),
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM5, 1, PINMUX_PB31D_SERCOM5_PAD1));
|
||||
#endif
|
||||
#ifdef PIN_PB00
|
||||
PIN(PB00, true, ADC_POSITIVE_INPUT_PIN8,
|
||||
#ifdef _SAMD21_TC7_INSTANCE_
|
||||
TIMER(TC7, 0, 0, 0, PIN_PB00E_TC7_WO0, MUX_PB00E_TC7_WO0),
|
||||
#else
|
||||
NO_TIMER,
|
||||
#endif
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM5, 2, PINMUX_PB00D_SERCOM5_PAD2));
|
||||
#endif
|
||||
#ifdef PIN_PB01
|
||||
PIN(PB01, true, ADC_POSITIVE_INPUT_PIN9,
|
||||
#ifdef _SAMD21_TC7_INSTANCE_
|
||||
TIMER(TC7, 0, 1, 1, PIN_PB01E_TC7_WO1, MUX_PB01E_TC7_WO1),
|
||||
#else
|
||||
NO_TIMER,
|
||||
#endif
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM5, 3, PINMUX_PB01D_SERCOM5_PAD3));
|
||||
#endif
|
||||
#ifdef PIN_PB02
|
||||
PIN(PB02, true, ADC_POSITIVE_INPUT_PIN10,
|
||||
#ifdef _SAMD21_TC6_INSTANCE_
|
||||
TIMER(TC6, 0, 0, 0, PIN_PB02E_TC6_WO0, MUX_PB02E_TC6_WO0),
|
||||
#else
|
||||
NO_TIMER,
|
||||
#endif
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM5, 0, PINMUX_PB02D_SERCOM5_PAD0));
|
||||
#endif
|
||||
#ifdef PIN_PB03
|
||||
PIN(PB03, true, ADC_POSITIVE_INPUT_PIN11,
|
||||
#ifdef _SAMD21_TC6_INSTANCE_
|
||||
TIMER(TC6, 0, 1, 1, PIN_PB03E_TC6_WO1, MUX_PB03E_TC6_WO1),
|
||||
#else
|
||||
NO_TIMER,
|
||||
#endif
|
||||
NO_TIMER,
|
||||
NO_SERCOM,
|
||||
SERCOM(SERCOM5, 1, PINMUX_PB03D_SERCOM5_PAD1));
|
||||
#endif
|
||||
|
||||
STATIC const mp_map_elem_t pin_cpu_pins_locals_dict_table[] = {
|
||||
// Pins in datasheet order.
|
||||
#ifdef PIN_PA00
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA00), (mp_obj_t)&pin_PA00 },
|
||||
#endif
|
||||
#ifdef PIN_PA01
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA01), (mp_obj_t)&pin_PA01 },
|
||||
#endif
|
||||
#ifdef PIN_PA02
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA02), (mp_obj_t)&pin_PA02 },
|
||||
#endif
|
||||
#ifdef PIN_PA03
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA03), (mp_obj_t)&pin_PA03 },
|
||||
#endif
|
||||
#ifdef PIN_PB04
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB04), (mp_obj_t)&pin_PB04 },
|
||||
#endif
|
||||
#ifdef PIN_PB05
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB05), (mp_obj_t)&pin_PB05 },
|
||||
#endif
|
||||
#ifdef PIN_PB06
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB06), (mp_obj_t)&pin_PB06 },
|
||||
#endif
|
||||
#ifdef PIN_PB07
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB07), (mp_obj_t)&pin_PB07 },
|
||||
#endif
|
||||
#ifdef PIN_PB08
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB08), (mp_obj_t)&pin_PB08 },
|
||||
#endif
|
||||
#ifdef PIN_PB09
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB09), (mp_obj_t)&pin_PB09 },
|
||||
#endif
|
||||
#ifdef PIN_PA04
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA04), (mp_obj_t)&pin_PA04 },
|
||||
#endif
|
||||
#ifdef PIN_PA05
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA05), (mp_obj_t)&pin_PA05 },
|
||||
#endif
|
||||
#ifdef PIN_PA06
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA06), (mp_obj_t)&pin_PA06 },
|
||||
#endif
|
||||
#ifdef PIN_PA07
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA07), (mp_obj_t)&pin_PA07 },
|
||||
#endif
|
||||
#ifdef PIN_PA08
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA08), (mp_obj_t)&pin_PA08 },
|
||||
#endif
|
||||
#ifdef PIN_PA09
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA09), (mp_obj_t)&pin_PA09 },
|
||||
#endif
|
||||
#ifdef PIN_PA10
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA10), (mp_obj_t)&pin_PA10 },
|
||||
#endif
|
||||
#ifdef PIN_PA11
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA11), (mp_obj_t)&pin_PA11 },
|
||||
#endif
|
||||
#ifdef PIN_PB10
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB10), (mp_obj_t)&pin_PB10 },
|
||||
#endif
|
||||
#ifdef PIN_PB11
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB11), (mp_obj_t)&pin_PB11 },
|
||||
#endif
|
||||
#ifdef PIN_PB12
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB12), (mp_obj_t)&pin_PB12 },
|
||||
#endif
|
||||
#ifdef PIN_PB13
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB13), (mp_obj_t)&pin_PB13 },
|
||||
#endif
|
||||
#ifdef PIN_PB14
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB14), (mp_obj_t)&pin_PB14 },
|
||||
#endif
|
||||
|
||||
// Second page.
|
||||
#ifdef PIN_PB15
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB15), (mp_obj_t)&pin_PB15 },
|
||||
#endif
|
||||
#ifdef PIN_PA12
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA12), (mp_obj_t)&pin_PA12 },
|
||||
#endif
|
||||
#ifdef PIN_PA13
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA13), (mp_obj_t)&pin_PA13 },
|
||||
#endif
|
||||
#ifdef PIN_PA14
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA14), (mp_obj_t)&pin_PA14 },
|
||||
#endif
|
||||
#ifdef PIN_PA15
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA15), (mp_obj_t)&pin_PA15 },
|
||||
#endif
|
||||
#ifdef PIN_PA16
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA16), (mp_obj_t)&pin_PA16 },
|
||||
#endif
|
||||
#ifdef PIN_PA17
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA17), (mp_obj_t)&pin_PA17 },
|
||||
#endif
|
||||
#ifdef PIN_PA18
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA18), (mp_obj_t)&pin_PA18 },
|
||||
#endif
|
||||
#ifdef PIN_PA19
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA19), (mp_obj_t)&pin_PA19 },
|
||||
#endif
|
||||
#ifdef PIN_PB16
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB16), (mp_obj_t)&pin_PB16 },
|
||||
#endif
|
||||
#ifdef PIN_PB17
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB17), (mp_obj_t)&pin_PB17 },
|
||||
#endif
|
||||
#ifdef PIN_PA20
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA20), (mp_obj_t)&pin_PA20 },
|
||||
#endif
|
||||
#ifdef PIN_PA21
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA21), (mp_obj_t)&pin_PA21 },
|
||||
#endif
|
||||
#ifdef PIN_PA22
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA22), (mp_obj_t)&pin_PA22 },
|
||||
#endif
|
||||
#ifdef PIN_PA23
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA23), (mp_obj_t)&pin_PA23 },
|
||||
#endif
|
||||
#ifdef PIN_PA24
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA24), (mp_obj_t)&pin_PA24 },
|
||||
#endif
|
||||
#ifdef PIN_PA25
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA25), (mp_obj_t)&pin_PA25 },
|
||||
#endif
|
||||
#ifdef PIN_PB22
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB22), (mp_obj_t)&pin_PB22 },
|
||||
#endif
|
||||
#ifdef PIN_PB23
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB23), (mp_obj_t)&pin_PB23 },
|
||||
#endif
|
||||
#ifdef PIN_PA27
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA27), (mp_obj_t)&pin_PA27 },
|
||||
#endif
|
||||
#ifdef PIN_PA28
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA28), (mp_obj_t)&pin_PA28 },
|
||||
#endif
|
||||
#ifdef PIN_PA30
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA30), (mp_obj_t)&pin_PA30 },
|
||||
#endif
|
||||
#ifdef PIN_PA31
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PA31), (mp_obj_t)&pin_PA31 },
|
||||
#endif
|
||||
#ifdef PIN_PB30
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB30), (mp_obj_t)&pin_PB30 },
|
||||
#endif
|
||||
#ifdef PIN_PB31
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB31), (mp_obj_t)&pin_PB31 },
|
||||
#endif
|
||||
#ifdef PIN_PB00
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB00), (mp_obj_t)&pin_PB00 },
|
||||
#endif
|
||||
#ifdef PIN_PB01
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB01), (mp_obj_t)&pin_PB01 },
|
||||
#endif
|
||||
#ifdef PIN_PB02
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB02), (mp_obj_t)&pin_PB02 },
|
||||
#endif
|
||||
#ifdef PIN_PB03
|
||||
{ MP_OBJ_NEW_QSTR(MP_QSTR_PB03), (mp_obj_t)&pin_PB03 }
|
||||
#endif
|
||||
};
|
||||
MP_DEFINE_CONST_DICT(pin_cpu_pins_locals_dict, pin_cpu_pins_locals_dict_table);
|
|
@ -0,0 +1,166 @@
|
|||
#ifndef __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_SAMD21_PINS_H__
|
||||
#define __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_SAMD21_PINS_H__
|
||||
|
||||
#include "modmachine_pin.h"
|
||||
|
||||
// Pins in datasheet order.
|
||||
#ifdef PIN_PA00
|
||||
extern const pin_obj_t pin_PA00;
|
||||
#endif
|
||||
#ifdef PIN_PA01
|
||||
extern const pin_obj_t pin_PA01;
|
||||
#endif
|
||||
#ifdef PIN_PA02
|
||||
extern const pin_obj_t pin_PA02;
|
||||
#endif
|
||||
#ifdef PIN_PA03
|
||||
extern const pin_obj_t pin_PA03;
|
||||
#endif
|
||||
#ifdef PIN_PB04
|
||||
extern const pin_obj_t pin_PB04;
|
||||
#endif
|
||||
#ifdef PIN_PB05
|
||||
extern const pin_obj_t pin_PB05;
|
||||
#endif
|
||||
#ifdef PIN_PB06
|
||||
extern const pin_obj_t pin_PB06;
|
||||
#endif
|
||||
#ifdef PIN_PB07
|
||||
extern const pin_obj_t pin_PB07;
|
||||
#endif
|
||||
#ifdef PIN_PB08
|
||||
extern const pin_obj_t pin_PB08;
|
||||
#endif
|
||||
#ifdef PIN_PB09
|
||||
extern const pin_obj_t pin_PB09;
|
||||
#endif
|
||||
#ifdef PIN_PA04
|
||||
extern const pin_obj_t pin_PA04;
|
||||
#endif
|
||||
#ifdef PIN_PA05
|
||||
extern const pin_obj_t pin_PA05;
|
||||
#endif
|
||||
#ifdef PIN_PA06
|
||||
extern const pin_obj_t pin_PA06;
|
||||
#endif
|
||||
#ifdef PIN_PA07
|
||||
extern const pin_obj_t pin_PA07;
|
||||
#endif
|
||||
#ifdef PIN_PA08
|
||||
extern const pin_obj_t pin_PA08;
|
||||
#endif
|
||||
#ifdef PIN_PA09
|
||||
extern const pin_obj_t pin_PA09;
|
||||
#endif
|
||||
#ifdef PIN_PA10
|
||||
extern const pin_obj_t pin_PA10;
|
||||
#endif
|
||||
#ifdef PIN_PA11
|
||||
extern const pin_obj_t pin_PA11;
|
||||
#endif
|
||||
#ifdef PIN_PB10
|
||||
extern const pin_obj_t pin_PB10;
|
||||
#endif
|
||||
#ifdef PIN_PB11
|
||||
extern const pin_obj_t pin_PB11;
|
||||
#endif
|
||||
#ifdef PIN_PB12
|
||||
extern const pin_obj_t pin_PB12;
|
||||
#endif
|
||||
#ifdef PIN_PB13
|
||||
extern const pin_obj_t pin_PB13;
|
||||
#endif
|
||||
#ifdef PIN_PB14
|
||||
extern const pin_obj_t pin_PB14;
|
||||
#endif
|
||||
|
||||
// Second page.
|
||||
#ifdef PIN_PB15
|
||||
extern const pin_obj_t pin_PB15;
|
||||
#endif
|
||||
#ifdef PIN_PA12
|
||||
extern const pin_obj_t pin_PA12;
|
||||
#endif
|
||||
#ifdef PIN_PA13
|
||||
extern const pin_obj_t pin_PA13;
|
||||
#endif
|
||||
#ifdef PIN_PA14
|
||||
extern const pin_obj_t pin_PA14;
|
||||
#endif
|
||||
#ifdef PIN_PA15
|
||||
extern const pin_obj_t pin_PA15;
|
||||
#endif
|
||||
#ifdef PIN_PA16
|
||||
extern const pin_obj_t pin_PA16;
|
||||
#endif
|
||||
#ifdef PIN_PA17
|
||||
extern const pin_obj_t pin_PA17;
|
||||
#endif
|
||||
#ifdef PIN_PA18
|
||||
extern const pin_obj_t pin_PA18;
|
||||
#endif
|
||||
#ifdef PIN_PA19
|
||||
extern const pin_obj_t pin_PA19;
|
||||
#endif
|
||||
#ifdef PIN_PB16
|
||||
extern const pin_obj_t pin_PB16;
|
||||
#endif
|
||||
#ifdef PIN_PB17
|
||||
extern const pin_obj_t pin_PB17;
|
||||
#endif
|
||||
#ifdef PIN_PA20
|
||||
extern const pin_obj_t pin_PA20;
|
||||
#endif
|
||||
#ifdef PIN_PA21
|
||||
extern const pin_obj_t pin_PA21;
|
||||
#endif
|
||||
#ifdef PIN_PA22
|
||||
extern const pin_obj_t pin_PA22;
|
||||
#endif
|
||||
#ifdef PIN_PA23
|
||||
extern const pin_obj_t pin_PA23;
|
||||
#endif
|
||||
#ifdef PIN_PA24
|
||||
extern const pin_obj_t pin_PA24;
|
||||
#endif
|
||||
#ifdef PIN_PA25
|
||||
extern const pin_obj_t pin_PA25;
|
||||
#endif
|
||||
#ifdef PIN_PB22
|
||||
extern const pin_obj_t pin_PB22;
|
||||
#endif
|
||||
#ifdef PIN_PB23
|
||||
extern const pin_obj_t pin_PB23;
|
||||
#endif
|
||||
#ifdef PIN_PA27
|
||||
extern const pin_obj_t pin_PA27;
|
||||
#endif
|
||||
#ifdef PIN_PA28
|
||||
extern const pin_obj_t pin_PA28;
|
||||
#endif
|
||||
#ifdef PIN_PA30
|
||||
extern const pin_obj_t pin_PA30;
|
||||
#endif
|
||||
#ifdef PIN_PA31
|
||||
extern const pin_obj_t pin_PA31;
|
||||
#endif
|
||||
#ifdef PIN_PB30
|
||||
extern const pin_obj_t pin_PB30;
|
||||
#endif
|
||||
#ifdef PIN_PB31
|
||||
extern const pin_obj_t pin_PB31;
|
||||
#endif
|
||||
#ifdef PIN_PB00
|
||||
extern const pin_obj_t pin_PB00;
|
||||
#endif
|
||||
#ifdef PIN_PB01
|
||||
extern const pin_obj_t pin_PB01;
|
||||
#endif
|
||||
#ifdef PIN_PB02
|
||||
extern const pin_obj_t pin_PB02;
|
||||
#endif
|
||||
#ifdef PIN_PB03
|
||||
extern const pin_obj_t pin_PB03;
|
||||
#endif
|
||||
|
||||
#endif // __MICROPY_INCLUDED_ATMEL_SAMD_BOARDS_SAMD21_PINS_H__
|
Loading…
Reference in New Issue