ESP32 fixes for no PSRAM; some cleanup
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d4e8c19b49
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202fac59f8
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@ -6,22 +6,32 @@ CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
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# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
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# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
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CONFIG_SPIRAM_SIZE=2097152
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# end of SPI RAM config
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CONFIG_SPIRAM_SPEED_40M=y
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CONFIG_SPIRAM=y
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CONFIG_SPIRAM_BOOT_INIT=y
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CONFIG_SPIRAM_IGNORE_NOTFOUND=y
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CONFIG_SPIRAM_USE_MEMMAP=y
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# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
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# CONFIG_SPIRAM_USE_MALLOC is not set
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CONFIG_SPIRAM_MEMTEST=y
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# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
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# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set
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CONFIG_SPIRAM_CACHE_WORKAROUND=y
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# Uncomment to send log output to TX/RX pins on Feather ESP32V2
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#
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# ESP System Settings
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#
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# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
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# # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
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# CONFIG_ESP_CONSOLE_UART_CUSTOM=y
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# # CONFIG_ESP_CONSOLE_NONE is not set
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# CONFIG_ESP_CONSOLE_UART=y
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# nCONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
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# # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
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# CONFIG_ESP_CONSOLE_UART_NUM=0
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# CONFIG_ESP_CONSOLE_UART_TX_GPIO=8
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# CONFIG_ESP_CONSOLE_UART_RX_GPIO=7
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# CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
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# # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
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# # end of ESP System Settings
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# Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
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### #
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### # ESP System Settings
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### #
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### CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
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### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
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### CONFIG_ESP_CONSOLE_UART_CUSTOM=y
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### # CONFIG_ESP_CONSOLE_NONE is not set
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### CONFIG_ESP_CONSOLE_UART=y
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### CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
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### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
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### CONFIG_ESP_CONSOLE_UART_NUM=0
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### CONFIG_ESP_CONSOLE_UART_TX_GPIO=8
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### CONFIG_ESP_CONSOLE_UART_RX_GPIO=7
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### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
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### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
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### # end of ESP System Settings
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@ -1,22 +1,20 @@
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### TEST
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CONFIG_ESP32_ECO3_CACHE_LOCK_FIX=y
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CONFIG_ESP32_SPIRAM_SUPPORT=n
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# Uncomment to send log output to TX/RX pins
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#
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# ESP System Settings
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#
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CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
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# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
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# CONFIG_ESP_CONSOLE_UART_CUSTOM=y
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# CONFIG_ESP_CONSOLE_NONE is not set
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CONFIG_ESP_CONSOLE_UART=y
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CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
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# CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
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CONFIG_ESP_CONSOLE_UART_NUM=0
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CONFIG_ESP_CONSOLE_UART_TX_GPIO=17
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CONFIG_ESP_CONSOLE_UART_RX_GPIO=16
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CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
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# CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
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# end of ESP System Settings
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# Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
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### #
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### # ESP System Settings
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### #
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### CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
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### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
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### CONFIG_ESP_CONSOLE_UART_CUSTOM=y
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### CONFIG_ESP_CONSOLE_NONE is not set
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### CONFIG_ESP_CONSOLE_UART=y
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### CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
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### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
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### CONFIG_ESP_CONSOLE_UART_NUM=0
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### CONFIG_ESP_CONSOLE_UART_TX_GPIO=17
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### CONFIG_ESP_CONSOLE_UART_RX_GPIO=16
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### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
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### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
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### # end of ESP System Settings
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@ -1,10 +1,3 @@
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#
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# Partition Table
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#
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
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CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
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# end of Partition Table
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#
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# SPI RAM config
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#
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@ -33,7 +26,7 @@ CONFIG_ESP32_SPIRAM_SUPPORT=y
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# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
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# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
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### # Uncomment to send log output to TX/RX pins on Feather ESP32V2
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### # Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
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### #
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### # ESP System Settings
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### #
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@ -45,7 +38,7 @@ CONFIG_ESP32_SPIRAM_SUPPORT=y
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### CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
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### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
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### CONFIG_ESP_CONSOLE_UART_NUM=0
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### CONFIG_ESP_CONSOLE_UART_TX_GPIO=8
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### CONFIG_ESP_CONSOLE_UART_TX_GPIO=32
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### CONFIG_ESP_CONSOLE_UART_RX_GPIO=7
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### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
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### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
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@ -1,13 +1,4 @@
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#
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# Partition Table
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#
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-16MB-no-uf2.csv"
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CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-16MB-no-uf2.csv"
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# end of Partition Table
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CONFIG_ESP_INT_WDT_TIMEOUT_MS=3000
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#
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CONFIG_ESP32_SPIRAM_SUPPORT=y
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# SPI RAM config
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#
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# CONFIG_SPIRAM_TYPE_AUTO is not set
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@ -27,28 +18,20 @@ CONFIG_SPIRAM_MEMTEST=y
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# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set
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CONFIG_SPIRAM_CACHE_WORKAROUND=y
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#
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# SPI RAM config
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#
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CONFIG_ESP32_SPIRAM_SUPPORT=y
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# CONFIG_SPIRAM_TYPE_AUTO is not set
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# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
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# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
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### # Uncomment to send log output to TX/RX pins on Feather ESP32V2
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# Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
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### #
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### # ESP System Settings
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### #
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CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
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### CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
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### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
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CONFIG_ESP_CONSOLE_UART_CUSTOM=y
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### CONFIG_ESP_CONSOLE_UART_CUSTOM=y
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### # CONFIG_ESP_CONSOLE_NONE is not set
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CONFIG_ESP_CONSOLE_UART=y
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CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
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### CONFIG_ESP_CONSOLE_UART=y
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### nCONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
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### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
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CONFIG_ESP_CONSOLE_UART_NUM=0
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CONFIG_ESP_CONSOLE_UART_TX_GPIO=12
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CONFIG_ESP_CONSOLE_UART_RX_GPIO=15
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CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
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### CONFIG_ESP_CONSOLE_UART_NUM=0
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### CONFIG_ESP_CONSOLE_UART_TX_GPIO=12
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### CONFIG_ESP_CONSOLE_UART_RX_GPIO=15
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### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
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### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
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### # end of ESP System Settings
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@ -160,6 +160,7 @@ void sleep_timer_cb(void *arg);
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#define PSRAM_HSPI_SPIWP_SD3_IO 2
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#define PSRAM_HSPI_SPIHD_SD2_IO 4
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#ifdef CONFIG_SPIRAM
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// PSRAM clock and cs IO should be configured based on hardware design.
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// For ESP32-WROVER or ESP32-WROVER-B module, the clock IO is IO17, the cs IO is IO16,
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// they are the default value for these two configs.
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@ -180,9 +181,11 @@ void sleep_timer_cb(void *arg);
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#define PICO_V3_02_PSRAM_CLK_IO 10
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#define PICO_V3_02_PSRAM_CS_IO 9
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#endif // CONFIG_SPIRAM
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static void _never_reset_spi_ram_flash(void) {
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#if defined(CONFIG_IDF_TARGET_ESP32)
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#if defined(CONFIG_SPIRAM)
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uint32_t pkg_ver = esp_efuse_get_pkg_ver();
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if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
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never_reset_pin_number(D2WD_PSRAM_CLK_IO);
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@ -202,6 +205,7 @@ static void _never_reset_spi_ram_flash(void) {
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never_reset_pin_number(D0WDR2_V3_PSRAM_CLK_IO);
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never_reset_pin_number(D0WDR2_V3_PSRAM_CS_IO);
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}
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#endif // CONFIG_SPIRAM
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const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info();
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if (spiconfig == ESP_ROM_EFUSE_FLASH_DEFAULT_SPI) {
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@ -226,7 +230,7 @@ static void _never_reset_spi_ram_flash(void) {
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never_reset_pin_number(EFUSE_SPICONFIG_RET_SPIHD(spiconfig));
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never_reset_pin_number(bootloader_flash_get_wp_pin());
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}
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#endif
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#endif // CONFIG_IDF_TARGET_ESP32
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}
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safe_mode_t port_init(void) {
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