ESP32 fixes for no PSRAM; some cleanup

This commit is contained in:
Dan Halbert 2022-08-04 13:44:52 -04:00
parent d4e8c19b49
commit 202fac59f8
5 changed files with 62 additions and 74 deletions

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@ -6,22 +6,32 @@ CONFIG_SPIRAM_TYPE_ESPPSRAM16=y
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set # CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set # CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
CONFIG_SPIRAM_SIZE=2097152 CONFIG_SPIRAM_SIZE=2097152
# end of SPI RAM config CONFIG_SPIRAM_SPEED_40M=y
CONFIG_SPIRAM=y
CONFIG_SPIRAM_BOOT_INIT=y
CONFIG_SPIRAM_IGNORE_NOTFOUND=y
CONFIG_SPIRAM_USE_MEMMAP=y
# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set
# CONFIG_SPIRAM_USE_MALLOC is not set
CONFIG_SPIRAM_MEMTEST=y
# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set
# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set
CONFIG_SPIRAM_CACHE_WORKAROUND=y
# Uncomment to send log output to TX/RX pins on Feather ESP32V2 # Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
# ### #
# ESP System Settings ### # ESP System Settings
# ### #
# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y ### CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
# # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set ### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
# CONFIG_ESP_CONSOLE_UART_CUSTOM=y ### CONFIG_ESP_CONSOLE_UART_CUSTOM=y
# # CONFIG_ESP_CONSOLE_NONE is not set ### # CONFIG_ESP_CONSOLE_NONE is not set
# CONFIG_ESP_CONSOLE_UART=y ### CONFIG_ESP_CONSOLE_UART=y
# nCONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y ### CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
# # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set ### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
# CONFIG_ESP_CONSOLE_UART_NUM=0 ### CONFIG_ESP_CONSOLE_UART_NUM=0
# CONFIG_ESP_CONSOLE_UART_TX_GPIO=8 ### CONFIG_ESP_CONSOLE_UART_TX_GPIO=8
# CONFIG_ESP_CONSOLE_UART_RX_GPIO=7 ### CONFIG_ESP_CONSOLE_UART_RX_GPIO=7
# CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 ### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
# # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set ### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
# # end of ESP System Settings ### # end of ESP System Settings

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@ -1,22 +1,20 @@
### TEST
CONFIG_ESP32_ECO3_CACHE_LOCK_FIX=y CONFIG_ESP32_ECO3_CACHE_LOCK_FIX=y
CONFIG_ESP32_SPIRAM_SUPPORT=n CONFIG_ESP32_SPIRAM_SUPPORT=n
# Uncomment to send log output to TX/RX pins # Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
# ### #
# ESP System Settings ### # ESP System Settings
# ### #
CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y ### CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set ### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
# CONFIG_ESP_CONSOLE_UART_CUSTOM=y ### CONFIG_ESP_CONSOLE_UART_CUSTOM=y
# CONFIG_ESP_CONSOLE_NONE is not set ### CONFIG_ESP_CONSOLE_NONE is not set
CONFIG_ESP_CONSOLE_UART=y ### CONFIG_ESP_CONSOLE_UART=y
CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y ### CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
# CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set ### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
CONFIG_ESP_CONSOLE_UART_NUM=0 ### CONFIG_ESP_CONSOLE_UART_NUM=0
CONFIG_ESP_CONSOLE_UART_TX_GPIO=17 ### CONFIG_ESP_CONSOLE_UART_TX_GPIO=17
CONFIG_ESP_CONSOLE_UART_RX_GPIO=16 ### CONFIG_ESP_CONSOLE_UART_RX_GPIO=16
CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 ### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
# CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set ### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
# end of ESP System Settings ### # end of ESP System Settings

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@ -1,10 +1,3 @@
#
# Partition Table
#
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-8MB-no-uf2.csv"
# end of Partition Table
# #
# SPI RAM config # SPI RAM config
# #
@ -33,7 +26,7 @@ CONFIG_ESP32_SPIRAM_SUPPORT=y
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set # CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set # CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
### # Uncomment to send log output to TX/RX pins on Feather ESP32V2 ### # Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
### # ### #
### # ESP System Settings ### # ESP System Settings
### # ### #
@ -45,7 +38,7 @@ CONFIG_ESP32_SPIRAM_SUPPORT=y
### CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y ### CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set ### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
### CONFIG_ESP_CONSOLE_UART_NUM=0 ### CONFIG_ESP_CONSOLE_UART_NUM=0
### CONFIG_ESP_CONSOLE_UART_TX_GPIO=8 ### CONFIG_ESP_CONSOLE_UART_TX_GPIO=32
### CONFIG_ESP_CONSOLE_UART_RX_GPIO=7 ### CONFIG_ESP_CONSOLE_UART_RX_GPIO=7
### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 ### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set ### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set

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@ -1,13 +1,4 @@
# CONFIG_ESP32_SPIRAM_SUPPORT=y
# Partition Table
#
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="esp-idf-config/partitions-16MB-no-uf2.csv"
CONFIG_PARTITION_TABLE_FILENAME="esp-idf-config/partitions-16MB-no-uf2.csv"
# end of Partition Table
CONFIG_ESP_INT_WDT_TIMEOUT_MS=3000
#
# SPI RAM config # SPI RAM config
# #
# CONFIG_SPIRAM_TYPE_AUTO is not set # CONFIG_SPIRAM_TYPE_AUTO is not set
@ -27,28 +18,20 @@ CONFIG_SPIRAM_MEMTEST=y
# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set # CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set
CONFIG_SPIRAM_CACHE_WORKAROUND=y CONFIG_SPIRAM_CACHE_WORKAROUND=y
# # Uncomment (remove ###) to send ESP_LOG output to TX/RX pins
# SPI RAM config
#
CONFIG_ESP32_SPIRAM_SUPPORT=y
# CONFIG_SPIRAM_TYPE_AUTO is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM32 is not set
# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set
### # Uncomment to send log output to TX/RX pins on Feather ESP32V2
### # ### #
### # ESP System Settings ### # ESP System Settings
### # ### #
CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y ### CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT=y
### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set ### # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set
CONFIG_ESP_CONSOLE_UART_CUSTOM=y ### CONFIG_ESP_CONSOLE_UART_CUSTOM=y
### # CONFIG_ESP_CONSOLE_NONE is not set ### # CONFIG_ESP_CONSOLE_NONE is not set
CONFIG_ESP_CONSOLE_UART=y ### CONFIG_ESP_CONSOLE_UART=y
CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y ### nCONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0=y
### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set ### # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1 is not set
CONFIG_ESP_CONSOLE_UART_NUM=0 ### CONFIG_ESP_CONSOLE_UART_NUM=0
CONFIG_ESP_CONSOLE_UART_TX_GPIO=12 ### CONFIG_ESP_CONSOLE_UART_TX_GPIO=12
CONFIG_ESP_CONSOLE_UART_RX_GPIO=15 ### CONFIG_ESP_CONSOLE_UART_RX_GPIO=15
CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 ### CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200
### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set ### # CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5 is not set
### # end of ESP System Settings ### # end of ESP System Settings

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@ -160,6 +160,7 @@ void sleep_timer_cb(void *arg);
#define PSRAM_HSPI_SPIWP_SD3_IO 2 #define PSRAM_HSPI_SPIWP_SD3_IO 2
#define PSRAM_HSPI_SPIHD_SD2_IO 4 #define PSRAM_HSPI_SPIHD_SD2_IO 4
#ifdef CONFIG_SPIRAM
// PSRAM clock and cs IO should be configured based on hardware design. // PSRAM clock and cs IO should be configured based on hardware design.
// For ESP32-WROVER or ESP32-WROVER-B module, the clock IO is IO17, the cs IO is IO16, // For ESP32-WROVER or ESP32-WROVER-B module, the clock IO is IO17, the cs IO is IO16,
// they are the default value for these two configs. // they are the default value for these two configs.
@ -180,9 +181,11 @@ void sleep_timer_cb(void *arg);
#define PICO_V3_02_PSRAM_CLK_IO 10 #define PICO_V3_02_PSRAM_CLK_IO 10
#define PICO_V3_02_PSRAM_CS_IO 9 #define PICO_V3_02_PSRAM_CS_IO 9
#endif // CONFIG_SPIRAM
static void _never_reset_spi_ram_flash(void) { static void _never_reset_spi_ram_flash(void) {
#if defined(CONFIG_IDF_TARGET_ESP32) #if defined(CONFIG_IDF_TARGET_ESP32)
#if defined(CONFIG_SPIRAM)
uint32_t pkg_ver = esp_efuse_get_pkg_ver(); uint32_t pkg_ver = esp_efuse_get_pkg_ver();
if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) { if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5) {
never_reset_pin_number(D2WD_PSRAM_CLK_IO); never_reset_pin_number(D2WD_PSRAM_CLK_IO);
@ -202,6 +205,7 @@ static void _never_reset_spi_ram_flash(void) {
never_reset_pin_number(D0WDR2_V3_PSRAM_CLK_IO); never_reset_pin_number(D0WDR2_V3_PSRAM_CLK_IO);
never_reset_pin_number(D0WDR2_V3_PSRAM_CS_IO); never_reset_pin_number(D0WDR2_V3_PSRAM_CS_IO);
} }
#endif // CONFIG_SPIRAM
const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info(); const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info();
if (spiconfig == ESP_ROM_EFUSE_FLASH_DEFAULT_SPI) { if (spiconfig == ESP_ROM_EFUSE_FLASH_DEFAULT_SPI) {
@ -226,7 +230,7 @@ static void _never_reset_spi_ram_flash(void) {
never_reset_pin_number(EFUSE_SPICONFIG_RET_SPIHD(spiconfig)); never_reset_pin_number(EFUSE_SPICONFIG_RET_SPIHD(spiconfig));
never_reset_pin_number(bootloader_flash_get_wp_pin()); never_reset_pin_number(bootloader_flash_get_wp_pin());
} }
#endif #endif // CONFIG_IDF_TARGET_ESP32
} }
safe_mode_t port_init(void) { safe_mode_t port_init(void) {