add pindefs for tft and tft control

This commit is contained in:
brentru 2019-08-07 18:29:20 -04:00
parent 8f6eac98f3
commit 1d4700cb6c
2 changed files with 47 additions and 34 deletions

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@ -28,6 +28,9 @@
#include "mpconfigboard.h" #include "mpconfigboard.h"
#include "hal/include/hal_gpio.h" #include "hal/include/hal_gpio.h"
#include "shared-bindings/busio/SPI.h"
#include "shared-bindings/displayio/FourWire.h"
#include "shared-module/displayio/__init__.h" #include "shared-module/displayio/__init__.h"
#include "shared-module/displayio/mipi_constants.h" #include "shared-module/displayio/mipi_constants.h"
@ -36,49 +39,50 @@
#define DELAY 0x80 #define DELAY 0x80
uint8_t display_init_sequence[] = { uint8_t display_init_sequence[] = {
0xEF, 3, 0x03, 0x80, 0x02, 0x01, 2, 0x80, 0x64, // swreset
0xCF, 3, 0x00, 0xC1, 0x30, 0xB9, 5, 0x83, 0xFF, 0x83, 0x57, 0xFF,
0xED, 4, 0x64, 0x03, 0x12, 0x81, 0xB3, 5, 0x04, 0x80, 0x00, 0x06, 0x06,
0xE8, 3, 0x85, 0x00, 0x78, 0xB6, 2, 0x01, 0x25,
0xCB, 5, 0x39, 0x2C, 0x00, 0x34, 0x02, 0xCC, 2, 0x01, 0x05,
0xF7, 1, 0x20, 0xB1, 7,
0xEA, 2, 0x00, 0x00, 0x06, 0x00, 0x15, 0x1C, 0x1C, 0x83, 0xAA,
0xc0, 1, 0x23, // Power control VRH[5:0] 0xC0, 7,
0xc1, 1, 0x10, // Power control SAP[2:0];BT[3:0] 0x06, 0x50, 0x50, 0x01, 0x3C, 0x1E, 0x08,
0xc5, 2, 0x3e, 0x28, // VCM control 0xB4, 8,
0xc7, 1, 0x86, // VCM control2 0x07, 0x02, 0x40, 0x00, 0x2A, 0x2A, 0x0D, 0x78,
0x36, 1, 0xa8, // Memory Access Control 0xE0, 34,
0x37, 1, 0x00, // Vertical scroll zero 0x02, 0x0A, 0x11, 0x1d, 0x23, 0x35, 0x41, 0x4b, 0x4b,
0x3a, 1, 0x55, // COLMOD: Pixel Format Set 0x42, 0x3A, 0x27, 0x1B, 0x08, 0x09, 0x03, 0x02, 0x0A,
0xb1, 2, 0x00, 0x18, // Frame Rate Control (In Normal Mode/Full Colors) 0x11, 0x1d, 0x23, 0x35, 0x41, 0x4b, 0x4b, 0x42, 0x3A,
0xb6, 3, 0x08, 0xa2, 0x27, // Display Function Control 0x27, 0x1B, 0x08, 0x09, 0x03, 0x00, 0x01,
0xF2, 1, 0x00, // 3Gamma Function Disable 0x3a, 1, 0x55,
0x26, 1, 0x01, // Gamma curve selected 0x36, 1, 0xC0,
0xe0, 15, 0x0F, 0x31, 0x2B, 0x0C, 0x0E, 0x08, // Set Gamma 0x35, 1, 0x00,
0x4E, 0xF1, 0x37, 0x07, 0x10, 0x03, 0x0E, 0x09, 0x00, 0x44, 2, 0x00, 0x02,
0xe1, 15, 0x00, 0x0E, 0x14, 0x03, 0x11, 0x07, // Set Gamma 0x11, 0x80 + 150/5, // Exit Sleep, then delay 150 ms
0x31, 0xC1, 0x48, 0x08, 0x0F, 0x0C, 0x31, 0x36, 0x0F, 0x29, 0x80 + 50/5
0x11, DELAY, 120, // Exit Sleep
0x29, DELAY, 120, // Display on
}; };
void board_init(void) { void board_init(void) {
displayio_parallelbus_obj_t* bus = &displays[0].parallel_bus; busio_spi_obj_t* spi = &displays[0].fourwire_bus.inline_bus;
bus->base.type = &displayio_parallelbus_type; common_hal_busio_spi_construct(spi, &pin_PA13, &pin_PA12, &pin_PA14);
common_hal_displayio_parallelbus_construct(bus, common_hal_busio_spi_never_reset(spi);
&pin_PA16, // Data0
&pin_PB05, // Command or data displayio_fourwire_obj_t* bus = &displays[0].fourwire_bus;
&pin_PB06, // Chip select bus->base.type = &displayio_fourwire_type;
&pin_PB09, // Write common_hal_displayio_fourwire_construct(bus,
&pin_PB04, // Read spi,
&pin_PA00); // Reset &pin_PB05, // TFT_DC Command or data
&pin_PB06, // TFT_CS Chip select
&pin_PA00, // TFT_RST Reset
24000000);
displayio_display_obj_t* display = &displays[0].display; displayio_display_obj_t* display = &displays[0].display;
display->base.type = &displayio_display_type; display->base.type = &displayio_display_type;
common_hal_displayio_display_construct(display, common_hal_displayio_display_construct(display,
bus, bus,
320, // Width 320, // Width
240, // Height 480, // Height
0, // column start 0, // column start
0, // row start 0, // row start
0, // rotation 0, // rotation

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@ -80,6 +80,15 @@ STATIC const mp_rom_map_elem_t board_global_dict_table[] = {
{ MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) },
{ MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) },
// TFT control pins
{MP_OBJ_NEW_QSTR(MP_QSTR_TFT_LITE), MP_ROM_PTR(&pin_PB31)},
{MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MOSI), MP_ROM_PTR(&pin_PA12)},
{MP_OBJ_NEW_QSTR(MP_QSTR_TFT_SCK), MP_ROM_PTR(&pin_PA13)},
{MP_OBJ_NEW_QSTR(MP_QSTR_TFT_MISO), MP_ROM_PTR(&pin_PA14)},
{MP_OBJ_NEW_QSTR(MP_QSTR_TFT_RST), MP_ROM_PTR(&pin_PA00)},
{MP_ROM_QSTR(MP_QSTR_TFT_CS), MP_ROM_PTR(&pin_PB06)},
{MP_ROM_QSTR(MP_QSTR_TFT_DC), MP_ROM_PTR(&pin_PB05)},
{ MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) }, { MP_ROM_QSTR(MP_QSTR_DISPLAY), MP_ROM_PTR(&displays[0].display) },
}; };
MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table); MP_DEFINE_CONST_DICT(board_module_globals, board_global_dict_table);